Patents Assigned to Fujitsu
  • Patent number: 6268868
    Abstract: An information displaying apparatus having a display unit for displaying information on a display screen 10, an indicator detector provided in the vicinity of the display screen 10 for detecting a position in a predetermined area on the display screen 10 indicated by an indicator and a size of the indicator, and an image control unit 52 for displaying an image on the screen 10 of the display unit according to the detected result by the indicator detector, wherein the image control unit 52 displays images on the display screen 10 of the display unit in different manners according to the position and/or size of the indicator detected by the indicator detector. According to this apparatus, for example, a thickness of one line can be changed and can be changed in steps during the drawing without specifying a size of a point and a thickness of a line to be drawn before the drawing operation. Moreover, subtle blur, etc.
    Type: Grant
    Filed: February 26, 1998
    Date of Patent: July 31, 2001
    Assignee: Fujitsu Limited
    Inventors: Nobuyasu Yamaguchi, Satoshi Sano, Fumihiko Nakazawa, Atsuo Iida, Fumitaka Abe
  • Patent number: 6268710
    Abstract: A battery monitor apparatus for monitoring the voltage of each cell of a battery pack including a plurality of cells is disclosed, in which each cell of the battery pack having the plurality of cells is connected to a capacitor by a switch, so that the cell voltage is retrieved and measured, and the current is detected, thereby making it possible to control the charge/discharge of each cell. This apparatus includes a capacitor, a switch group for connecting the ends of an arbitrary one of the cells constituting the battery pack or the ends of an arbitrary plurality of the cells to the capacitor thereby to retrieve the voltage of one cell or a plurality of the cells, and a detector for detecting the voltage of the capacitor.
    Type: Grant
    Filed: March 31, 2000
    Date of Patent: July 31, 2001
    Assignee: Fujitsu Limited
    Inventor: Kazunobu Koga
  • Patent number: 6266930
    Abstract: A safeguard structure for making burglary of an entire object device difficult or impossible. The safeguard structure includes and installation board that comes into surface contact with an installation place and has the area wider that the bottom area of the object device and a fixture mechanism for fixing the installation board with the object device. Affixing the object device and the installation board makes the combination of the object and the installation board device large enough to prevent removal of the combination from the installation place.
    Type: Grant
    Filed: October 15, 1999
    Date of Patent: July 31, 2001
    Assignee: Fujitsu Limited
    Inventor: Hiroyuki Kitabatake
  • Patent number: 6268645
    Abstract: A semiconductor device having a semiconductor chip on a TAB (Tape Automated Bonding) tape with high reliability is provided. The semiconductor device of the present invention includes a TAB tape which has a base film provided with a device hole in a position where a semiconductor chip is mounted, a wiring pattern whose end portions constitute inner leads connected to the semiconductor chip and terminal connecting portions provided with solder balls, and a photo-solder resist which protects the wiring pattern. Chamfered portions which relieves internal residual stress caused in the photo-solder resist due to the difference in thermal expansion coefficient between the base film and the photo-solder resist are formed at locations on the photo-solder resist facing the corners of the device hole.
    Type: Grant
    Filed: March 22, 2000
    Date of Patent: July 31, 2001
    Assignee: Fujitsu Limited
    Inventors: Masashi Takenaka, Shiro Yoda, Junichiro Hiyoshi, Hiroshi Takahashi, Hideo Sato
  • Patent number: 6269033
    Abstract: A semiconductor memory device, such as a SDRAM, includes input/output data line pairs, data bus line pairs, and a redundancy data bus line pair. The input/output data line pairs are connected to a corresponding one of the data bus line pairs and an adjacent one of the data bus line pairs via redundancy shift switches, with a last one of the input/output data line pairs being connected to a last one fo the data bus line pairs and the redundancy data bus line pair. Sense buffers and write amplifiers are connected between each of the data bus line pairs and the redundancy data line pair. The shift switches are located closer to the input/output data line pairs than the sense buffers and the write amplifiers so that data read from the memory cells is less effected by the on resistance and the parasitic capacitance of the switches. When the switches are located closer to the data bus lines than the sense buffers and the write amplifiers are, the switches effect the data signals of data read from the memory cells.
    Type: Grant
    Filed: January 10, 2000
    Date of Patent: July 31, 2001
    Assignee: Fujitsu Limited
    Inventors: Yoshiyuki Ishida, Yasushige Ogawa
  • Patent number: 6269209
    Abstract: An optical module including a substrate, an optical waveguide formed on the substrate, and an optical element mounted on the substrate so as to be optically coupled to an end of the optical waveguide, for performing conversion between light and electricity. The optical module further includes a transparent resin for covering at least an optical coupling portion between the optical waveguide and the optical element, and a thermoplastic resin for covering only the optical element and its periphery including the transparent resin to seal the optical element.
    Type: Grant
    Filed: July 31, 1998
    Date of Patent: July 31, 2001
    Assignee: Fujitsu Limited
    Inventors: Koji Terada, Taizo Nosaka, Goji Nakagawa, Kazuhiro Tanaka, Kazunori Miura, Yoshihiro Yoneda, Akira Fukushima
  • Patent number: 6269204
    Abstract: Disclosed herein is a system including a first optical fiber transmission line, a plurality of second optical fiber transmission lines, a branching section for optically connecting these first and second optical fiber transmission lines, a monitor device optically connected to the first optical fiber transmission line, and a plurality of reflecting sections respectively provided in the vicinity of open ends of the second optical fiber transmission lines. The monitor device outputs monitor light through the first optical fiber transmission line and the branching section to each of the second optical fiber transmission lines. The reflecting sections reflect the monitor light to thereby generate identification optical signals having different patterns for respectively identifying the second optical fiber transmission lines.
    Type: Grant
    Filed: September 27, 1999
    Date of Patent: July 31, 2001
    Assignee: Fujitsu Limited
    Inventor: Tomohisa Ishikawa
  • Patent number: 6268295
    Abstract: A method of manufacturing a semiconductor device comprises the steps of forming a first film over a semicondutor substrate, introducing a reaction gas including a dilution gas into a reaction atmosphere and then growing a antireflection film made of silicon nitride or silicon nitride oxide on the first film by a plasma chemical vapor deposition method in the reaction atmosphere, coating resist on the antireflection film directly or via a second film and then patterning the resist via exposure and development, patterning the first film located in an area not covered with the resist by etching, and removing the antireflection film by use of hydrofluoric acid after patterning of the first film, whereby expansion of impurity diffusion can be prevented and also retreat of sidewalls can be suppressed.
    Type: Grant
    Filed: June 26, 1998
    Date of Patent: July 31, 2001
    Assignee: Fujitsu Limited
    Inventors: Hiroyuki Ohta, Hidekazu Satoh
  • Patent number: 6268955
    Abstract: An object is to provide a low cost optical amplifier having a simple construction where gain equalization of wavelength division multiplexed signal light, and the suppression of noise light is realized by a single optical device, and to provide a wavelength division multiplexed light transmission system using such an amplifier. Accordingly, the optical amplifier of the present invention is constructed by providing for a conventional optical amplifier incorporating an EDF, an excitation light source and a multiplexer, an optical filter having a periodic loss-wavelength characteristic with respect to a gain wavelength characteristic of the EDF. The optical filter has the characteristic that a spacing (FSR) corresponding to one period of a loss-wavelength characteristic corresponds to a gain peak wavelength difference of the EDF, and a maximum loss wavelength approximately coincides with a gain peak wavelength on a long wavelength side of the EDF.
    Type: Grant
    Filed: June 11, 1999
    Date of Patent: July 31, 2001
    Assignee: Fujitsu Limited
    Inventors: Naomasa Shimojoh, Takao Naito
  • Publication number: 20010009279
    Abstract: A semiconductor device is a hetero-junction bipolar transistor structured by having a gallium arsenide film among laminated films, which has an indium gallium phosphide (InGaP) film which is connected to the gallium arsenide film and functions as an emitter, wherein the indium gallium phosphide film includes antimony (Sb). By including antimony, a carrier density can be deterred from decreasing near an interface between the gallium arsenide film and the indium gallium phosphide film and an emitter resistance can be reduced to a minimum.
    Type: Application
    Filed: January 19, 2001
    Publication date: July 26, 2001
    Applicant: Fujitsu Limited, Kawasaki, Japan
    Inventor: Toshihide Kikkawa
  • Publication number: 20010009062
    Abstract: The method of making the magnetic resistance element comprises the steps of: forming a first magnetizable layer, a non-magnetizable layer and a second magnetizable layer, in this order, on an insulating layer; providing a resist layer for forming a main part of the magnetic resistance element on the second magnetizable layer; etching side faces of the first magnetizable layer, the non-magnetizable layer and the second magnetizable layer to form into slope faces by ion milling from the second magnetizable layer side; forming terminals on the slope faces; and removing the resist layer, wherein a part of the first megnetizable layer which is located outside of the slope faces is left on the insulating layer when the side faces of the first magnetizable layer, the non-magnetizable layer and the second magnetizable layer are etched by ion milling.
    Type: Application
    Filed: January 24, 2001
    Publication date: July 26, 2001
    Applicant: Fujitsu Limited
    Inventors: Masaaki Mikami, Takashi Ito, Takamitsu Orimoto, Mitsumasa Okada
  • Publication number: 20010009524
    Abstract: A semiconductor memory device includes a memory circuit from which data is read in correspondence with a first reference clock signal. A multiplexer outputs the data read from the memory circuit in correspondence with the second reference clock signal. A comparison determination circuit receives the data read from the memory circuit via the multiplexer and compares the read data with an expected data value in correspondence with the second reference clock signal to generate determination result data.
    Type: Application
    Filed: January 18, 2001
    Publication date: July 26, 2001
    Applicant: FUJITSU LIMITED
    Inventor: Tomohiko Koto
  • Publication number: 20010009525
    Abstract: A semiconductor memory device having a burn-in test capability. The semiconductor memory device includes a detection circuit, which is connected to the plurality of word lines. The detection circuit detects whether a stress voltage for a burn-in test has been applied to all of the word lines along their entire lengths in the burn-in test.
    Type: Application
    Filed: January 25, 2001
    Publication date: July 26, 2001
    Applicant: Fujitsu Limited
    Inventors: Satoru Kawamoto, Motoki Mizutani, Shinji Nagai, Yoshiharu Kato
  • Publication number: 20010009727
    Abstract: A magnetic recording medium has a construction in which on a non-magnetic support member are successively stacked a seed layer made of a non-magnetic material that is mainly composed of Cr, a keeper layer made of an NiFe-type soft magnetic material, an intermediate layer made of a non-magnetic material that is mainly composed of Cr and a recording layer made of a magnetic material that is mainly composed of Co.
    Type: Application
    Filed: March 8, 2001
    Publication date: July 26, 2001
    Applicant: FUJITSU LIMITED
    Inventors: Hideyuki Akimoto, Chiaki Okuyama, Iwao Okamoto
  • Publication number: 20010009486
    Abstract: A cover seal closes an opening of a housing body and enclose a cover for the opening in cooperation with the housing body. The rigidity of the cover seal is reinforced by a metallic sheet or a multilayer synthetic resin sheet, so that vibration of the cover seal is prevented even if air stream in a seam between the housing body and cover acts on the cover seal from the behind. Noise can be suppressed.
    Type: Application
    Filed: February 22, 2001
    Publication date: July 26, 2001
    Applicant: Fujitsu Limited
    Inventors: Hiroyuki Iwahara, Keiji Aruga
  • Patent number: 6266284
    Abstract: A memory device is disclosed that is operated with a supply voltage (Vcc) and includes an output buffer circuit and an output buffer driver circuit. The output buffer circuit buffers data that is read out of the memory device and controls the output buffer driver circuit to generate data output signals using an external supply voltage (VccQ). The output buffer circuit controls the output buffer driver circuit with output signals generated with the supply voltage (Vcc) and an external supply voltage (VccQ). The output buffer driver circuit includes a p-channel pull-up transistor and an n-channel pull-down transistor that can be completely activated and deactivated by the output buffer circuit with the supply voltage (Vcc) and the external supply voltage (VccQ).
    Type: Grant
    Filed: September 14, 2000
    Date of Patent: July 24, 2001
    Assignees: Advanced Micro Devices, Inc., Fujitsu Limited
    Inventors: Kazuhiro Kurihara, Tien-Min Chen
  • Patent number: 6265869
    Abstract: Disclosed are a method of detecting a thermal asperity of a magnetic storage device which detects that a magnetic resistance element comes into contact with a magnetic storage medium, and a circuit thereof. This method comprises detecting an amplitude of an output of the magnetic resistance element, and creating a slice level that is m-times (m>1) as large as an output level. The slice level of an output relative value is created from the output of the magnetic resistance element, and hence the slice level having a magnitude corresponding to the output level of each magnetic resistance element can be automatically created. It is therefore feasible to accurately detect the thermal asperity of each magnetic resistance element.
    Type: Grant
    Filed: December 7, 1998
    Date of Patent: July 24, 2001
    Assignee: Fujitsu Limited
    Inventor: Yasuhiko Takahashi
  • Patent number: 6266179
    Abstract: An object is to provide an optical transmission apparatus, an optical repetition apparatus and an optical transmission method in which the chirp polarity applied to an output signal light can be modified easily in accordance with the wavelength dispersion characteristics of a transmission path. Therefore, for example, with the optical transmission apparatus according to the invention a signal light of optical frequency fsig generated by a signal light generating device, and a probe light of optical frequency fp generated by a probe light generation device are input to a four wave mixing generation device having a nonlinear optical effect to generate various signal lights with optical frequencies of fsig, fp, 2×fsig−fp and 2×fp−fsig. One of the signal lights output from the four wave mixing generation device is selected by a signal light selection device and output to the transmission path.
    Type: Grant
    Filed: September 1, 1998
    Date of Patent: July 24, 2001
    Assignee: Fujitsu Limited
    Inventor: Hiroshi Nakamoto
  • Patent number: 6266691
    Abstract: An electronic conference support system having a structure in which one main common information processing apparatus having a common display unit having a size sufficiently large for attendants to commonly look and some personal information processing apparatuses for permitting each attendant to exclusively create, display and edit information adjacent to each attendant are connected to one another to form a network communication structure through a data communication passage. When a certain attendant acquires an operation right, an information input space is displayed on the personal display unit of the attendant while permitting the attendant to input information. Information inputted to the information input space is, after completed and as an information object, displayed on the common display unit of the common information processing apparatus and the personal display units of all of the personal information processing apparatuses.
    Type: Grant
    Filed: December 3, 1996
    Date of Patent: July 24, 2001
    Assignee: Fujitsu Limited
    Inventors: Satoru Watanabe, Souichi Okada, Toshihiro Azami, Jun Kakuta, Tsuneo Katsuyama
  • Patent number: 6266301
    Abstract: Disclosed is an optical storage device for reading information from an optical storage medium by an optical head. The optical storage device comprises an optical head including a track actuator for scanning on the skew across tracks on the optical storage medium by the laser beam, and a divided-by-4 light receiving unit for receiving the laser beam from the optical storage medium, a moving motor for moving the optical head, a first signal processing unit for calculating a track error signal on the basis of an output of the divided-by-4 light receiving unit, a second signal processing unit for calculating a shift signal of the objective lens from the output of the divided-by-4 light receiving unit, and a control unit for controlling the track actuator or the moving motor by the track error signal, and controlling the track actuator or the moving motor so that the laser beam passing through the objective lens is located at the center of the objective lens.
    Type: Grant
    Filed: November 10, 1998
    Date of Patent: July 24, 2001
    Assignee: Fujitsu Limited
    Inventor: Yasuaki Morimoto