Patents Assigned to Fujitsu
-
Patent number: 6272112Abstract: In a repeating unit testing system, a first tester includes first packet transmission means for transmitting a plurality of packets, whose transmission destination address is a second repeating unit, to a first repeating unit for a fixed period of time, and line connection-disconnection log information collection means for collecting log information regarding connection and disconnection of a line from the first or second repeating unit. The first repeating unit includes line connection-disconnection means for connecting a line to a second communication network or disconnecting the line if transmission of packets is not received for more than a fixed period of time, and second packet transmission means for receiving the packets and transmitting the packets to a third port.Type: GrantFiled: April 14, 1998Date of Patent: August 7, 2001Assignee: Fujitsu LimitedInventor: Suehiro Orita
-
Patent number: 6272079Abstract: An optical head unit used for an optical disk apparatus is provided. The optical head unit includes an object glass assembly for focusing a laser beam from a light source on an optical disk, an actuator movable at least in a focus control direction, a carriage for supporting the actuator and moving the actuator in a track control direction, and a slider which is attached to the carriage and capable of adjusting its posture in relation to a surface of the optical disk. The object glass assembly is provided with a plurality of lens units. Each lens unit includes at least one lens. One of the plural lens units is supported by the slider.Type: GrantFiled: December 1, 1998Date of Patent: August 7, 2001Assignee: Fujitsu LimitedInventors: Nobuyuki Kanto, Koichi Tezuka, Haruhiko Izumi, Satoshi Shimokawa, Shingo Hamaguchi, Akihiko Makita, Kyoko Tadaki, Kazushi Uno, Goro Kawasaki
-
Patent number: 6270179Abstract: In an inkjet printing device, at least two kinds of drive waveforms are selectively fed to each of plezoelectric elements for controlling an injection amount of ink to be jetted toward a print medium via a corresponding nozzle. One of the drive waveforms is in the form of a cardiac waveform which has two voltage changing points in one drive period thereof. At the voltage changing point, a sign of slope of voltage variation is inverted. In the cardiac waveform, a voltage at one of the voltage changing points is set lower than a standby voltage, while a voltage at the other voltage changing point is set higher than the standby voltage.Type: GrantFiled: November 25, 1998Date of Patent: August 7, 2001Assignee: Fujitsu LimitedInventor: Hiroshi Nou
-
Patent number: 6272454Abstract: An RS232C driver inside target firmware controls an RS232C interface. An OS debugger steals an input to and an output from another function block that is the actual target firmware, and exchanges that input and output with the RS232C driver 1005. This configuration makes it possible to easily connect a device that executes the target firmware to, for example, a personal computer, using a general purpose RS232C interface, and makes it possible to easily obtain debugging operation using the PC side debugger.Type: GrantFiled: October 29, 1998Date of Patent: August 7, 2001Assignee: Fujitsu LimitedInventors: Sumie Morita, Shigeru Sekine, Eiji Ishioka, Tomoki Someya, Noboru Ise
-
Patent number: 6271110Abstract: First and second ball forming plates are prepared. The cavities of the first plate and the cavities of the second plate 20 are filled with solder paste, respectively. The first plate and the second plate are placed in a facing relationship to each other and heated to form metal balls each of which corresponds to the total metal components of the solder paste in one cavity of the first plate and one cavity in the second plate. The metal balls are formed in the cavities of the lower plate 10. The metal balls are transferred from the cavities of the first plate to a device on which bumps are to be formed.Type: GrantFiled: July 17, 1998Date of Patent: August 7, 2001Assignee: Fujitsu LimitedInventors: Ichiro Yamaguchi, Koki Otake, Masahiro Yoshikawa
-
Patent number: 6272225Abstract: A key recovery condition encryption apparatus includes a hashing unit, a first concatenating unit, and a condition information encryption unit. The hashing unit calculates a hash value on the basis of a hash function using a key recovery information text serving as information necessary for performing key recovery. The first concatenating unit concatenates the hash value from the hashing unit to the key recovery condition. The condition information encryption unit encrypts a concatenating result from the first concatenating unit by using a first encryption key. Also is disclosed a key recovery condition decryption apparatus for decrypting the encrypted data from the above encryption apparatus.Type: GrantFiled: July 7, 1998Date of Patent: August 7, 2001Assignees: NEC Corporation, Hitachi Limited, Fujitsu LimitedInventors: Hiroshi Miyauchi, Kazue Sako, Masashi Yamazaki, Seiichi Domyo, Hiroyoshi Tsuchiya, Seiko Kanno, Ichirou Morita, Naoya Torii, Hiroyuki Ando, Yasutsugu Kuroda
-
Patent number: 6270614Abstract: A method for fabricating a carrier tape having a row of pockets, including forming carrier tape sections by injection molding so that each of the carrier tape sections has at least one pocket for accommodating an article therein, and joining the carrier tape sections in the form of a tape. The first carrier tape section is first injection molded, and the second carrier tape section is then injection molded such that one side of the first carrier tape section is in contact with one side of the second carrier tape section. A further carrier tape section is then injection molded such that one side of the second carrier tape section is in contact with a side of the further carrier tape section, whereby the carrier tape sections are successively joined together.Type: GrantFiled: October 6, 1999Date of Patent: August 7, 2001Assignees: Fujitsu Limited, Fujitsu Takamisawa Component Ltd.Inventors: Fuminori Naito, Yukio Ando, Osamu Kanai, Kazuo Kobayashi
-
Patent number: 6271107Abstract: Bumped semiconductor substrates and methods for forming bumped semiconductor substrates are disclosed. The bumped semiconductor substrates have a polymeric layer, which can serve as a passivation layer for chips derived from the semiconductor substrate.Type: GrantFiled: March 31, 1999Date of Patent: August 7, 2001Assignee: Fujitsu LimitedInventors: Thomas Massingill, Mark Thomas McCormack, Hunt Hang Jiang
-
Patent number: 6271985Abstract: A magnetic disk device includes a base and a cover to enclose magnetic disks and magnetic heads therein. The cover has side flange portions extending downward from a top cover portion and an end flange portion extending downward from the top cover portion. The height of the end flange portion is greater than the height of the side flange portions. A bar code label can be attached to the end flange portion.Type: GrantFiled: August 6, 1998Date of Patent: August 7, 2001Assignee: Fujitsu LimitedInventor: Masato Ishikawa
-
Patent number: 6271700Abstract: A logic circuit includes a combinational circuit 11 and a sequential circuit, outputs D0 to D3 of the combinational circuit 11 are provided to the respective data inputs D of flip-flops 12 to 15 of the sequential circuit through respective multiplexers 22 to 25, and the flip-flops 12 to 15 are cascaded through the multiplexers 22 to 25 to construct a scan path. AND gates 32 to 35 are provided for preventing changes in outputs of the flip-flops 12 to 15 from being transmitted to the combinational circuit 11 when the scan mode signal *SM is active, whereby the combinational circuit 11 is kept inoperative when data is serially transferred on the scan path consisting of the D flip-flops 12 to 15, an inverter 30 and the multiplexers 22 to 25.Type: GrantFiled: September 6, 2000Date of Patent: August 7, 2001Assignee: Fujitsu LimitedInventor: Koichi Itaya
-
Patent number: 6272237Abstract: An image processing apparatus for extracting a floor region and an obstacle region from an image formed by pixels taken by a camera, includes an image dividing unit to divide the image into a plurality of regions; an arithmetic unit to calculate the absolute value of the difference between the density of each pixel of each region and a set density and to accumulate the absolute value for each region; a floor/obstacle judging portion to judge whether a target region is a floor region or an obstacle region on the basis of the result of comparison between a set value and the accumulated value of the absolute values for all the pixels within the target region or the average value of the accumulated value obtained by dividing the accumulated value by the number of pixels; and a storage portion to store the result of the floor/obstacle judging portion.Type: GrantFiled: June 11, 1996Date of Patent: August 7, 2001Assignee: Fujitsu LimitedInventor: Masayoshi Hashima
-
Patent number: 6269539Abstract: A method for fabricating a connector for coupling with a counter connector having an array of pairs of contacts therein includes providing an insulated housing having an array of openings receiving a plurality of first contact modules each having first and second isolated contacts and a second contact module having isolated first and second conducting members respectively having first and second contacts and a terminal, and a third contact and a second terminal, selectively inserted into corresponding openings of the insulating housing such that each of the respective first and second contacts of the first contact modules are connected with the corresponding contact of the counter connector while maintaining the first and second contacts electrically isolated from each other.Type: GrantFiled: July 16, 1999Date of Patent: August 7, 2001Assignee: Fujitsu Takamisawa Component LimitedInventors: Norihiro Takahashi, Fumio Kurotori, Hideo Miyazawa, Osamu Daikuhara, Kazuyuki Futaki, Hiroyuki Suzuki, Takahiro Yoshiike, Kazuhiko Ikeda
-
Patent number: 6270174Abstract: A case for electronic equipment including a main frame having an upper wall and a lower wall, an upper fit plate slidably mounted on the upper wall, and a lower fit plate slidably mounted on the lower wall. The upper wall is formed with a plurality of equally spaced ridges, and the upper fit plate is formed with a plurality of equally spaced ridges arranged with the same pitch as that of the ridges of the upper wall. Similarly, the lower wall is formed with a plurality of equally spaced ridges, and the lower fit plate is formed with a plurality of equally spaced ridges arranged with the same pitch as that of the ridges of the lower wall. The case further includes a first fit lever pivotably mounted to the main frame so as to be operatively connected to the upper fit plate, and a second fit lever pivotably mounted to the main frame so as to be operatively connected to the lower fit plate. The first fit lever and the second fit lever are pivotably and slidably connected with each other.Type: GrantFiled: December 23, 1999Date of Patent: August 7, 2001Assignee: Fujitsu LimitedInventor: Takayoshi Nishi
-
Patent number: 6271077Abstract: The present invention relates to semiconductor techniques using high dielectric oxides, more specifically to a thin film forming method for forming a thin film which is suitable as the electrodes of the oxide high dielectrics, a capacitor device using the oxide high dielectrics and a method for fabricating the same, an a semiconductor device using the capacitor device and a method for fabricating the semiconductor device. The capacitor device comprises at least one of a pair of electrodes which is formed of a material containing titanium nitride of (200) orientation. This permits the capacitor device to have good quality even in a case that the capacitor dielectric film is formed of a high dielectric thin film grown in an oxidizing atmosphere. The capacitor device includes the electrodes of titanium nitride film, whereby the electrodes can be patterned by RIE, which much improves processing precision of the electrode patterning, and throughputs.Type: GrantFiled: November 4, 1999Date of Patent: August 7, 2001Assignee: Fujitsu LimitedInventors: Masaaki Nakabayashi, Tetsuro Tamura, Hideyuki Noshiro
-
Patent number: 6272500Abstract: A device interfacer detects asynchronously occurring changes in function attributes in a device, and transmits the change attribute data to a database system. Then, a database system writes the changes to the database in a memory or an external storage device. A change point detection unit monitors the changes in the attribute record specified in the database, and asynchronously generates events for an object management software or the device interfacer corresponding to a change when any change occurs in the attribute record.Type: GrantFiled: July 18, 1997Date of Patent: August 7, 2001Assignee: Fujitsu LimitedInventor: Kiyoshi Sugita
-
Patent number: 6272069Abstract: A data signal is output from an output circuit of a first chip and sent to a data input terminal in the second chip via a data lead line based on an output clock in first chip, which is sent to the second chip. And an input circuit in a second chip receives the data signal and transfers it inside in response to a transfer clock that has been generated from the output clock in the first chip. In synchronism with a single reference clock in the first chip, therefore, a data signal can be transferred to the second chip from the first chip at a high speed.Type: GrantFiled: January 19, 2001Date of Patent: August 7, 2001Assignee: Fujitsu LimitedInventors: Hiroyoshi Tomita, Yasurou Matsuzaki, Masao Taguchi
-
Patent number: 6272537Abstract: A client-server network management system includes: a plurality of managed computer network elements, a managed element server that executes on a first computer; and at least one managed element server client that typically executes on a second computer. The managed element server and managed element server client are computer processes that execute from memory of their respective computers. The client-server network management system is really two applications in one: a visual element manager builder and a manager. The manager provides the run-time environment in which element managers are executed to monitor and manage computer network behavior such as network throughput, collision rate, and number of duplicate IP packets, to name a few. The manager portion of managed element server is independent of any graphic user interface. The logic and structure of the manager of managed element server is cleanly separated from the graphic user interfaces.Type: GrantFiled: November 17, 1997Date of Patent: August 7, 2001Assignee: Fujitsu LimitedInventors: Miodrag M. Kekic, Grace N. Lu, Eloise H. Carlton
-
Publication number: 20010010612Abstract: A negative pressure air bearing slider including a first air bearing surface formed on the bottom of the slider body at the upstream position so as to extend in the lateral direction of the slider body, and a pair of second air bearing surfaces formed on the bottom of the slider body separately from the first air bearing surface at downstream positions spaced in the lateral direction so as to define an air stream passage therebetween. The second air bearing surfaces serve to generate positive pressures that are spaced apart at downstream positions where a transducer element is embedded in the slider body, so that the slider's stiffness to rolling action can be enhanced. The cooperation of the front and rear rails enables for the creation of a higher negative pressure.Type: ApplicationFiled: March 16, 2001Publication date: August 2, 2001Applicant: Fujitsu LimitedInventors: Ryosuke Koishi, Yoshifumi Mizoshita
-
Publication number: 20010010653Abstract: The adjustment control circuit activates the first adjustment signal that adjusts the characteristic of an internal circuit in response to an adjustment signal from the exterior. The ROM circuit activates the second adjustment signal that adjusts the characteristic of the internal circuit when information to adjust the characteristics of the internal circuits is programmed. The selecting circuit outputs either of the first or the second adjustment signal in response to a control signal. The characteristics of the internal circuits are adjusted in response to either the first or the second adjustment signal. Therefore, the second adjustment signal is masked by the selecting circuit selecting the first adjustment signal. That is, at this time, the information programmed in advance in the ROM circuit is invalidated. Further, where no information is programmed in the ROM circuit, the characteristics of the internal circuits can be adjusted without programming the ROM circuit.Type: ApplicationFiled: January 31, 2001Publication date: August 2, 2001Applicant: Fujitsu LimitedInventors: Nobuyoshi Wakasugi, Yoshiharu Kato
-
Patent number: D446215Type: GrantFiled: August 4, 1999Date of Patent: August 7, 2001Assignee: Fujitsu LimitedInventors: Toru Watanabe, Takeshi Ohwe