Patents Assigned to Fujitsu
  • Publication number: 20010012748
    Abstract: Disclosed herein is a method of polishing a workpiece having a plurality of resistance elements by operating a plurality of bend mechanisms to push/pull the workpiece with respect to a polishing surface. This method includes the steps of measuring a shape of the workpiece, calculating an operational amount of each bend mechanism according to the shape measured, pressing the workpiece on the polishing surface with the bend mechanisms according to the operational amount calculated, and updating the operational amount according to a working amount of the workpiece. According to this method, magnetic heads included in the workpiece can be stably polished.
    Type: Application
    Filed: December 13, 2000
    Publication date: August 9, 2001
    Applicant: FUJITSU LIMITED
    Inventors: Shunsuke Sone, Yoshiaki Yanagida, Teruaki Nishioka, Koji Suto, Tomokazu Sugiyama
  • Publication number: 20010012652
    Abstract: A microwave monolithic integrated circuit comprises a T-shaped gate electrode including a Schottky gate electrode formed on a first region of a compound semiconductor substrate, a pair of ohmic electrodes making an ohmic contact with a surface of the substrate in the first region at respective sides of the T-shaped gate electrode, a lower capacitor electrode pattern formed on a second region of the compound semiconductor substrate with a composition substantially identical with a low-resistance, top electrode constituting the T-shaped gate electrode on the Schottky gate electrode, a dielectric film formed on the lower electrode pattern, and an upper electrode pattern formed on the dielectric film.
    Type: Application
    Filed: February 6, 2001
    Publication date: August 9, 2001
    Applicant: FUJITSU QUANTUM DEVICES LIMITED
    Inventor: Hajime Matsuda
  • Publication number: 20010011724
    Abstract: A semiconductor testing device is used for testing a semiconductor device which has at least one spherical connection terminal. The testing device includes an insulating substrate having an opening formed therein at a position corresponding to the position of the spherical connection terminal, and a contact member, formed on the insulating substrate, including a connection portion which is connected with the spherical connection terminal, at least the connection portion being deformable and extending into the opening.
    Type: Application
    Filed: April 9, 2001
    Publication date: August 9, 2001
    Applicant: FUJITSU LIMITED
    Inventors: Shigeyuki Maruyama, Kazuhiro Tashiro, Makoto Haseyama
  • Publication number: 20010012141
    Abstract: A WDM communications line is used as a trunk to which an IP network or a SONET/SDH network is connected as a tributary. Additionally, an ID for identifying each wavelength or path, which is accommodated by a WDM communications line, is assigned to a frame of each wavelength. The ID for identifying a wavelength or a path, and the number held by a transmission device that configures the path are managed. When a fault occurs, the wavelength or the path on which the fault occurs is identified, and the identified wavelength or path is displayed on the screen of a supervisory control device that monitors the entire network. An administrator can recognize at first sight the path influenced by the fault other than the point at which the fault occurs, thereby efficiently maintaining and managing the network.
    Type: Application
    Filed: December 6, 2000
    Publication date: August 9, 2001
    Applicant: FUJITSU LIMITED
    Inventors: Masaki Takai, Tohru Andoh
  • Publication number: 20010012245
    Abstract: A magnetic field generator includes a top yoke having an opening, a back yoke fixed to the top yoke, a center yoke fixed to the back yoke in such a manner as to face to the opening of the top yoke, and a coil wound around the center yoke. The opening has a straight-line shaped central portion with its gap kept constant, and both end portions with their gaps becoming larger as going outwardly from the vicinities of both end portions of the center yoke.
    Type: Application
    Filed: March 27, 2001
    Publication date: August 9, 2001
    Applicant: FUJITSU LIMITED
    Inventor: Hideki Yamaguchi
  • Publication number: 20010012573
    Abstract: A magnetic recording medium is provided which has ferromagnetic crystal grains having a uniform grain size which are successfully separated from each other. The magnetic recording medium comprises a non-magnetic substrate 1 and a recording layer 2 formed thereon, wherein the recording layer consists of at least one non-ferromagnetic material selected from the group consisting of non-magnetic materials and antiferromagnetic materials and a plurality of crystal grains 2—1 made of ferromagnetic material solid-insoluble with the non-ferromagnetic material which are dispersed in the non-ferromagnetic material. The recording layer has at least two phases, along the depth direction, with each phase having a different mean composition ratio of the ferromagnetic material to the non-ferromagnetic material from that or those of the adjacent phase or phases.
    Type: Application
    Filed: December 8, 2000
    Publication date: August 9, 2001
    Applicant: FUJITSU LIMITED
    Inventors: Isatake Kaitsu, Hisateru Sato, Iwao Okamoto
  • Publication number: 20010011911
    Abstract: An input buffer circuit includes a differential amplifier that receives a input signal and its complement and generates an amplified signal corresponding to the voltage difference between the input signal and its complement. A transfer circuit receives the input signal and generates a transfer signal having the same logical value as the input signal. A control circuit connected to the differential amplifier and the transfer circuit selects one of the amplified signal and the transfer signal for output by enabling either the differential circuit or the transfer circuit.
    Type: Application
    Filed: March 20, 2001
    Publication date: August 9, 2001
    Applicant: FUJITSU LIMITED
    Inventor: Masahito Isoda
  • Publication number: 20010011898
    Abstract: An IC to be tested having solder bumps is mounted on an IC socket mounted on a test board. The IC socket is provided with a contact unit including a plurality of straight contact pins each having an lower end connected to the test board and an upper end connected to the solder bumps and also including an elastic member for supporting the plurality of contact pins. A diameter of the plurality of contact pins is configured to be sufficiently small for the plurality of contact pins to pierce the respective solder bumps so that an electrical connection is established by the upper end of each of the plurality of solder bumps piercing an associated one of the solder bumps.
    Type: Application
    Filed: March 16, 2001
    Publication date: August 9, 2001
    Applicant: Fujitsu Limited
    Inventors: Makoto Haseyama, Shigeyuki Maruyama, Masataka Mizukoshi, Futoshi Fukaya
  • Publication number: 20010012267
    Abstract: A redundant structure control device for an exchange having an (N+1) redundant structure, capable of separately dealing with trouble that has happened at any line and trouble that has happened at any line interface device, in an ATM exchange having a redundant structure. When line trouble monitoring means detects line trouble, routing control means arranges frame tag attaching means so that a frame coming from a line interface device originally connected with a line at which trouble has happened toward the line at which trouble has happened may be sent out to a spare line.
    Type: Application
    Filed: November 30, 2000
    Publication date: August 9, 2001
    Applicant: FUJITSU LIMITED
    Inventor: Yoshihiro Watanabe
  • Publication number: 20010012169
    Abstract: Disclosed herein is a magnetic tape unit having a magnetic head for reading and writing data from and onto a magnetic tape. The magnetic tape is traveled in contact with the magnetic head during a read/write operation of the magnetic head. During a rest period where the read/write operation of the magnetic head is not performed, a reciprocating motion of the magnetic tape by a small distance is performed with a predetermined period. A temperature in the vicinity of the magnetic head is detected by a temperature sensor. The predetermined period is changed according to the temperature detected by the temperature sensor. Accordingly, the adhesion of the magnetic tape to the magnetic head can be well prevented irrespective of the temperature inside the tape unit.
    Type: Application
    Filed: August 25, 1997
    Publication date: August 9, 2001
    Applicant: FUJITSU LTD.
    Inventors: MASAYOSHI KOBAYASHI, KEISUKE HOSHINO, MASARU OHSHITA, AKIRA TAKANO, MAKOTO SASAKI, MAKOTO MATSUDA, TOSHIHIKO FUJII
  • Publication number: 20010012227
    Abstract: Sense amplifiers provided in a same bank are divided into groups, the sense amplifiers in each group are connected to a common power supply wiring for the sense amplifier which is independent by the group, and the power supply wiring for the sense amplifier of each group is connected to a power supply circuit which is independent so that the ratio of the activated sense amplifiers to the driven power supply circuits is equalized in a reading-out/writing-in operation in which at least one sub-block in the bank is activated and a refreshing operation in which the sub-blocks are concurrently activated, which makes it possible to prevent an insufficiency/excess of a driving capacity of overdrive, without providing a special controlling circuit separately.
    Type: Application
    Filed: January 31, 2001
    Publication date: August 9, 2001
    Applicant: FUJITSU LIMITED
    Inventor: Koichi Nishimura
  • Publication number: 20010013042
    Abstract: An information retrieval system comprises a storage section that stores location information about information selected by a user as a document location information database, an analyzer section that analyzes frequency of utilization of each location information in the document location information database, a retrieval information accumulating section that accumulates information in a predetermined accumulation range on an accumulation base point corresponding to location information having the frequency of utilization equal to or more than a threshold value, as a retrieval information database, and a retrieval section that retrieves required information from a retrieval information database based on a retrieval condition designated by the user.
    Type: Application
    Filed: November 29, 2000
    Publication date: August 9, 2001
    Applicant: Fujitsu Limited
    Inventor: Hidenori Sekine
  • Publication number: 20010011916
    Abstract: A clock signal generator which is particularly useful for a double data rate SDRAM (DDR-SDRAM) includes two or more clock signal input buffers and an enable signal input buffer. The clock signal generator generates internal clock signals that fluctuate at substantially different timings, yet the relationship between the internal clock signals with respect to validation and invalidation timing is constant. A latch circuit latches an enable signal from the enable signal buffer in accordance with a first internal clock signal from a first one of the clock signal buffers. A first enable signal connected to the latch circuit holds the latched enable signal in accordance with the first internal clock signal. A second enable circuit receives the first enable signal and the first internal clock signal and generates a second enable signal used to activate the clock signal buffers.
    Type: Application
    Filed: April 5, 2001
    Publication date: August 9, 2001
    Applicant: Fujitsu Limited
    Inventors: Hiroko Douchi, Hiroyoshi Tomita
  • Publication number: 20010011772
    Abstract: A semiconductor device has a resin package layer on a principal surface of a semiconductor chip, on which a number of bump electrodes are formed, wherein the semiconductor device has a chamfer surface or a stepped surface on a top edge part such that the external shock or stress applied to such an edge part is dissipated by the chamfer surface of the stepped surface.
    Type: Application
    Filed: September 25, 1998
    Publication date: August 9, 2001
    Applicant: FUJITSU LIMITED
    Inventors: NORIO FUKASAWA, HIROHISA MATSUKI, KENICHI NAGASHIGE, YUZO HAMANAKA, MUNEHARU MORIOKA
  • Publication number: 20010012290
    Abstract: A data input circuit converts input serial data to n-bit parallel data, and outputs the n-bit parallel data by following an address signal. The data input circuit includes a data shifting unit including a plurality of columns, and sequentially shifting the input serial data through the plurality of columns; and a selection unit selecting a column among the plurality of columns as an input column by following the address signal, wherein the input serial data is inputted to the data shifting unit through the input column. Thus, the data input device can speed up its processing speed with a simplified circuit structure whose circuit size is reduced.
    Type: Application
    Filed: February 7, 2001
    Publication date: August 9, 2001
    Applicant: FUJITSU LIMITED
    Inventor: Kazuyuki Kanazashi
  • Publication number: 20010012230
    Abstract: A semiconductor memory device, which refreshes memory cells to retain data, has a first refresh mode and a second refresh mode. The first refresh mode is a mode for refreshing all of the memory cells, and the second refresh mode is a mode for refreshing a part of the memory cells. By refreshing only designated areas where data must be retained, power consumption in a refresh operation can be reduced, drastically cutting power consumption in a power-down mode.
    Type: Application
    Filed: April 10, 2001
    Publication date: August 9, 2001
    Applicant: Fujitsu Limited
    Inventors: Yoshihiro Takemae, Yasurou Matsuzaki
  • Patent number: 6271739
    Abstract: A surface acoustic wave device supported by a package body. At least one surface acoustic wave element having interdigital electrodes disposed on a propagation path of a surface acoustic wave on the piezoelectric substrate. These interdigital electrodes include an input-side interdigital electrode connected to a ground pad on the package body and an output-side interdigital electrode connected to another ground pad on the package body.
    Type: Grant
    Filed: July 30, 1999
    Date of Patent: August 7, 2001
    Assignee: Fujitsu Limited
    Inventors: Masanori Ueda, Gou Endoh, Osamu Kawachi, Yoshiro Fujiwara
  • Patent number: 6271945
    Abstract: An apparatus and method for controlling power levels of individual signal lights of a wavelength division multiplexed (WDM) signal light. The apparatus includes an optical fiber, a coupler and a controller. The WDM signal light travels through the optical fiber. The WDM signal light includes a plurality of individual signal lights which each have a corresponding power level. The coupler decouples a portion of the WDM signal light from the optical fiber. The controller determines the spectrum of the WDM signal light from the decoupled portion and controls the power levels of the plurality of individual signal lights in accordance with the determined spectrum. More specifically, the controller can control the relative power levels of the plurality of individual signal lights with respect to each other. In addition, the controller can control the power levels of the plurality of individual signal lights to perform preemphasis on the WDM signal light.
    Type: Grant
    Filed: September 14, 1999
    Date of Patent: August 7, 2001
    Assignee: Fujitsu Limited
    Inventor: Takafumi Terahara
  • Patent number: 6271583
    Abstract: A semiconductor device includes a substrate having a first surface, a second surface and at least one conductor part which are exposed at both the first and second surfaces of the substrate, a semiconductor chip provided on the first surface of the substrate and having a plurality of electrode pads, a plurality of leads, a plurality of bonding-wires electrically connecting the leads and the conductor parts to corresponding ones of the electrode pads of the semiconductor chip, and a resin package encapsulating the semiconductor chip, a part of the leads, and the substrate so that the conductor parts are exposed at the second surface of the substrate.
    Type: Grant
    Filed: June 16, 1998
    Date of Patent: August 7, 2001
    Assignee: Fujitsu Limited
    Inventors: Hideharu Sakoda, Yoshiyuki Yoneda, Kazuto Tsuji
  • Patent number: 6272510
    Abstract: In a correlation arithmetic system adapted to detect a relative difference between two functions, an operation is simplified. This makes it possible to perform the operation with a small scale of hardware and also with great accuracy. There is adopted an operation g*h instead of the “product” in the correlation arithmetic operation. There is disclosed an arithmetic unit in which two numeral values a and b are inputted, and the two numerical values a and b are subjected to a predetermined operation process, so that a numerical value c representative of an operation result is derived. The arithmetic unit has an absolute value operation unit for evaluating an absolute value |c| of the numerical value c, and a sign operation unit for evaluating a sign “sign (c)” of the numerical value c.
    Type: Grant
    Filed: January 25, 1999
    Date of Patent: August 7, 2001
    Assignee: Fujitsu Limited
    Inventors: Susumu Kawakami, Hiroaki Okamoto, Motomu Takatsu