Patents Assigned to Fujitsu
  • Patent number: 6263494
    Abstract: In a parallel processor, a local area and an overlap area are assigned to the memory of each processing element (PE), and each PE makes calculations to update the data in both areas at the runtime. If the data in the overlap area is updated in processes closed in the PEs, the data transfer between adjacent PEs can be reduced and the parallel processes can be performed at a high speed.
    Type: Grant
    Filed: February 20, 1998
    Date of Patent: July 17, 2001
    Assignee: Fujitsu Limited
    Inventor: Tatsuya Shindo
  • Patent number: 6262694
    Abstract: An image display system includes an image dividing unit for dividing an input image into a plurality of images based on varying distances from an image pickup position, and a plurality of display units, successively arranged at different distances from an observation position, for displaying the plurality of images divided in the image dividing unit, where the plurality of images divided in the image dividing unit are displayed on corresponding display units of the plurality of display units corresponding to the distances from the image pickup position.
    Type: Grant
    Filed: October 22, 1997
    Date of Patent: July 17, 2001
    Assignee: Fujitsu Limited
    Inventors: Manabu Ishimoto, Satoshi Iwata, Takahiro Matsuda, Hirokazu Aritake, Masato Nakashima
  • Patent number: 6263281
    Abstract: A GPS positioning apparatus includes an input section which inputs known point position information, approximation section which approximates pieces of pseudo distance information acquired at a known point by a GPS receiver as coefficient information, and a positioning processor which acquires a plurality of pseudo distances at an unknown point from the GPS receiver and predicts a plurality of pseudo distance prediction values at the known point on the basis of the coefficient information. The positioning processor calculates the position of the unknown point from the known point position information, the plurality of pseudo distances at the unknown point and the plurality of pseudo distance prediction values.
    Type: Grant
    Filed: February 11, 2000
    Date of Patent: July 17, 2001
    Assignee: Fujitsu Limited
    Inventors: Yousuke Yamamoto, Masaru Yambe
  • Patent number: 6262366
    Abstract: An arrangement for locking first and second housings, adapted to connect to each other, includes a pin provided on the first housing and a locking member, with a pair of arms which are provided on the second housing to engage and hold the pin when the first and second housings are connected.
    Type: Grant
    Filed: April 6, 1998
    Date of Patent: July 17, 2001
    Assignee: Fujitsu Limited
    Inventors: Toshiyuki Ichikawa, Masanori Ohkawa, Hiroshi Watanuki, Kozo Yamazaki
  • Patent number: 6262973
    Abstract: When a wireless channel fails, a working signal and a protection signal are synchronized and switching is performed without instantaneous disconnection. Each working unit of a plurality of working units is provided with a wireless-channel failure detector for detecting a failure that has occurred in a working wireless channel; a synchronization detecting circuit for detecting synchronization between a working wireless channel and a protection wireless channel; a changeover switch for selecting a signal from either the protection wireless channel or a working wireless channel without instantaneous disconnection; and a unit failure detector for detecting a failure that requires switching of a unit. When a failure develops in a wireless channel and a working wireless channel and the protection wireless channel are synchronized, a radio protection switching device controls the changeover switch to switch between working and protection wireless channels without instantaneous disconnection.
    Type: Grant
    Filed: October 2, 1998
    Date of Patent: July 17, 2001
    Assignee: Fujitsu Limited
    Inventors: Yuji Shiraishi, Ichiro Ayukawa, Kimihiko Yoshimura, Hisamichi Hazama, Kimio Watanabe, Shingo Mizuno, Tadayuki Sakama
  • Patent number: 6263112
    Abstract: A motion vector data storage device (e.g., a memory) for storing motion vector data is newly provided for reducing a quantity of reference picture data to be read from a frame memory when searching a motion vector. A forward motion vector search used for a forward prediction in a vector searching process for coding a B-picture is performed asynchronously with a coding process, and accessing to the frame memory is thereby dispersed. Data for narrowing down a motion vector search range in a P-picture can be obtained at the same time.
    Type: Grant
    Filed: May 30, 1997
    Date of Patent: July 17, 2001
    Assignee: Fujitsu Limited
    Inventors: Hideaki Watanabe, Kiyoshi Sakai
  • Patent number: 6263015
    Abstract: An analog/digital integrated subscriber circuit includes a power supply part supplying power with respect to a subscriber line, and a signal processing part carrying out a signal processing. The power supply part is provided with a D.C./D.C. converter which controls an ON-time of a switching by detecting an output voltage and an output current supplied to the subscriber line. The D.C./D.C. converter includes a switching mechanism for switching a power supply characteristic of the power supply part to a constant current characteristic up to a maximum output voltage when supplying the power with respect to a digital subscriber line and to a constant voltage characteristic having a voltage lower than the maximum output voltage when supplying the power with respect to an analog subscriber line.
    Type: Grant
    Filed: October 30, 1997
    Date of Patent: July 17, 2001
    Assignee: Fujitsu Limited
    Inventors: Yutaka Awata, Seiji Miyoshi, Minoru Hirahara, Takuo Gotoda, Hiroaki Itokawa
  • Patent number: 6262930
    Abstract: To reduce current consumption, there is provided a circuit for each bank, comprising selection circuits 26 through 28 each for selecting either a normal supply voltage Vii or a higher supply voltage Vjj as a supply voltage VH0 in response to a selection control signals SC0 and *SC0, a selection control circuit 22 for generating the signals SC0 and *SC0 to make the selection circuits select Vii when a bank activation signal BRAS0 is inactive and Vjj for a predetermined period in response to activation of BRAS0, and sense amplifier driving circuits 111 through 113 for supplying the ground voltage and VH0 to the sense amplifier rows in response to activation of sense amplifier control signals. To stabilize the output voltage Vii of the power supply circuit having a NMOS transistor, the drain electrode, gate and source electrodes of which are at VCC, VG and approximately Vii=VG−Vth, where Vth is the threshold voltage of the NMOS transistor 45, a leak circuit is employed.
    Type: Grant
    Filed: July 7, 2000
    Date of Patent: July 17, 2001
    Assignee: Fujitsu Limited
    Inventors: Kaoru Mori, Masato Matsumiya, Ayako Kitamoto, Shinichi Yamada, Yuki Ishii, Hideki Kanou, Masato Takita
  • Patent number: 6261741
    Abstract: A photosensitive heat-resistant resin composition contains a polyamideimide resin, an organic solvent for dissolving the polyamideimide, an acrylic monomer or oligomer having at least two polymerizable double bonds, and a photoreaction initiator for initiating polymerization of the acrylic monomer or oligomer by photochemical reaction. The resin composition may be used to make a heat-resistant insulating film which may be patterned by selective irradiation of ultraviolet rays. The insulating film may be interposed between different conductor layers in a build-up multilayer circuit board.
    Type: Grant
    Filed: November 25, 1998
    Date of Patent: July 17, 2001
    Assignee: Fujitsu Limited
    Inventors: Motoaki Tani, Nobuyuki Hayashi, Hiroyuki Machida
  • Patent number: 6263070
    Abstract: A telephone including a case; an operation part, located at a front of the case, having a light transmission property and a plurality of key tops arranged on a front surface thereof; a circuit substrate, provided inside the case and having a sheet-luminescent-member driving circuit; and a sheet luminescent member, provided at a rear of the operation part, between the circuit substrate and the case. Light emitted by the sheet luminescent member fully illuminates each key top from the rear surface thereof.
    Type: Grant
    Filed: March 29, 1996
    Date of Patent: July 17, 2001
    Assignee: Fujitsu Limited
    Inventors: Hiroshi Kubo, Hidekatsu Kobayashi, Masashi Tomura
  • Patent number: 6262828
    Abstract: An apparatus includes a driving voltage generator that generates a pulse driving voltage having a rising edge and a decaying edge. An optical modulator produces a first pulse at the rising edge of the pulse driving voltage and a second pulse at the decaying edge of the pulse driving voltage. Therefore, the first and second pulses are both produced from a single driving pulse voltage. The frequency of the first pulse is determined by the slope of the rising edge of the pulse driving voltage and the frequency of the second pulse is determined by the slope of the decaying edge of the pulse driving voltage. The first and second pulses are transmitted through a transmission line. A detection device detects the first and second pulses after being transmitted through the transmission line.
    Type: Grant
    Filed: February 25, 1999
    Date of Patent: July 17, 2001
    Assignee: Fujitsu Limited
    Inventors: Yuichi Akiyama, George Ishikawa, Hiroki Ooi, Shigeki Watanabe
  • Patent number: 6263325
    Abstract: A system for executing a learning algorithm for solving an optimization problem of an evolutionary algorithm, etc. In this system, a learning algorithm executing device and a terminal device are interconnected by a network. In the terminal device, a change of an execution process of the learning algorithm may be set during the execution of the learning algorithm. In the learning algorithm executing device, the execution of the learning algorithm is continued according to the change of the execution process, which is set in the terminal device. As the change of the execution process of the learning algorithm, an execution condition of the learning algorithm is changed during its execution, or a visual or numerical change is made to an object representing the progress state of the execution of the algorithm on a display screen, in the terminal device.
    Type: Grant
    Filed: September 29, 1998
    Date of Patent: July 17, 2001
    Assignee: Fujitsu Limited
    Inventors: Yukiko Yoshida, Nobue Adachi
  • Patent number: 6262827
    Abstract: A galvano-mirror includes a mirror substrate provided with a frame, a mirror element and torsion bars rotatably connecting the mirror element to the frame. The mirror element is provided with a body having an obverse surface and a reverse surface. A mirror surface is formed on the obverse surface, while first electrodes are formed on the reverse surface. The galvano-mirror also includes an electrode substrate provided with second electrodes arranged in facing relation to the first electrodes. The electrode substrate is formed with a through-hole extending through a thickness thereof and facing the mirror element.
    Type: Grant
    Filed: April 27, 2000
    Date of Patent: July 17, 2001
    Assignee: Fujitsu Limited
    Inventors: Satoshi Ueda, Hisao Okuda
  • Patent number: 6262924
    Abstract: A semiconductor memory device is provided with terminals for receiving a chip enable signal and an address signal, an internal circuit, and an internal control signal generating circuit for generating a predetermined internal control signal which makes an output timing of the semiconductor memory device same regardless of a level of the address signal when the chip enable signal undergoes a transition from an inactive level to an active level. The internal circuit is deactivated in response to the inactive level of the chip enable signal and is activated in response to the active level of the chip enable signal.
    Type: Grant
    Filed: December 1, 1999
    Date of Patent: July 17, 2001
    Assignee: Fujitsu Limited
    Inventors: Yutaka Fukutani, Tomohiro Nakayama, Seizi Hirayama, Waichiro Fujieda, Arayama Youji, Atsushi Fujii, Yoshitaka Takahashi, Masanori Nagasawa, Masakazu Kimura, Tutomu Taniguti, Hiroyuki Fujimoto
  • Patent number: 6262494
    Abstract: A battery unit includes a plurality of cells connected in parallel with one another, and a switch connected in series with at least one of the cells. The battery unit further includes a control circuit for controlling the on or off state of the switch, and a voltage detection terminal at which a voltage produced by a cell, to which the switch is connected, is developed. The switch can be turned off even with the battery unit connected to a load. A cell in series with which the switch is connected is disconnected from the load. In this state, the state of the cell can be detected through the voltage detection terminal. Even when a resistor is substituted for the switch, the same advantage can be provided. Moreover, the battery unit is freely detachably attached to a main unit of an information processing apparatus. The battery unit then supplies power to the main unit. A power supply control circuit for requesting notification of the state of each cell in the battery unit is incorporated in the main unit.
    Type: Grant
    Filed: December 28, 1998
    Date of Patent: July 17, 2001
    Assignee: Fujitsu Limited
    Inventors: Toshiaki Tsukuni, Yoshiro Takeda, Mitsuo Saeki, Hidekiyo Ozawa
  • Patent number: 6262862
    Abstract: A cartridge transferring robot for use in a library apparatus includes a pair of upper and lower hand members made to vertically come into contact with a cartridge to grip the cartridge, a pair of left and right direct-acting beatings for fitting the hand members to a hand base so that they are vertically slidable, and an opening and closing mechanism for making the hand members take opening and closing actions. The hand members are independently guided by the direct-acting bearings, and the fitting portions of the hand members to the direct-acting bearings are made not to interfere with each other in a state where the hand members are in a closed condition. This invention is applicable to a library apparatus storing a large number of cartridges such as magnetic tape cartridges and optical disk cartridges.
    Type: Grant
    Filed: March 2, 1998
    Date of Patent: July 17, 2001
    Assignee: Fujitsu Limited
    Inventors: Chikatsu Kato, Hiroshi Shibuya, Nobuhiko Motoyama, Daisuke Hori
  • Patent number: 6262858
    Abstract: A magnetic disk device reproduces information from a magnetic disk by using a magneto-resistive head. The magnetic disk device includes a temperature detecting unit which detects an ambient temperature. A sense current control unit controls a sense current based on the ambient temperature detected by the temperature detecting unit, the sense current being supplied to the magneto-resistive head to detect a change of a resistance of the magneto-resistive head for the magnetic disk in a magnetic field.
    Type: Grant
    Filed: June 26, 1998
    Date of Patent: July 17, 2001
    Assignee: Fujitsu Limited
    Inventors: Hiroshi Sugiyama, Katsumi Kiuchi
  • Patent number: 6262949
    Abstract: A multilayer resonance device of the invention includes regularly stacked layers each formed by alternately stacking a magnetic substance and a dielectric substance with thickness regularity, and an irregular layer including a magnetic substance, having a thickness disaccording with the thickness regularity and disposed between the regularly stacked layers. Thus, the multilayer resonance device can attain a large Faraday rotation angle, a large magneto-optical effect, and a practical total layer thickness.
    Type: Grant
    Filed: June 16, 1998
    Date of Patent: July 17, 2001
    Assignee: Fujitsu Limited
    Inventors: Mitsuteru Inoue, Kenichi Arai, Toshitaka Fujii, Masanori Abe, Koji Matsumoto
  • Patent number: 6261357
    Abstract: A coating liquid for forming a low-permittivity silica film, which is capable of forming an insulating film that has a relative permittivity as low as up to 3 and is excellent in adherence to a substrate surface, mechanical properties, chemical resistance such as alkali resistance and also crack resistance, and which is capable of smoothing the irregularities of a substrate surface to a satisfactorily high degree, is provided. Further, a substrate comprising this low-permittivity silica coating film is provided.
    Type: Grant
    Filed: September 23, 1998
    Date of Patent: July 17, 2001
    Assignees: Catalysts & Chemicals Industries Co., Ltd., Fujitsu Limited
    Inventors: Miki Egami, Akira Nakashima, Michio Komatsu
  • Patent number: 6262614
    Abstract: There is disclosed an electronic circuit comprising a clock driver for generating a clock signal, a clock line on which the clock signal generated by said clock driver is transmitted, a shield-cum-signal line extending along said clock line serving optionally for transmission of a predetermined signal and for shielding of a noise generated from said clock line in accordance with a mode, a transfer gate for transferring a transmitted signal to said shield-cum-signal line, said transfer gate turning on or off in accordance with a mode, and a transistor disposed between said shield-cum-signal line and a power source, said transistor turning on when said transfer gate turns off and turning off when said transfer gate turns on in accordance with a mode.
    Type: Grant
    Filed: February 15, 2000
    Date of Patent: July 17, 2001
    Assignee: Fujitsu Limited
    Inventor: Mitsuru Sasaki