Abstract: A scanning controller, a scanning apparatus and a method for performing the scanning controller are disclosed herein. The scanning controller includes an image data processing unit, a memory control unit, a dummy line control unit, a buffer condition control unit, a motor condition control unit, a motor controlling unit and a relation control unit. Based on at least one of several predetermined contrastive relationships among each stored data amount with regard to an image buffer and its corresponding motor move timing, the relation control unit controls generation of a motor move timing from the motor controlling unit to drive a motor with variance of a scanned data generation rate and simultaneously enable determination of the dummy line control unit on which part of scanned image data should be skipped by catching of the image data processing unit.

Abstract: Generating a virtual CD recorder by using a storage device is proposed. The storage device includes a first data sector for storing auto-run data and a second data sector for storing table of content (TOC) information data. When the storage device is connected to a host, a detecting module of the host detects whether the TOC information data exists in the second sector. When the TOC information data exists or could be accessed, a reading module can read a first disc image file based on the TOC information data. A burning module can record data into a second disc image file and update the TOC information data associated with the second disc image file in the second sector.

Abstract: An accelerated access apparatus and reading and writing methods thereof are described. A processing unit is used to determine whether the continuation state of a plurality of first address parameters of first request signals. Each first request signal has a first address length. When the first address parameters are continuous thereamong, the processing unit converts one of the second request signals into a second reading command which has a second reading address and a second reading address length. The second reading address length is greater than one of the first address lengths. The processing unit executes the second reading command to read data content to be stored in a buffer unit based on the second reading address and the second reading address length for responding to the second request signals.

Abstract: A management method for reducing the utilization rate of random access memory (RAM) while reading data from or writing data to the flash memory is disclosed. A physical memory set is constructed from a plurality of physical memory blocks in the flash memory. A logical set is constructed from a plurality of logical blocks wherein the data stored in the logical set are stored in the physical memory set. Further, the data stored in each of the logical blocks are stored in one number of physical memory blocks. A mapping table is constructed and includes a hash function, a logical set table, a physical memory set table, and a set status table for managing the relationship among the physical memory sets, physical memory blocks, and logical blocks while reading data from or writing data to the flash memory.

Abstract: A scanning controller, a scanning apparatus and a method for performing the scanning controller are disclosed herein. The scanning controller includes an image data processing unit, a memory control unit, a dummy line control unit, a buffer condition control unit, a motor condition control unit, a motor controlling unit and a relation control unit. Based on at least one of several predetermined contrastive relationships among each stored data amount with regard to an image buffer and its corresponding motor move timing, the relation control unit controls generation of a motor move timing from the motor controlling unit to drive a motor with variance of a scanned data generation rate and simultaneously enable determination of the dummy line control unit on which part of scanned image data should be skipped by catching of the image data processing unit.

Abstract: A dynamic power management system for USB hub and method thereof are described. The dynamic power management system includes a host device, a power unit and a hub device. A power management module disposed in the hub device dynamically adjusts the power-supplying statuses of ports in the hub device and further reduces the cost of power transformer externally connected to the hub device.

Abstract: A scanning apparatus having dual power mode is described. The scanning apparatus includes a detection module, a switch unit, and a power controller. The detection module detects a first voltage signal and a second voltage signal for generating a detecting signal. The switch unit receives the commands from the power controller for outputting the first voltage signal and/or the second voltage signal to the image acquiring device of the scanning apparatus. The power controller determines whether the first voltage signal is detected according to the detecting signal. While the first voltage signal is detected, the power controller controls the switch unit to output the first voltage signal and/or the second voltage signal to the image acquiring device. While the first voltage signal is not exist, the power controller controls the switch unit to output the second voltage signal to the image acquiring device.

Abstract: A scanning system having a brightness compensation apparatus and method thereof are described. The brightness compensation apparatus includes a statistics window control unit, a brightness statistics logic unit, and a comparing logic unit. The statistics window control unit sets a statistics window setting area. The brightness statistics logic unit generates the current brightness statistics data corresponding to the current page. The comparing logic unit compares the current brightness statistics data with brightness target value to determine whether the brightness compensation apparatus compensates the brightness of next page based on the comparison result and/or image gain of the current page for adjusting the brightness of the scanning system according to the compared result between the brightness statistic data and the brightness target value.

Abstract: A flash memory system and managing and collecting methods for flash memory with invalid page messages thereof are described. When the valid data pages of the flash memory are changed to invalid data pages, a recording area is used to record the message of the invalid data pages to effectively collect the occupied space of the invalid data pages in the flash memory. Further, while garbage collecting step is performed, a block is rapidly selected according to the message of the recording area and the valid data pages in the selected block are correctly identified, copied and removed.

Abstract: A scanning system having a brightness compensation apparatus and method thereof are described. The brightness compensation apparatus includes a statistics window control unit, a brightness statistics logic unit, and a comparing logic unit. The statistics window control unit sets a statistics window setting area. The brightness statistics logic unit generates the current brightness statistics data corresponding to the current page. The comparing logic unit compares the current brightness statistics data with brightness target value to determine whether the brightness compensation apparatus compensates the brightness of next page based on the comparison result and/or image gain of the current page for adjusting the brightness of the scanning system according to the compared result between the brightness statistic data and the brightness target value.

Abstract: A display device using a surface capacitive touch panel is proposed. Upon a normal mode, an external clock generator supports a clock source; meanwhile, an external clock generator, a signal generator, a current detector, a current-to-voltage converter, an analog-to-digital converter, a filter, an interface controller, a microprocessor, and the touch-position calculators are turned on. But under a power-down mode, the external clock generator, the analog-to-digital converter, filter, the interface controller, the microprocessor, and the touch-position calculators are turned off in order to reduce power consumption. Furthermore, the external clock generator is also turned off to minimize the power consumption.

Abstract: A data access apparatus and a processing system using the same are disclosed herein, which can be a power-off status to permit its storage media being accessible by another processing system. When a bus signal switching and conversion unit receives a first-level control signal, the storage media is permitted to electrically connect only with a first bus channel and to perform a conversion between a first and second bus interface formats to the accessed data and to supply a system power based on a first power signal from the processing system to the storage media. When the bus signal switching and conversion unit receives the second-level control signal, the storage media is permitted to electrically connect only with a second bus channel and to perform a conversion between a second and third bus interface formats to the accessed data, and to supply a system power based on a second power signal from the another processing system to the storage media.

Abstract: An integrated data accessing system having control apparatus for multi-directional data transmission is described. The integrated data accessing system includes a control apparatus, a plurality of communication interface engines. The control apparatus includes a plurality of bi-directional transmission modules, a control unit, a multi-directional transferring engine, and a memory unit. The control unit detects a source storage and a target storage. The multi-directional transferring engine selectively transfers the data content among storage units. The multi-directional transferring engine includes a first switch module, a second switch module, and a data buffer. The first switch module switches to the first bi-directional transmission module to select the source storage. The second switch module switches to the second bi-directional transmission module to select the target storage. The data buffer stores the data content transmitted from the source storage and the target storage.

Abstract: A hand-held scanning system and method thereof are described. A look-up table is created to generate a mapping relation between a plurality of reference amplitudes and a plurality of corresponding sampled positions. An analog-to-digital converter samples an analog signal and converts it into a digital signal. The digital signal represents a mapping relation between the sampled positions of the movement distance and the corresponding scanning amplitudes of the signal intensity. The hand-held scanning system ascertains the sampled positions corresponding to a former scanning amplitudes and a present scanning amplitudes according to the look-up table during the scanning stage for detecting the position variation status to determine whether the trigger signal is activated for image scanning or not.

Abstract: A junction box for connecting a power supply unit is disclosed. The junction box includes a first connection terminal, a second connection terminal, a serial carrier interface module, and a control module. The first connection terminal and the second terminal are utilized to connect the junction box and another junction box in a serial connection. The serial carrier interface module is electrically coupled to the first connection terminal and the second connection terminal for the transmission of a carrier and a DC power, which is provided from the power supply unit. The control module is electrically coupled to the serial carrier interface module for receiving the carrier and for controlling of the transmission of the DC power according to the carrier. A power system which employs the junction boxes and a method for controlling the power system are also disclosed.

Abstract: A detection method of low frequency handshaking signal is described. The method includes the following steps of: (a) performing first impedance calibration when host device is activated for sending a first low frequency signal based on the first impedance calibration and performing a second impedance calibration when a controlled device is activated for sending a second low frequency signal based on the second impedance calibration; (b) transmitting a first high frequency training signal from the host device to the second receiver of the controlled device when the first low frequency signal and the second low frequency signal are in a predetermined condition; and (c) transmitting a second high frequency training signal from the controlled device to the first receiver of the host device wherein the frequency of the first low frequency signal and the second low frequency signal is smaller than the frequency of the first high frequency training signal and the second high frequency training signal.

Abstract: A flash memory controller includes a control unit, a buffer, an error correction code (ECC) module, and a configuring unit. The flash memory has a data area for storing the data content and a first spare area for storing a first ECC value corresponding to the data content. The ECC module utilizes the data content for generating a second ECC value and comparing the second ECC value with the first ECC value to determine whether the data content comprises a plurality of errors. The configuring unit computes the amount of the errors to determine whether the amount of the errors exceeds a predetermined threshold. If The configuring unit configures the data area and assigns a portion of the data area to be a second spare area. The first and the second spare area are associated with the ECC capability to allow the ECC module to correct the errors.

Abstract: A serial bus clock frequency calibration system and a method thereof are disclosed herein. The system utilizes a first frequency calibration device and a second frequency calibration device both to share an oscillator as so to perform two-stage clock frequency resolution calibrations for generating different frequency-tuning ranges. This can bring an optimal frequency resolution and greatly reduce system complexity and save element cost.

Abstract: A transceiver system having a phase and frequency locked architecture is described. The transceiver system includes a clock and data recovery type receiver, a frequency divider and a transmitter. The clock and data recovery type receiver receives an external signal from a host unit and extracts the external signal to generate a clock signal and a data signal. The frequency divider is used to divide the frequency of the clock signal for generating a reference clock signal. The transmitter transmits output data content based on the reference clock signal.

Abstract: A clock-synchronized method for universal serial bus (USB) is described. The method includes the following steps of: (a) a transmitter sends a periodic signal to a host unit during a first time interval; (b) the host unit transmits a first equalization training sequence signal to a receiver during a second time interval to train the receiver and the transmitter continuously sends the periodic signal to the host unit; (c) a clock and data recovery device extracts the first equalization training sequence signal during the second time interval to generate a extracted clock signal and a data signal; and (d) the transmitter sends a second equalization training sequence signal to the host unit based on the extracted clock signal during the third time interval to train the host unit and the receiver and the transmitter commonly utilize the extracted clock signal as a reference clock.