Abstract: A transmission gate circuit includes a first PMOS device, a first NMOS device, a second PMOS device, a second NMOS device, and a third transistor. A gate electrode, a first electrode and a second electrode of the first PMOS device are coupled to a first control signal, an input end, and an output end, respectively. A gate electrode, a first electrode and a second electrode of the first NMOS device are coupled to a second control signal, the input end, and the output end, respectively. A gate electrode, a first electrode and a second electrode of the second PMOS device are coupled to the first control signal, an input end, and a body electrode of the first PMOS device, respectively. A gate electrode, a first electrode, and a second electrode of the second NMOS device are coupled to the second control signal, a body electrode of the first PMOS device, and the output end, respectively.

Abstract: A flash memory control apparatus having a sequential writing procedure and method thereof are described. The flash memory control apparatus includes primary controller, a command module, an address module, a data buffer, a status unit, a counting device and a secondary controller. The primary controller generates a predetermined value which represents the amount of a plurality of pages in the flash memory. The command module stores a writing command during the writing procedure. The address module stores a current address for addressing a current page of the pages based on the current address and the writing command via a control bus. The data buffer stores the data for allowing the command module to write the data to the current page based on the current address via the control bus while the writing command is executed on the flash memory. The status unit determines that the flash memory is either ready or busy in writing the data to the current page of the flash memory.

Abstract: A power management system is described. The power management system includes an input power selecting unit, a charging control unit and a power switching control unit. The input power selecting unit receives a plurality of input power sources for selecting one of the input power sources to be inputted to the electronic apparatus. The charging control unit includes a charging controller and a battery. The charging controller receives a charge-enabling signal. The battery is charged by a second voltage and selectively supplies a battery power. The power switching control unit outputs a driving voltage to drive the electrical apparatus based on an adaptor-enabling signal and a power-detecting signal when the power switching control unit switches the input power sources and the battery power to select one of the input power sources and the battery power.

Abstract: A multi-interface conversion device includes a USB-to-IDE interface bridging unit, an IDE-to-SATA interface bridging unit, an IDE switching unit, and a switching logic unit. The USB-to-IDE interface bridging unit provides USB to IDE bridging and conversion. The IDE-to-SATA interface bridging unit provides IDE to SATA interface conversion or IDE to eSATA interface conversion or SATA to eSATA interface conversion. The IDE-to-SATA interface bridging unit is connected to the USB-to-IDE interface bridging unit to transmit USB-to-IDE converted data to the IDE-to-SATA interface bridging unit to provide conversion between USB interface and SATA. The IDE switching unit is connected to the USB-to-IDE interface bridging unit and the IDE-to-SATA interface bridging unit for switching the output IDE interface and signal between the USB-to-IDE interface bridging unit and the IDE-to-SATA interface bridging unit.

Abstract: An automatic feedback adjustment device for a digital antenna includes a digital antenna unit, a trafficator, a tuner, a demodulator, an antenna direction driver unit, a secondary controller, and a primary controller. The digital antenna unit is a digital video/broadcasting antenna system. The trafficator is connected to the digital antenna unit to retrieve direction data associated with the actual elevation angle and direction. The tuner is connected to the digital antenna unit and the demodulator is connected to the tuner in order to receive and convert a transmission signal from a transmission terminal into the video data and a received-signal quality signal. The antenna direction driver unit is connected to the digital antenna unit in order to drive adjustment of direction and elevation angle of the antenna.

Abstract: A flash memory storage device for boosting efficiency in accessing flash memory is disclosed. The flash memory storage device provides a Multi-level cell (MLC) flash memory for storing data, a single-level cell (SLC) flash memory for storing data, and a control unit for determining whether to store a file into the MLC NAND flash memory or a SLC NAND flash memory based on the file's data characteristics.

Abstract: A system for securing an access to a flash memory is provided. The system includes a first flash memory storage device having a plurality of storage elements for storing data, and a host for accessing the first flash memory storage device. The host includes a control unit, a storing unit, and an identification unit. The control unit is used for generating an identification code and assigning the identification code into a random storage element selected from the plurality of storage elements, when the first flash memory storage device is to be accessed by the host at the first time. The storing unit is used for storing the identification code and a set address corresponding to the stored storage element.

Abstract: An integrated data accessing system having control apparatus for multi-directional data transmission is described. The integrated data accessing system includes a control apparatus, a plurality of communication interface engines. The control apparatus includes a plurality of bi-directional transmission modules, a control unit, a multi-directional transferring engine, and a memory unit. The control unit detects a source storage and a target storage. The multi-directional transferring engine selectively transfers the data content among storage units. The multi-directional transferring engine includes a first switch module, a second switch module, and a data buffer. The first switch module switches to the first bi-directional transmission module to select the source storage. The second switch module switches to the second bi-directional transmission module to select the target storage. The data buffer stores the data content transmitted from the source storage and the target storage.

Abstract: A storage system for improving efficiency in accessing flash memory and method for the same are disclosed. The present invention provides a cache unit for temporarily storing data prior to writing in the flash memory or reading from the flash memory. In reading process, after data stored in a flash memory is accessed by a host, the cache unit holds the data. Upon subsequent read requests to read the same data, the data is cached accordingly, thereby shortening a preparation time for reading the data from the flash memory. In writing process, a host requests write a series of requests to write data into the flash memory, the data is gathered and is stored in the cache unit until the cache unit is full. A cluster of data in the cache unit is accordingly written into the flash memory, so that a preparation time for writing the data into the flash memory is also shortened.

Abstract: A method for filtering the SDTV channels in a DVB is provided, including the following steps: using the video frequency ID and center frequency of the SDTV channel of the user's choice to look up a table to obtain at least a remaining video frequency ID different from the video frequency ID of the SDTV channel, while the remaining video frequency ID having the same center frequency as the SDTV channel; configuring a plurality of registers in the controller; and the controller discarding a plurality of DVB packets according to the registers. The controller can be either a PCI_EXPRESS controller or a USB controller.

Abstract: A paper-shaped non-volatile storage device includes a top paper layer, a bottom paper layer and a flexible printed circuit board packaged between the top paper layer and the bottom paper layer. The flexible printed circuit board comprises a data-transmitting interface, a non-volatile memory controller and at least one non-volatile memory disposed thereon. Therefore, the paper-shaped non-volatile storage device features as both of traditional paper and traditional non-volatile storage devices, such as instantly writing, manually binding, and outwardly visible content as provided by the traditional paper sheets, and digital information storage, repeatable editing and rapid search capability as provided by the traditional non-volatile storage devices.

Abstract: An automatic charging and power management device includes a charging control unit and at least one power switching control unit. The charging control unit is connected to a rechargeable battery and an input power source to control the charging operation to the rechargeable battery. The input power source can be a USB-interfaced power source or a rectification transformer based power source. The power switching control unit connects the input power source and is provided with at least one power input terminal, a charging control terminal, a charging voltage terminal, a system actuation switch, a system actuation terminal, a power type terminal, and at least one power output terminal. The charging control terminal and the charging voltage terminal are connected to the charging control unit. The system actuation terminal is actuated on/off by the system actuation switch to generate a system actuation signal. The power type terminal generates an identification signal based on the type of the input power source.

Abstract: A highly efficient data characteristic identification method for flash memory is provided, including the steps of: (a) based on the LBA corresponding to the write request to the flash memory, finding K corresponding counters in the hash table through K hash functions; (b) determining whether to perform decay period computation on hash table; if so, proceeding to step (c); otherwise, proceeding to step (d); (c) performing decay period computation on the hash table; (d) performing state update computation on the hash table; and (e) checking the hash table state and determining whether the data in the logic block corresponding to the flash memory is frequently updated. The method contains the decay period computation, state update computation, and checking on the data in the corresponding counters in the hash table to determine whether the data is frequently updated. Therefore, the object of a highly efficient data access characteristic identification method for flash memory is provided.

Abstract: A system and a method for configuration and management of flash memory is provided, including a flash memory, a virtual memory region, and a memory logical block region. The flash memory includes a plurality of physical erase units. Each physical erase unit is configured to include at least a consecutive segment, and each segment is configured to include at least a consecutive frame. Each frame is configured to include at least a consecutive page. Each virtual memory region is configured to include a plurality of areas, and each area is configured to include at least a virtual erase unit. The memory logical block region is configured to include a plurality of clusters, and each cluster includes at least a consecutive memory logical block.

Abstract: The proposed invention discloses a card reader controlling apparatus based on Secure Digital (SD) protocol, which comprises a high-speed bus interface, at least one SD host, at least one SD connection interface and SDIO connection interface (SD/SDIO interface), at least one bridge, and at least one other specific memory card connecting interface. The card reader controlling apparatus according to the proposed invention is capable of directly accessing data from/to an input/output device compatible with the SDIO connection interface (e.g. an SD card) or one other specific memory card via the high-speed bus interface. Thus, multiple format conversions performed by other peripheral bus interfaces (such as an USB interface) as the prior art can be by-passed or eliminated.

Abstract: Disclosed is a storage apparatus for digital TV video/analog TV video/digital audio broadcasting/analog audio broadcasting media (DTV/ATV/DAB/AAB). The storage apparatus comprises a controller, a DTV/ATV/DAB/AAB interface converter and at least one storage media interfaces. The controller has a plurality of terminals for controlling the storage apparatus. The DTV/ATV/DAB/AAB interface converter connects to one of the terminals and a digital/analog tuner to receive DTV/ATV/DAB/AAB signals and converts the DTV/ATV/DAB/AAB signals into DTV/ATV/DAB/AAB data. The storage media interfaces respectively connect to the terminals of the controller and to at least one portable storage media, for storing the DTV/ATV/DAB/AAB data received from the DTV/ATV/DAB/AAB interface converter into the portable storage media. The controller can be an OTG controller.

Abstract: A highly efficient data characteristic identification device for flash memory is provided, including an instruction register, a plurality of auxiliary controllers, a data register, an address register, a microprocessor, a plurality of hash function units, a hash table unit, a comparator, a shifter, and an adder. By connecting the instruction register, data register and address register to a flash memory access control circuit and flash memory for storing the control instruction of the access control circuit and the data and physical and logical address of the flash memory, the control instruction is decoded and transmitted by the microprocessor and the auxiliary controllers to each circuit. A plurality of hash function units, a hash table unit, a comparator, a shifter, and an adder form an index computation circuit for flash memory LBA. By using the index and computation on the contents of the hash function units, the data characteristics of the LBA can be stored with less memory and higher efficiency.

Abstract: The present invention provides an OTG device for multi-directionally transmitting GPS data and a controlling method of the same. The OTG device is capable of automatically being switched as a master or slave devices based on a type of an external device connected thereto, thereby preventing a conflict between the OTG device and other external devices. Therefore, the GPS data received by a GPS module of the OTG device can easily be transmitted to the external device. Furthermore, the OTG device and the associated controlling method can be utilized in a multimedia device, such that the multimedia device is capable of GPS positioning, and multi-directionally transmitting GPS data and image data to be stored.

Abstract: A multi-streaming web camera controlling system and controlling methodology are capable of providing an original video data stream and at least one compressed video data stream for displaying demands of local host and for requested video data format(s) by remote hosts, respectively. The host can selectively display the original video data stream and transmit the compressed video data stream(s) through the Internet directly in order to satisfy the video requirements of both the local host and remote hosts. The multi-streaming web camera controlling system and controlling methodology can reduce the consuming system resource of the host for processing a video data stream. Therefore, the multi-streaming web camera controlling system and controlling methodology are capable of decreasing the cost of the host and improving the performance for processing video data stream with improved quality.

Abstract: The present invention discloses a multimedia adapting apparatus. The multimedia adapting apparatus includes a communicating module, a buffer, a primary controller, a command register, a status register, a secondary controller, a media hardware engine, and a memory unit. The buffer stores the audiovisual content from the multimedia player. The primary controller handles the operation of audiovisual content between the multimedia player and the portable multimedia devices. The status register stores a plurality of statuses associated with the portable multimedia devices. The command register stores a command set associated the operation of audiovisual content between the multimedia player and the portable multimedia devices according to the statuses of the status register. The communicating module couples the buffer and the primary controller, respectively, to the multimedia player, for communicating with the multimedia player based on a plurality of control signals associated with the command set.