Abstract: A storage system for improving efficiency in accessing flash memory and method for the same are disclosed. The present invention provides a cache unit for temporarily storing data prior to writing in the flash memory or reading from the flash memory. In reading process, after data stored in a flash memory is accessed by a host, the cache unit holds the data. Upon subsequent read requests to read the same data, the data is cached accordingly, thereby shortening a preparation time for reading the data from the flash memory. In writing process, a host requests write a series of requests to write data into the flash memory, the data is gathered and is stored in the cache unit until the cache unit is full. A cluster of data in the cache unit is accordingly written into the flash memory, so that a preparation time for writing the data into the flash memory is also shortened.

Abstract: A method for filtering the SDTV channels in a DVB is provided, including the following steps: using the video frequency ID and center frequency of the SDTV channel of the user's choice to look up a table to obtain at least a remaining video frequency ID different from the video frequency ID of the SDTV channel, while the remaining video frequency ID having the same center frequency as the SDTV channel; configuring a plurality of registers in the controller; and the controller discarding a plurality of DVB packets according to the registers. The controller can be either a PCI_EXPRESS controller or a USB controller.

Abstract: A paper-shaped non-volatile storage device includes a top paper layer, a bottom paper layer and a flexible printed circuit board packaged between the top paper layer and the bottom paper layer. The flexible printed circuit board comprises a data-transmitting interface, a non-volatile memory controller and at least one non-volatile memory disposed thereon. Therefore, the paper-shaped non-volatile storage device features as both of traditional paper and traditional non-volatile storage devices, such as instantly writing, manually binding, and outwardly visible content as provided by the traditional paper sheets, and digital information storage, repeatable editing and rapid search capability as provided by the traditional non-volatile storage devices.

Abstract: An automatic charging and power management device includes a charging control unit and at least one power switching control unit. The charging control unit is connected to a rechargeable battery and an input power source to control the charging operation to the rechargeable battery. The input power source can be a USB-interfaced power source or a rectification transformer based power source. The power switching control unit connects the input power source and is provided with at least one power input terminal, a charging control terminal, a charging voltage terminal, a system actuation switch, a system actuation terminal, a power type terminal, and at least one power output terminal. The charging control terminal and the charging voltage terminal are connected to the charging control unit. The system actuation terminal is actuated on/off by the system actuation switch to generate a system actuation signal. The power type terminal generates an identification signal based on the type of the input power source.

Abstract: A highly efficient data characteristic identification method for flash memory is provided, including the steps of: (a) based on the LBA corresponding to the write request to the flash memory, finding K corresponding counters in the hash table through K hash functions; (b) determining whether to perform decay period computation on hash table; if so, proceeding to step (c); otherwise, proceeding to step (d); (c) performing decay period computation on the hash table; (d) performing state update computation on the hash table; and (e) checking the hash table state and determining whether the data in the logic block corresponding to the flash memory is frequently updated. The method contains the decay period computation, state update computation, and checking on the data in the corresponding counters in the hash table to determine whether the data is frequently updated. Therefore, the object of a highly efficient data access characteristic identification method for flash memory is provided.

Abstract: A system and a method for configuration and management of flash memory is provided, including a flash memory, a virtual memory region, and a memory logical block region. The flash memory includes a plurality of physical erase units. Each physical erase unit is configured to include at least a consecutive segment, and each segment is configured to include at least a consecutive frame. Each frame is configured to include at least a consecutive page. Each virtual memory region is configured to include a plurality of areas, and each area is configured to include at least a virtual erase unit. The memory logical block region is configured to include a plurality of clusters, and each cluster includes at least a consecutive memory logical block.

Abstract: Disclosed is a storage apparatus for digital TV video/analog TV video/digital audio broadcasting/analog audio broadcasting media (DTV/ATV/DAB/AAB). The storage apparatus comprises a controller, a DTV/ATV/DAB/AAB interface converter and at least one storage media interfaces. The controller has a plurality of terminals for controlling the storage apparatus. The DTV/ATV/DAB/AAB interface converter connects to one of the terminals and a digital/analog tuner to receive DTV/ATV/DAB/AAB signals and converts the DTV/ATV/DAB/AAB signals into DTV/ATV/DAB/AAB data. The storage media interfaces respectively connect to the terminals of the controller and to at least one portable storage media, for storing the DTV/ATV/DAB/AAB data received from the DTV/ATV/DAB/AAB interface converter into the portable storage media. The controller can be an OTG controller.

Abstract: The proposed invention discloses a card reader controlling apparatus based on Secure Digital (SD) protocol, which comprises a high-speed bus interface, at least one SD host, at least one SD connection interface and SDIO connection interface (SD/SDIO interface), at least one bridge, and at least one other specific memory card connecting interface. The card reader controlling apparatus according to the proposed invention is capable of directly accessing data from/to an input/output device compatible with the SDIO connection interface (e.g. an SD card) or one other specific memory card via the high-speed bus interface. Thus, multiple format conversions performed by other peripheral bus interfaces (such as an USB interface) as the prior art can be by-passed or eliminated.

Abstract: A highly efficient data characteristic identification device for flash memory is provided, including an instruction register, a plurality of auxiliary controllers, a data register, an address register, a microprocessor, a plurality of hash function units, a hash table unit, a comparator, a shifter, and an adder. By connecting the instruction register, data register and address register to a flash memory access control circuit and flash memory for storing the control instruction of the access control circuit and the data and physical and logical address of the flash memory, the control instruction is decoded and transmitted by the microprocessor and the auxiliary controllers to each circuit. A plurality of hash function units, a hash table unit, a comparator, a shifter, and an adder form an index computation circuit for flash memory LBA. By using the index and computation on the contents of the hash function units, the data characteristics of the LBA can be stored with less memory and higher efficiency.

Abstract: The present invention provides an OTG device for multi-directionally transmitting GPS data and a controlling method of the same. The OTG device is capable of automatically being switched as a master or slave devices based on a type of an external device connected thereto, thereby preventing a conflict between the OTG device and other external devices. Therefore, the GPS data received by a GPS module of the OTG device can easily be transmitted to the external device. Furthermore, the OTG device and the associated controlling method can be utilized in a multimedia device, such that the multimedia device is capable of GPS positioning, and multi-directionally transmitting GPS data and image data to be stored.

Abstract: A multi-streaming web camera controlling system and controlling methodology are capable of providing an original video data stream and at least one compressed video data stream for displaying demands of local host and for requested video data format(s) by remote hosts, respectively. The host can selectively display the original video data stream and transmit the compressed video data stream(s) through the Internet directly in order to satisfy the video requirements of both the local host and remote hosts. The multi-streaming web camera controlling system and controlling methodology can reduce the consuming system resource of the host for processing a video data stream. Therefore, the multi-streaming web camera controlling system and controlling methodology are capable of decreasing the cost of the host and improving the performance for processing video data stream with improved quality.

Abstract: The present invention discloses a multimedia adapting apparatus. The multimedia adapting apparatus includes a communicating module, a buffer, a primary controller, a command register, a status register, a secondary controller, a media hardware engine, and a memory unit. The buffer stores the audiovisual content from the multimedia player. The primary controller handles the operation of audiovisual content between the multimedia player and the portable multimedia devices. The status register stores a plurality of statuses associated with the portable multimedia devices. The command register stores a command set associated the operation of audiovisual content between the multimedia player and the portable multimedia devices according to the statuses of the status register. The communicating module couples the buffer and the primary controller, respectively, to the multimedia player, for communicating with the multimedia player based on a plurality of control signals associated with the command set.

Abstract: A flash translation layer apparatus is disclosed. The flash translation layer apparatus coupled to a flash memory and a reading and writing controller, respectively. The flash translation layer apparatus includes an instruction register, a logical address register, a data register, a first auxiliary controller, a microprocessor, an address converting unit, a second auxiliary controller, a flash address register and an adjustable translation layer unit. Furthermore, the adjustable translation layer unit regards the block as a unit for a coarse-grained address translation table and regards the pages as a unit for a fine-grained address translation table, respectively. Therefore, the present invention can provide capabilities of reducing the spaces and the times of a null data collection procedure and increasing the efficiency when a logical address corresponds to a physical address.

Abstract: A method for managing medium access control (MAC) address and related apparatus are provided, including an MAC address learning method and an MAC addresses inquiring method. The learning method includes the steps of: mapping an MAC address to a designated slot and a companion slot in an address table; if said designated slot being empty, learning said MAC address into said designated slot; and if said designated slot being non-empty, said companion slot being empty and the content of said designated slot being non-static, moving the content of said designated slot to said companion slot and modifying a bit of the higher part of said MAC address in said companion slot and learning said MAC address into said designated slot.

Abstract: The present invention discloses a serial ATA (SATA) card reader control system and a controlling method of the same. The SATA card reader control system and the controlling method are capable of identifying a flash memory card type which is intended to be accessed by an SATA host based on a 4-bit Port Multiplier port information defined in SATA Frame Information Structure (FIS). Accordingly, the SATA host with usage of only one physical transport can access at most fifteen different types of flash memory cards. And a SATA transmission interface can be utilized in a multi-card reader in order to access various types of flash memory cards and increase the transmission speed between the SATA host and the multi-card reader.

Abstract: A caching device is positioned between a memory read/write controller and a flash memory, which contains an instruction register, a logical address register, a data register, a pair of auxiliary controllers, a microprocessor, an address translation unit, a flash memory address register, a caching control unit, and a caching instruction and data buffer area. Among them, the microprocessor is the core of the caching device responsible not only for the reading and writing the flash memory but also for the caching operation for logical and physical address translation. The caching control unit is a programmable device containing the instruction and data for caching the logical and physical address mapping. The caching instruction and data buffer area temporarily stores the caching instruction and data used by the caching control unit.

Abstract: A management method for reducing the utilization rate of random access memory (RAM) while reading data from or writing data to the flash memory is disclosed. A physical memory set is constructed from a plurality of physical memory blocks in the flash memory. A logical set is constructed from a plurality of logical blocks wherein the data stored in the logical set are stored in the physical memory set. Further, the data stored in each of the logical blocks are stored in one number of physical memory blocks. A mapping table is constructed and includes a hash function, a logical set table, a physical memory set table, and a set status table for managing the relationship among the physical memory sets, physical memory blocks, and logical blocks while reading data from or writing data to the flash memory.

Abstract: A method of facilitating reliably accessing flash memory is provided. During the write-in process, the present invention utilizes the steps of coding write-in data to generate extra data, and then generating the first error correction code by performing an error-correcting operation on the write-in data and the extra data. Finally, store the N write-in data and the generated K extra data into the data area and the first ECC into the spare area. During read process, the present invention utilizes the steps of reading data from the data area of the target flash-memory page to generate the second ECC, counting with the counter a number of bit differences between the first ECC and the second ECC, and selecting M data from the N write-in data and the K extra data as decoding factors to retrieve the N write-in data. The higher the counter values, the lower the likelihood the corresponding bit is selected to be retrieved.

Abstract: A method for performing a static wear leveling on a flash memory is disclosed. Accordingly, a static wear leveling unit is disposed with a block reclamation unit of either a flash translation layer or a native file system in the flash memory, and utilizes less memory space to trace a distribution status of block leveling cycles of each physical block of the flash memory. Based on the distribution record of the block leveling cycles, the number of the leveling cycles less than a premeditated threshold would be found while the system idles. Then the static wear leveling unit requests the block reclamation unit to level the found blocks. Before leveling the found block, the rarely updated data is compelled to move from one block to another block which is leveled frequently, whereby accurate wear leveling cycles for the blocks can be averaged extremely.

Abstract: A cache device comprises a hard disk, cache control unit and at least one flash memory, whereby the cache control unit controlling and regulating the flash memory as the hard disk cache device. The present invention method is defined by setting up a management table to manage each corresponding logical block address of the flash memory through a cache data read-out step and cache data write-in step in order to manage the cache read or write action of the flash memory on the hard disk. In addition, the step of recycling a cache space and replacing cache temporary data storage is to remove and replace temporary cache and storage space within the flash memory on the hard disk. Moreover, the step of reconstruction management table is provided to reconstruct management table loss or damage caused by power outage or irregular shut-down of the computer and will be able to provide flash memory on the hard disk cache control.