Patents Assigned to GTE Communications Systems Corporation
  • Patent number: 7912193
    Abstract: Methods and systems for managing a call in real-time are disclosed. Methods and systems consistent with the present invention manage a call in real-time based on input from a user. A service center receives information pertaining to a call to the user from a service control point and sends a notification of the call to a device associated with the user. The service center receives a response to the notification from the user. Thereafter, the service center instructs the service control point to connect the call based on the response.
    Type: Grant
    Filed: November 24, 2003
    Date of Patent: March 22, 2011
    Assignees: Verizon Data Services LLC, Verizon Services Corp., GTE Communication Systems Corporation
    Inventors: Robert A. Chingon, Stephen P. Brennan, Christopher L. Helbling, Nagendra Kunuturi, Ravi Penumatsa, Mahesh Rajagopalan, Craig L. Reding, John R. Reformato, John H. Wurster, Sandeep Chakraverty, Byron M. Pinto
  • Patent number: 6496025
    Abstract: Printed circuit board assemblies must be tested before being sold to consumers. Yet, the assemblies have various shapes and input/output configurations. Thus, a need exists for a general apparatus and method for testing a variety of assemblies. The present tester uses a test enclosure which contains the necessary test electronics. The front of the enclosure includes a personality board which is designed to interface with the device under test.
    Type: Grant
    Filed: December 11, 1998
    Date of Patent: December 17, 2002
    Assignee: GTE Communication Systems Corporation
    Inventors: Friedrich Stadelmayer, T. Edward States, John Soenderby, Francesco Sacca
  • Patent number: 6232766
    Abstract: A test station for use with automated test equipment (ATE) in testing printed circuit boards (PCBs). The test station comprises a support frame to which are attached substantially identical test wells for sequentially performing tests on the PCBs. The test wells are attached to the frame through a mechanism that allows the test wells to be adjustably positioned between an idle position and a testing position that is in proximity with the ATE. Each of the test wells contains upper and lower conveyor segments and a test head disposed between the conveyor segments. The conveyor segments of the respective test wells variously align in accordance with vertical movement of the test wells so as to enable transverse movement of the PCBs into, through and out of the test station.
    Type: Grant
    Filed: December 31, 1997
    Date of Patent: May 15, 2001
    Assignee: GTE Communication Systems Corporation
    Inventors: Mohamad Ali Saouli, Francesco Sacca
  • Patent number: 6094061
    Abstract: A method for testing printed circuit boards (PCBs). The PCBs are initially transported to a reorienting apparatus that aligns the PCBs to accommodate automated test equipment (ATE). The ATE consists essentially of two stations interconnected by a conveyor. At the first station testing of PCBs occurs sequentially at two test wells that are vertically movable between respective idle and testing positions. Upon being discharged from the first test station, a predetermined number of PCBs are concatenated along the conveyor that connects the first test station to the second test station. The concatenated PCBs are delivered to the second test station that simultaneously performs a second test on the predetermined number of PCBs. Inasmuch as the first test is of a duration substantially shorter than the second test, the concatenation of a number of PCBs prior to performance of the second test compensates for the difference in respective durations.
    Type: Grant
    Filed: December 31, 1997
    Date of Patent: July 25, 2000
    Assignee: GTE Communication Systems Corporation
    Inventors: Mohamad Ali Saouli, Friedrich Stadelmayer, Francesco Sacca
  • Patent number: 4835767
    Abstract: A time shared multiport conference arrangement includes an additive PCM speaker circuit. The additive PCM speaker circuit eliminates the need for loudest speaker detection and the last speaker memory of conventional conferencing arrangements. The additive PCM speaker circuitry operates in an on-line, real time environment to allow rapid summing of speakers' PCM voice samples. Since the PCM voice samples are logarithmic in nature, they are not directly combinable. The additive PCM speaker circuitry provides a storage medium which is preprogrammed with resultant values. These resultant values each correspond to a PCM addition of the values of two input speaker's PCM voice samples. The additive PCM speaker circuit simplifies the complex processing logic usually associated with loudest speaker detection systems and thereby improves the real time operation of the conferencing arrangement.
    Type: Grant
    Filed: November 2, 1987
    Date of Patent: May 30, 1989
    Assignee: GTE Communication Systems Corporation
    Inventor: Robert E. Renner
  • Patent number: 4821149
    Abstract: A substrate mounting device for installing an electrical substrate to a carrier substrate. The substrate mounting device includes a plurality of tabs extending from the perimeter edges of the electrical substrate. First and second substrate guides are mounted to the carrier substrate and each include a lower shelf and a channel extending longitudinally along a substrate guide inner side, from an open end to a top guide. The channel is further defined by a top surface and a plurality of drop guides which in turn from a plurality of slots. The electrical substrate is installed by manually inserting the electrical substrate into a respective substrate guide open end and manually pushing the electrical substrate along the channels until the electrical substrate encounters a respective top guide whereby, the electrical substrate is urged downward. Each tab then falls within a respective slot, resting the electrical substrate on the lower shelf.
    Type: Grant
    Filed: September 28, 1987
    Date of Patent: April 11, 1989
    Assignee: GTE Communication Systems Corporation
    Inventor: Thomas D. Belanger, Jr.
  • Patent number: 4812947
    Abstract: A device for conducting electrostatic potentials to a protection ground is disclosed. The device includes an electrically conductive center section mounted on a substrate mounting device, with the center section electrically connected to the protection ground. First and second electrically conductive bands extend from opposite sides of the center section. During the installation of a cirucit substrate to the substrate mounting device an associated band is arranged to contact a metalized edge of the circuit substrate providing an electrical path for discharging electrostatic potentials from the circuit substrate to the protection ground.
    Type: Grant
    Filed: December 17, 1987
    Date of Patent: March 14, 1989
    Assignee: GTE Communication Systems Corporation
    Inventors: Thomas D. Belanger, Jr., Roy L. Johnson
  • Patent number: 4809286
    Abstract: A laser driver circuit is disclosed for operating an electrical current driven light emitting device or laser. The laser driver circuit is driven from external equipment by a modulated electrical signal and includes a laser biasing network arranged to provide a threshold current to the laser. The current is sufficient to bias the laser to an operating point just below the laser's turn on threshold. First and second transistors connected to the laser form a differential switching amplifier. The differential switching amplifier is disposed to switch drive current provided by a constant current source to the laser. The drive current is sufficient to drive the laser over the threshold set by the laser biasing network. On the application of the modulated electrical signal to the first transistor of the differential switching amplifier the drive current is switched from one side of the differential switching amplifier to the other effectively turning the laser on and off.
    Type: Grant
    Filed: May 31, 1988
    Date of Patent: February 28, 1989
    Assignee: GTE Communication Systems Corporation
    Inventors: Miklos J. Kollanyi, Frankie P. Buchanan
  • Patent number: 4802161
    Abstract: The Arbitrated Bus Interface (ABI) is a set of custom LSI circuits which sends and receives minipackets of binary information to and from a data bus. The ABI performs arbitration, address recognition, and buffering required for transmitting and receiving mini-packets of information between the local packet bus and a microprocessor.
    Type: Grant
    Filed: September 16, 1986
    Date of Patent: January 31, 1989
    Assignee: GTE Communication Systems Corporation
    Inventors: Steven J. Byars, William N. Carr
  • Patent number: 4797784
    Abstract: A substrate mounting device for installing an electrical substrate to a carrier substrate. The substrate mounting device includes a plurality of guide rails mounted on the perimeter edge of the electrical substrate. First and second substrate guides are mounted to the carrier substrate in a spaced and parallel relationship to the other. Each substrate guide includes a channel extending longitudinally along a substrate guide inner side, from an open end to a top guide. The channel is further defined by a top surface and a plurality of drop guides which in turn form a plurality of slots. The electrical substrate is installed by manually inserting the electrical substrate into respective substrate guide open ends and manually pushing the electrical substrate along the channels until the substrate encounters a respective top guide.
    Type: Grant
    Filed: September 28, 1987
    Date of Patent: January 10, 1989
    Assignee: GTE Communication Systems Corporation
    Inventor: Thomas D. Belanger, Jr.
  • Patent number: 4797654
    Abstract: This circuit converts data in an ISDN data format to data in a T-carrier compatible data format and vice versa. The converted data is then stored in a memory for subsequent transmission. Due to the format differences, the data may be discontinuous. This circuit stores the data in memory in a contiguous fashion to promote and to facilitate the subsequent transmission of the data. This circuit includes a timing and control arrangement which indicates the size of each channel and frame of input data. This circuit generates memory addresses for the storage of both ISDN and T-carrier formatted data which are contiguous over multiple frames of data. A counting arrangement of this circuit converts data received in a modulo 32 format to stored data in a modulo 24 format or vice versa. In addition, this circuit provides output signals for generating proper framing bits and extended superframing information.
    Type: Grant
    Filed: May 1, 1987
    Date of Patent: January 10, 1989
    Assignee: GTE Communication Systems Corporation
    Inventors: John S. Young, Peter Kruis, William D. Blewitt
  • Patent number: 4797786
    Abstract: A substrate mounting device for installing an electrical substrate to a carrier substrate. The substrate mounting device includes a plurality of guide rails mounted on the perimeter edge of the electrical substrate. First and second substrate guides are mounted to the carrier substrate in a spaced and parallel relationship to the other. Each substrate guide includes a channel extending longitudinally along a substrate guide inner side, from an open end to a top guide. The channel is further defined by a top surface and a plurality of drop guides which in turn form a plurality of slots. The electrical substrate is installed by manually inserting the electrical substrate into respective substrate guide open ends and manually pushing the electrical substrate along the channels until the substrate encounters a respective top guide.
    Type: Grant
    Filed: September 28, 1987
    Date of Patent: January 10, 1989
    Assignee: GTE Communication Systems Corporation
    Inventor: Thomas D. Belanger, Jr.
  • Patent number: 4796356
    Abstract: A process for manufacturing close tolerance thick film resistors on a ceramic dielectric substrate is disclosed. The process includes the steps of printing resistor terminations to the dielectric substrate using a precious conductor material and fixing the resistor terminations by drying and firing in air. A resistive material is next printed to portions of the resistor terminations and to the dielectric substrate intermediate the resistor terminations. The resistive material is fixed by drying and firing in air. Terminal pads, conductor traces and resistor interconnections are printed on the dielectric substrate using a base conductor material. The resistor interconnections are also printed to the resistor terminations and to portions of the resistive material. The terminal pads, conductor traces and resistor interconnections are then air dried and fired in nitrogen.
    Type: Grant
    Filed: August 27, 1987
    Date of Patent: January 10, 1989
    Assignee: GTE Communication Systems Corporation
    Inventor: Thomas Ozaki
  • Patent number: 4796256
    Abstract: The Mini Packet Receiver Transmitter Circuit (MPRT) provides an interface between one or two eight bit microprocessors and a digital subscriber loop interface circuit. The bi-directional communication on a single wire pair is accomplished by alternating the subscriber loop receive and transmit frames controlled by a "Ping-Pong Protocol" using fixed frame format and bipolar alternate mark inversion (AMI) line encoding. There are two microprocessor ports within the MPRT, a transparent port for voice transmission and a non-transparent port for data trasmission. The MPRT implements the Mini Packet Protocol frame format as a mini packet (MP) of information, for both transparent and non-transparent data.
    Type: Grant
    Filed: September 16, 1986
    Date of Patent: January 3, 1989
    Assignee: GTE Communication Systems Corporation
    Inventors: Holger Opderbeck, Gulay Sencer, William N. Carr, Steven J. Byars
  • Patent number: 4794488
    Abstract: A substrate mounting device for installing an electrical substrate to a carrier substrate. The substrate mounting device includes a plurality of tabs extending from the perimeter edges of the electrical substrate. First and second substrate guides are mounted to the carrier substrate and each include a lower shelf and a channel extending longitudinally along a substrate guide inner side, from an open end to a top guide. The channel is further defined by a top surface and a plurality of drop guides which in turn form a plurality of slots. The electrical substrate is installed by manually inserting the electrical substrate into a respective substrate guide open end and manually pushing the electrical substrate along the channels until the electrical substrate encounters a respective top guide whereby, the electrical substrate is urged downward. Each tab then falls within a respective slot, resting the electrical substrate on the lower shelf.
    Type: Grant
    Filed: September 28, 1987
    Date of Patent: December 27, 1988
    Assignee: GTE Communication Systems Corporation
    Inventor: Thomas D. Belanger, Jr.
  • Patent number: 4794591
    Abstract: An echo cancellation arrangement is provided for decreasing the "singing" of a connection of a large number of telephone subscribers in a conference calling arrangement. This arrangement includes a means for inserting quiet code during time when the voice samples of incoming PCM data are zero or below a predetermined minimum threshold level. This helps decrease the amount of feedback which is amplified and output through the codec/filter to the listeners through the PCM network. An attenuation arrangement is also included which decreases the level of a summed signal of a summing node of the conference circuit. This sum signal is the combination of each of the conferees' speech. Attenuation of this signal prohibits excessive coupling of amplified feedback to each of the listening conferees.
    Type: Grant
    Filed: December 28, 1987
    Date of Patent: December 27, 1988
    Assignee: GTE Communication Systems Corporation
    Inventors: James Hoff, Arthur L. Walsh, John S. Young
  • Patent number: 4794589
    Abstract: The Asynchronous Packet Manager is the interface for transferring data in a first format between a data terminal equipment and a combination data and telephone switching system in a properietary packet format. A microprocessor accepts data from a universal asynchronous receiver transmitter and forwards the data to a mini packet receiver transmitter, when it is formatted into mini packets and converted to an alternate mark inversion signal and sent to the switching network.
    Type: Grant
    Filed: September 16, 1986
    Date of Patent: December 27, 1988
    Assignee: GTE Communication Systems Corporation
    Inventors: William W. Finch, Gulay Sencer
  • Patent number: 4792957
    Abstract: A laser temperature controller is disclosed for controlling the temperature of a laser device. The controller includes a bridge circuit connected to a thermistor device which is mounted on the laser package. The bridge circuit generates error signals representing a need for cooling or heating as the operating temperature of the laser rises or falls about a set threshold. A voltage conversion circuit converts the error signals to a positive or negative polarity voltage. The output of the voltage conversion circuit is applied to a pair of operational amplifiers which input the voltage and compare it to a set reference voltage. When cooling is required a first amplifier provides a biasing voltage to a transistor when a set threshold is exceeded. The associated transistor switches drive current to a thermoelectric device mounted on the laser package thereby, cooling the laser.
    Type: Grant
    Filed: December 22, 1986
    Date of Patent: December 20, 1988
    Assignee: GTE Communication Systems Corporation
    Inventor: Miklos J. Kollanyi
  • Patent number: 4788524
    Abstract: A material system for manufacturing thick film resistors on a ceramic dielectric substrate is disclosed. The system includes the application and fixing of resistor terminations composed of a precious conductor material to a dielectric substrate. Resistor material is deposited over portions of the resistor terminations and to the dielectric substrate intermediate the resistor terminations. Terminal pads, conductor traces and resistor interconnections are printed on the dielectric substrate using a base conductor material. The resistor interconnections are deposited and fixed to the resistor terminations and to portions of the resistor material. The resistor material is trimmed to tolerance by kerfing the resistor material and a dielectric encapsulant is applied substantially over the resistor interconnections and resistor material.
    Type: Grant
    Filed: August 27, 1987
    Date of Patent: November 29, 1988
    Assignee: GTE Communication Systems Corporation
    Inventor: Thomas Ozaki
  • Patent number: 4787029
    Abstract: The bus extender circuit is a least replaceable unit which interfaces between intermodule subsystems and the microprocessor controller of the system. The bus extender circuits are structured so that the subsystem modules may be placed in different power zones. As a result, one subsystem may be powered down without affecting the other subsystems connected to the microprocessor's bus. In addition, the bus extender circuit converts from Fairchild Advanced Schottky TTL logic to high-speed CMOS logic and vice versa and allows bus interface gate arrays located in each subsystem to interface between the subsystem logic and the microprocessor. This bus extender circuit design eliminates the need for strapping options or DIP switches for address decoding.
    Type: Grant
    Filed: September 29, 1986
    Date of Patent: November 22, 1988
    Assignee: GTE Communication Systems Corporation
    Inventor: Salim M. Khan