Patents Assigned to Gyrfalcon Technology, Inc.
  • Patent number: 11526723
    Abstract: A pixel feature vector extraction system for extracting multi-scale features contains a cellular neural networks (CNN) based integrated circuit (IC) for extracting pixel feature vector out of input imagery data by performing convolution operations using pre-trained filter coefficients of ordered convolutional layers in a deep learning model. The ordered convolutional layers are organized in a number of groups with each group followed by a pooling layer. Each group is configured for a different size of feature map. Pixel feature vector contains a combination of feature maps from at least two groups, for example, concatenation of the feature maps. The first group of the at least two groups contains the largest size of the feature maps amongst all of the at least two groups. Feature maps of the remaining of the at least two groups are modified to match the size of the feature map of the first group.
    Type: Grant
    Filed: July 9, 2019
    Date of Patent: December 13, 2022
    Assignee: GYRFALCON TECHNOLOGY INC.
    Inventors: Lin Yang, Baohua Sun
  • Patent number: 11507829
    Abstract: A system may include multiple client devices and a processing device communicatively coupled to the client devices. One or more client devices may implement a greedy approach in searching for an optimal artificial intelligence (AI) model. For example, a client device may use a training dataset to perform an AI task, and update its AI model. The client device may verify the performance of the AI task and determine whether to accept or reject its updated AI model. Upon rejection, the client device may repeat updating its AI model until the updated AI model is accepted, or until a stopping criteria is met. The processing device may be configured to update the initial AI models based on the accepted updated AI models obtained in the multiple client device. Training data for each of the client devices may contain a subset shuffled from a larger training dataset.
    Type: Grant
    Filed: December 3, 2019
    Date of Patent: November 22, 2022
    Assignee: Gyrfalcon Technology Inc.
    Inventors: Yinbo Shi, Yequn Zhang, Xiaochun Li, Bowei Liu
  • Patent number: 11475298
    Abstract: A system for training an artificial intelligence (AI) model for an AI chip to implement an AI task may include an AI training unit to train weights of an AI model in floating point, a convolution quantization unit for quantizing the trained weights to a number of quantization levels, and an activation quantization unit for updating the weights of the AI model so that output of the AI model based at least on the updated weights are within a range of activation layers of the AI chip. The updated weights may be stored in fixed point and uploadable to the AI chip. The various units may be configured to account for the hardware constraints in the AI chip to minimize performance degradation when the trained weights are uploaded to the AI chip and expedite training convergence. Forward propagation and backward propagation may be combined in training the AI model.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: October 18, 2022
    Assignee: Gyrfalcon Technology Inc.
    Inventors: Yongxiong Ren, Yi Fan, Yequn Zhang, Baohua Sun, Bin Yang, Xiaochun Li, Lin Yang
  • Patent number: 11429853
    Abstract: A system may include multiple client devices and a processing device communicatively coupled to the client devices. Each client device includes an artificial intelligence (AI) chip and is configured to generate an AI model. The processing device may be configured to (i) receive a respective AI model and an associated performance value of the respective AI model from each of the plurality of client devices; (ii) determine an optimal AI model based on the performance values associated with the respective AI models from the plurality of client devices; and (iii) determine a global AI model based on the optimal AI model. The system may load the global AI model into an AI chip of a client device to cause the client device to perform an AI task based on the global AI model in the AI chip. The AI model may include a convolutional neural network.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: August 30, 2022
    Assignee: Gyrfalcon Technology Inc.
    Inventors: Yequn Zhang, Yongxiong Ren, Baohua Sun, Lin Yang, Qi Dong
  • Patent number: 11335045
    Abstract: In some embodiments, a system includes an artificial intelligence (AI) chip and a processor coupled to the AI chip and configured to receive an input image, crop the input image into a plurality of cropped images, and execute the AI chip to produce a plurality of feature maps based on at least a subset of the plurality of cropped images. The system may further merge at least a subset of the plurality of feature maps to form a merged feature map, and produce an output image based on the merged feature map. The cropping and merging operations may be performed according to a same pattern. The system may also include a training network configured to train weights of the CNN model in the AI chip in a gradient descent network. Cropping and merging may be performed over the training sample images in the training work in a similar manner.
    Type: Grant
    Filed: January 3, 2020
    Date of Patent: May 17, 2022
    Assignee: Gyrfalcon Technology Inc.
    Inventors: Bin Yang, Lin Yang, Xiaochun Li, Yequn Zhang, Yongxiong Ren, Yinbo Shi, Patrick Dong
  • Patent number: 11334801
    Abstract: A device for obtaining a local optimal AI model may include an artificial intelligence (AI) chip and a processing device configured to receive a first initial AI model from the host device. The device may load the initial AI model into the AI chip to determine a performance value of the AI model based on a dataset, and determine a probability that a current AI model should be replaced by the initial AI model. The device may determine, based on the probability, whether to replace the current AI model with the initial AI model. If it is determined that the current AI model be replaced, the device may replace the current AI model with the initial AI model. The device may repeat the above processes and obtain a final current AI model. The device may transmit the final current AI model to the host device.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: May 17, 2022
    Assignee: Gyrfalcon Technology Inc.
    Inventors: Yequn Zhang, Yongxiong Ren, Baohua Sun, Lin Yang, Qi Dong
  • Patent number: 11281911
    Abstract: P feature encoding values are obtained for each of the Q frames in a video clip by image transformations of each frame along with performing computations of a specific succession of convolution and pooling layers of a CNN based deep learning model followed with operations of a nested invariance pooling layer. Each feature encoding value is then converted from real number to a corresponding integer value within a range designated for color display intensity according to a quantization scheme. A 2-D graphical symbol that contains N×N pixels is formed by placing respective color display intensities into the N×N pixels according to a data arrangement pattern for representing all frames of the video clip in form of P×Q feature encoding values, such that the 2-D graphical symbol possesses a semantic meaning of the video clip that can be recognized via image classification task using another trained CNN based deep learning model.
    Type: Grant
    Filed: November 5, 2019
    Date of Patent: March 22, 2022
    Assignee: GYRFALCON TECHNOLOGY INC.
    Inventors: Lin Yang, Baohua Sun, Hao Sha
  • Publication number: 20210209822
    Abstract: In some embodiments, a system includes an artificial intelligence (AI) chip and a processor coupled to the AI chip and configured to receive an input image, crop the input image into a plurality of cropped images, and execute the AI chip to produce a plurality of feature maps based on at least a subset of the plurality of cropped images. The system may further merge at least a subset of the plurality of feature maps to form a merged feature map, and produce an output image based on the merged feature map. The cropping and merging operations may be performed according to a same pattern. The system may also include a training network configured to train weights of the CNN model in the AI chip in a gradient descent network. Cropping and merging may be performed over the training sample images in the training work in a similar manner.
    Type: Application
    Filed: January 3, 2020
    Publication date: July 8, 2021
    Applicant: Gyrfalcon Technology Inc.
    Inventors: Bin Yang, Lin Yang, Xiaochun Li, Yequn Zhang, Yongxiong Ren, Yinbo Shi, Patrick Dong
  • Publication number: 20210097290
    Abstract: A video retrieval system may include a feature extractor configured to extract first feature descriptors for multiple image frames in the query video. The system may also include a feature extractor to extract second feature descriptors for multiple image frames in a candidate video in a video database. The system may include a comparator to compare the first and second feature descriptors to determine a subset of image frames in the candidate video that are similar to the first video. The system may output die query output by displaying the subset of image frames in a slide show. The system may also output the query by displaying a video formed by at least the subset of image frames. The feature extractor may be implemented in a convolution neural network (CNN) in an artificial intelligence (AI) chip. The system may include key frame extractor to detect key frames in the video.
    Type: Application
    Filed: September 27, 2019
    Publication date: April 1, 2021
    Applicant: Gyrfalcon Technology Inc.
    Inventors: Lin Yang, Bin Yang, Qi Dong, Xiaochun Li, Wenhan Zhang, Yequn Zhang, Hua Zhou, Patrick Dong
  • Patent number: 10943168
    Abstract: A system may include a decentralized communication network and multiple processing devices on the network. Each processing device may have an artificial intelligence (AI) chip, the device may be configured to generate an AI model, determine the performance value of the AI model on the AI chip, receive a chain from the network where the chain contains a performance measure. If the performance value of the AI model is better than the performance measure, then the processing device may broadcast the AI model to the network for verification. If the AI model is verified by the network, the device may update the chain with the performance value so that the chain can be shared by the multiple processing devices on the network. Any processing device on the network may also verify an AI model broadcasted by any other device. Methods for generating the AI model are also provided.
    Type: Grant
    Filed: April 10, 2018
    Date of Patent: March 9, 2021
    Assignee: Gyrfalcon Technology Inc.
    Inventors: Lin Yang, Charles Jin Young, Jason Zeng Dong, Patrick Zeng Dong, Baohua Sun, Yequn Zhang
  • Patent number: 10902313
    Abstract: A system may include a decentralized communication network and multiple processing devices on the network. Each processing device may have an artificial intelligence (AI) chip, the device may be configured to generate an AI model, determine the performance value of the AI model on the AI chip, receive a chain from the network where the chain contains a performance measure. If the performance value of the AI model is better than the performance measure, then the processing device may broadcast the AI model to the network for verification. If the AI model is verified by the network, the device may update the chain with the performance value so that the chain can be shared by the multiple processing devices on the network. Any processing device on the network may also verify an AI model broadcasted by any other device. Methods for generating the AI model are also provided.
    Type: Grant
    Filed: April 10, 2018
    Date of Patent: January 26, 2021
    Assignee: Gyrfalcon Technology Inc.
    Inventors: Lin Yang, Charles Jin Young, Jason Zeng Dong, Patrick Zeng Dong, Baohua Sun, Yequn Zhang
  • Publication number: 20210019602
    Abstract: An integrated circuit may include multiple cellular neural networks (CNN) processing engines coupled in a loop circuit and configured to perform an AI task. Each CNN processing engine includes multiple convolution layers, a first memory buffer to store imagery data and a second memory buffer to store filter coefficients. The CNN processing engines are configured to perform convolution operations over an input image simultaneously in one or more iterations. In each iteration, various sub-images of the input image are loaded to the first memory buffer circularly. A portion of the filter coefficients corresponding to the sub-image are loaded to the second memory buffer in a cyclic order. Data may be arranged in the second memory buffer to facilitate loading of duplicate filter coefficients among at least two convolution layers without requiring duplicate memory space. Methods of training a CNN model having duplicate weights are also provided.
    Type: Application
    Filed: July 18, 2019
    Publication date: January 21, 2021
    Applicant: Gyrfalcon Technology Inc.
    Inventors: Lin Yang, Baohua Sun, Yongxiong Ren, Wenhan Zhang
  • Publication number: 20210019606
    Abstract: An integrated circuit may include multiple cellular neural networks (CNN) processing engines coupled to at least one input/output data bus and a clock-skew circuit in a loop circuit. Each CNN processing engine includes multiple convolution layers, a first memory buffer to store imagery data and a second memory buffer to store filter coefficients. Each of the CNN processing engines is configured to perform convolution operations over an input image simultaneously in a first clock cycle to generate output to be fed to an immediate neighbor CNN processing engine for performing convolution operations in a next clock cycle. The second memory buffer may store a first subset of filter coefficients for a first convolution layer of the CNN processing engine and store a reference location to the first subset of filter coefficients for a second convolution layer, where the filter coefficients for the first and second convolution layers are duplicate.
    Type: Application
    Filed: July 18, 2019
    Publication date: January 21, 2021
    Applicant: Gyrfalcon Technology Inc.
    Inventors: Lin Yang, Baohua Sun, Yongxiong Ren, Wenhan Zhang
  • Publication number: 20200380263
    Abstract: A system for detecting key frames in a video may include a feature extractor configured to extract feature descriptors for each of the multiple image frames in the video. The feature extractor may be an embedded cellular neural network of an artificial intelligence (AI) chip. The system may also include a key frame extractor configured to determine one or more key frames in the multiple image frames based on the corresponding feature descriptors of the image frames. The key frame extractor may determine the key frames based on distance values between a first set of feature descriptors corresponding to a first subset of image frames and a second set of feature descriptors corresponding to a second subset of image frames. The system may output an alert based on determining the key frames and/or display the key frames. The system may also compress the video by removing the non-key frames.
    Type: Application
    Filed: May 29, 2019
    Publication date: December 3, 2020
    Applicant: Gyrfalcon Technology Inc.
    Inventors: Lin Yang, Bin Yang, Qi Dong, Xiaochun Li, Wenhan Zhang, Yinbo Shi, Yequn Zhang
  • Publication number: 20200320385
    Abstract: A system for training an artificial intelligence (AI) model for an AI chip may include a forward network and a backward propagation network. The AI model may be a convolution neural network (CNN). The forward network may infer the output of the AI chip based on the training data. The backward network may use the output of the AI chip and the ground truth data to train the weights of the AI model. In some examples, the system may train the AI model using a gradient descent method. The system may quantize the weights and update the weights during the training. In some examples, the system may perform a uniform quantization over the weights. The system may also determine the distribution of the weights. If the weight distribution is not symmetric, the system may group the weights and quantize the weights based on the grouping.
    Type: Application
    Filed: April 30, 2019
    Publication date: October 8, 2020
    Applicant: Gyrfalcon Technology Inc.
    Inventors: Lin Yang, Baohua Sun, Yongxiong Ren, Wenhan Zhang, Patrick Zeng Dong
  • Publication number: 20200302288
    Abstract: A system for training an artificial intelligence (AI) model for an AI chip may include an AI training unit to train weights of an AI model in floating point, and one or more quantization units for updating the weights of the AI model while accounting for the hardware constraints in the AI chip. The system may also include customization unit for performing one or more linear transformations on the updated weights. The system may also perform output equalization for one or more convolution layers of the AI model to equalize the inputs and/or outputs of each layer of the AI model to within the range allowed in the physical AI chip. The system may further update the weights by performing shift-based quantization that mimics the characteristics of a hardware chip. The updated weights may be stored in fixed point and uploadable to an AI chip implementing an AI task.
    Type: Application
    Filed: September 27, 2019
    Publication date: September 24, 2020
    Applicant: Gyrfalcon Technology Inc.
    Inventors: Yongxiong Ren, Yi Fan, Yequn Zhang, Tianran Chen, Yinbo Shi, Xiaochun Li, Lin Yang
  • Publication number: 20200302276
    Abstract: An artificial intelligence (AI) semiconductor having an embedded convolution neural network (CNN) may include a first convolution layer and a second convolution layer, in which the weights of the first layer and the weights of the second layer are quantized in different bit-widths, thus at different compression ratios. In a VGG neural network, the weights of a first group of convolution layers may have a different compression ratio than the weights of a second group of convolution layers. The weights of the CNN may be obtained in a training system including convolution quantization and/or activation quantization. Depending on the compression ratio, the weights of a convolution layer may be trained with or without re-training. An AI task, such as image retrieval, may be implemented in the AI semiconductor having the CNN described above.
    Type: Application
    Filed: September 27, 2019
    Publication date: September 24, 2020
    Applicant: Gyrfalcon Technology Inc.
    Inventors: Lin Yang, Bin Yang, Hua Zhou, Xiaochun Li, Wenhan Zhang, Qi Dong, Yequn Zhang, Yongxiong Ren, Patrick Dong
  • Publication number: 20200302289
    Abstract: A system for training an artificial intelligence (AI) model for an AI chip to implement an AI task may include an AI training unit to train weights of an AI model in floating point, a convolution quantization unit for quantizing the trained weights to a number of quantization levels, and an activation quantization unit for updating the weights of the AI model so that output of the AI model based at least on the updated weights are within a range of activation layers of the AI chip. The updated weights may be stored in fixed point and uploadable to the AI chip. The various units may be configured to account for the hardware constraints in the AI chip to minimize performance degradation when the trained weights are uploaded to the AI chip and expedite training convergence. Forward propagation and backward propagation may be combined in training the AI model.
    Type: Application
    Filed: September 27, 2019
    Publication date: September 24, 2020
    Applicant: Gyrfalcon Technology Inc.
    Inventors: Yongxiong Ren, Yi Fan, Yequn Zhang, Baohua Sun, Bin Yang, Xiaochun Li, Lin Yang
  • Publication number: 20200293865
    Abstract: A cellular neural network architecture may include a processor and embedded cellular, neural network (CeNN) executable in an artificial intelligence (AI) integrated circuit and configured to perform certain AI functions. The CeNN may include multiple convolution layers, each having multiple binary weights. In some examples, a method may configure a given layer of the CeNN and one or more additional layers of the CeNN to retrieve the output of the given layer for debugging or training the CeNN. In configuring the one or more additional layers, the method may use an identity layer.
    Type: Application
    Filed: March 14, 2019
    Publication date: September 17, 2020
    Applicant: Gyrfalcon Technology Inc.
    Inventors: Bowei Liu, Yinbo Shi, Yequn Zhang, Xiaochun Li
  • Publication number: 20200293856
    Abstract: A cellular neural network architecture may include a processor and an embedded cellular neural network (CeNN) executable in an artificial intelligence (AI) integrated circuit and configured to perform certain AI functions. The CeNN may include multiple convolution layers, such as first, second, and third layers, each layer having multiple binary weights. In some examples, a method may configure the multiple layers in the CeNN to produce a residual connection. In configuring the second and third layers, the method may use an identity matrix.
    Type: Application
    Filed: March 14, 2019
    Publication date: September 17, 2020
    Applicant: Gyrfalcon Technology Inc.
    Inventors: Bowei Liu, Yinbo Shi, Yequn Zhang, Xiaochun Li