Patents Assigned to Gyrfalcon Technology, Inc.
  • Patent number: 10387772
    Abstract: An ensemble learning based image classification system contains multiple cellular neural networks (CNN) based integrated circuits (ICs) operatively coupling together as a set of base learners of an ensemble for an image classification task. Each CNN based IC is configured with at least one distinct deep learning model in form of filter coefficients. The ensemble learning based image classification system further contains a controller configured as a meta learner of the ensemble and a memory based data buffer for holding various data used in the ensemble by the controller and the CNN based ICs. Various data may include input imagery data to be classified. Various data may also include extracted feature vectors or image classification outputs out of the set of base learners. The extracted feature vectors or image classification outputs are then used by the meta learner to further perform the image classification task.
    Type: Grant
    Filed: October 22, 2018
    Date of Patent: August 20, 2019
    Assignee: Gyrfalcon Technology Inc.
    Inventors: Lin Yang, Patrick Z. Dong, Charles Jin Young, Jason Z. Dong, Michael Lin, Baohua Sun
  • Patent number: 10366328
    Abstract: Multiple 3×3 convolutional filter kernels are used for approximating operations of fully-connected (FC) layers. Image classification task is entirely performed within a CNN based integrated circuit. Output at the end of ordered convolutional layers contains P feature maps with F×F pixels of data per feature map. 3×3 filter kernels comprises L layers with each organized in an array of R×Q of 3×3 filter kernels, Q and R are respective numbers of input and output feature maps of a particular layer of the L layers. Each input feature map of the particular layer comprises F×F pixels of data with one-pixel padding added around its perimeter. Each output feature map of the particular layer comprises (F?2)×(F?2) pixels of useful data. Output of the last layer of the L layers contains Z classes. L equals to (F?1)/2 if F is an odd number. P, F, Q, R and Z are positive integers.
    Type: Grant
    Filed: March 14, 2018
    Date of Patent: July 30, 2019
    Assignee: Gyrfalcon Technology Inc.
    Inventors: Lin Yang, Patrick Z. Dong, Jason Z. Dong, Baohua Sun
  • Patent number: 10366302
    Abstract: CNN based integrated circuit is configured with a set of pre-trained filter coefficients or weights as a feature extractor of an input data. Multiple fully-connected networks (FCNs) are trained for use in a hierarchical category classification scheme. Each FCN is capable of classifying the input data via the extracted features in a specific level of the hierarchical category classification scheme. First, a root level FCN is used for classifying the input data among a set of top level categories. Then, a relevant next level FCN is used in conjunction with the same extracted features for further classifying the input data among a set of subcategories to the most probable category identified using the previous level FCN. Hierarchical category classification scheme continues for further detailed subcategories if desired.
    Type: Grant
    Filed: November 21, 2017
    Date of Patent: July 30, 2019
    Assignee: Gyrfalcon Technology Inc.
    Inventors: Lin Yang, Patrick Z. Dong, Baohua Sun
  • Patent number: 10360470
    Abstract: Method and systems of replacing operations of depthwise separable filters with first and second replacement convolutional layers are disclosed. Depthwise separable filters contains a combination of a depthwise convolutional layer followed by a pointwise convolutional layer with input of P feature maps and output of Q feature maps. The first replacement convolutional layer contains P×P of 3×3 filter kernels formed by placing each of the P×1 of 3×3 filter kernels of the depthwise convolutional layer on respective P diagonal locations, and zero-value 3×3 filter kernels zero-value 3×3 filter kernels in all off-diagonal locations. The second replacement convolutional layer contains Q×P of 3×3 filter kernels formed by placing Q×P of 1×1 filter coefficients of the pointwise convolutional layer in center position of the respective Q×P of 3×3 filter kernels, and numerical value zero in eight perimeter positions.
    Type: Grant
    Filed: March 2, 2018
    Date of Patent: July 23, 2019
    Assignee: Gyrfalcon Technology Inc.
    Inventors: Lin Yang, Patrick Z. Dong, Jason Z. Dong, Baohua Sun
  • Patent number: 10354644
    Abstract: Methods of encoding voice data for loading into an artificial intelligence (AI) integrated circuit are provided. The AI integrated circuit may have an embedded cellular neural network for implementing AI tasks based on the loaded voice data. An encoding method may generate a two-dimensional (2D) frequency-time array from an audio waveform, use the 2D frequency-time array to generate a set of 2D arrays to approximate the 2D frequency-time array, load the set of 2D arrays into the AI integrated circuit, execute programming instructions contained in the AI integrated circuit to feed the set of 2D arrays into the embedded cellular neural network in the AI integrated circuit to generate a voice recognition result, and output the voice recognition result. The encoding method also trains a convolution neural network (CNN) and loads the weights of the CNN into the AI integrated circuit for implementing the AI tasks.
    Type: Grant
    Filed: January 15, 2018
    Date of Patent: July 16, 2019
    Assignee: Gyrfalcon Technology Inc.
    Inventors: Xiang Gao, Lin Yang, Wenhan Zhang
  • Patent number: 10347317
    Abstract: An integrated circuit includes an artificial intelligence (AI) logic and an embedded memory coupled to the AI logic and connectable to an external processor. The embedded memory includes multiple storage cells and multiple reference units. One or more reference units in the memory are selected for memory access through configuration at chip packaging level by the external processor. The external processor may execute a self-test process to select or update the one or more reference units for memory access so that the error rate of memory is below a threshold. The self-test process may be performed, via a memory initialization controller in the memory, to test and reuse the reference cells in the memory at chip level. The embedded memory may be a STT-MRAM, SOT, OST MRAM, and/or MeRAM memory.
    Type: Grant
    Filed: October 5, 2017
    Date of Patent: July 9, 2019
    Assignee: Gyrfalcon Technology Inc.
    Inventors: Chyu-Jiuh Torng, Lin Yang, Qi Dong, Daniel H. Liu
  • Patent number: 10339445
    Abstract: Operations of a combination of first and second original convolutional layers followed by a short path are replaced by operations of a set of three particular convolutional layers. The first contains 2N×N filter kernels formed by placing said N×N filter kernels of the first original convolutional layer in left side and N×N filter kernels of an identity-value convolutional layer in right side. The second contains 2N×2N filter kernels formed by placing the N×N filter kernels of the second original convolutional layer in upper left corner, N×N filter kernels of an identity-value convolutional layer in lower right corner, and N×N filter kernels of two zero-value convolutional layers in either off-diagonal corner. The third contains N×2N of kernels formed by placing N×N filter kernels of a first identity-value convolutional layer and N×N filter kernels of a second identity-value convolutional layer in a vertical stack. Each filter kernel contains 3×3 filter coefficients.
    Type: Grant
    Filed: February 14, 2018
    Date of Patent: July 2, 2019
    Assignee: Gyrfalcon Technology Inc.
    Inventors: Lin Yang, Patrick Z. Dong, Charles Jin Young, Baohua Sun
  • Patent number: 10331983
    Abstract: An artificial intelligence inference computing device contains a printed circuit board (PCB) and a number of electronic components mounted thereon. Electronic components include a wireless communication module, a controller module, a memory module, a storage module and at least one cellular neural networks (CNN) based integrated circuit (IC) configured for performing convolutional operations in a deep learning model for extracting features out of input data. Each CNN based IC includes a number of CNN processing engines operatively coupled to at least one input/output data bus. CNN processing engines are connected in a loop with a clock-skew circuit. Wireless communication module is configured for transmitting pre-trained filter coefficients of the deep learning model, input data and classification results.
    Type: Grant
    Filed: September 11, 2018
    Date of Patent: June 25, 2019
    Assignee: Gyrfalcon Technology Inc.
    Inventors: Lin Yang, Patrick Z. Dong, Charles Jin Young, Jason Z. Dong, Dan Bin Liu, Baohua Sun
  • Patent number: 10331367
    Abstract: Embedded memory subsystems in a digital integrated circuit for artificial intelligence are disclosed. A semi-conductor substrate contains CNN processing units. Each CNN processing unit includes CNN logic circuits and an embedded memory subsystem. The memory subsystem includes first memory and second memory. The first memory contains an array of MTJ STT-RAM cells with each cell has a circular planar area with a diameter in a range of 40-120 nm. The second memory contains an array of MTJ STT-RAM cells with each cell has a circular planar area having a diameter in a range of 30-75 nm.
    Type: Grant
    Filed: April 3, 2017
    Date of Patent: June 25, 2019
    Assignee: Gyrfalcon Technology Inc.
    Inventors: Chyu-Jiuh Torng, Lin Yang, Qi Dong
  • Patent number: 10331999
    Abstract: CNN based digital IC for AI contains a number of CNN processing units. Each CNN processing unit contains CNN logic circuits operatively coupling to a memory subsystem having first and second memories. The first memory includes an array of magnetic random access memory (RAM) cells for storing weights (e.g., filter coefficients) and the second memory contains SRAM for storing input signals (e.g., imagery data). The first memory may store one-time-programming weights. The memory subsystem may contain a third memory that contains magnetic RAM cells for storing one-time-programming data for security purpose. The magnetic RAM includes STT-RAM or OST-MRAM in SLC or MLC technology.
    Type: Grant
    Filed: June 23, 2017
    Date of Patent: June 25, 2019
    Assignee: Gyrfalcon Technology Inc.
    Inventors: Chyu-Jiuh Torng, Lin Yang, Qi Dong
  • Patent number: 10331967
    Abstract: Methods of facilitating machine learning via a 2-D symbol are disclosed. Features of an object are received in a first computing system having a 2-D symbol creation application module installed thereon. A multi-layer 2-D symbol is formed from the features according to a set of symbol creation rules. 2-D symbol is a matrix of N×N pixels partitioned into a number of sub-matrices with each sub-matrix containing one feature, where N is a positive integer. Meaning of the combined features in the 2-D symbol is learned in a second computing system by using an image processing technique to classify the 2-D symbol transmitted from the first computing system. The symbol creation rules determine the importance order, size and location of sub-matrices in the 2-D symbol.
    Type: Grant
    Filed: December 5, 2018
    Date of Patent: June 25, 2019
    Assignee: Gyrfalcon Technology Inc.
    Inventors: Lin Yang, Baohua Sun
  • Patent number: 10331368
    Abstract: CNN based digital IC for AI contains a number of CNN processing units. Each CNN processing unit contains CNN logic circuits operatively coupling to a memory subsystem. A first subsystem includes an array of first magnetic random access memory (RAM) cells for storing weights and an array of second magnetic RAM cells for storing input signals. A second subsystem includes an array of first magnetic RAM cells for storing one-time-programming weights and an array of second magnetic RAM cells for storing input signals. A third subsystem includes an array of first magnetic RAM cells for storing weights, an array of second magnetic RAM cells for storing input signals and an array of third magnetic RAM cells for storing one-time-programming unique data pattern for security identification. Either MLC STT-RAM or MLC OST-MRAM containing at least two MTJ elements can be configured as different memories for forming memory subsystem.
    Type: Grant
    Filed: May 9, 2017
    Date of Patent: June 25, 2019
    Assignee: Gyrfalcon Technology Inc.
    Inventors: Chyu-Jiuh Torng, Lin Yang, Qi Dong
  • Patent number: 10325147
    Abstract: Methods of recognizing motions of an object in a video clip or an image sequence are disclosed. A plurality of frames are selected out of a video clip or an image sequence of interest. A text category is associated with each frame by applying an image classification technique with a trained deep-learning model for a set of categories containing various poses of an object within each frame. A “super-character” is formed by embedding respective text categories of the frames as corresponding ideograms in a 2-D symbol having multiple ideograms contained therein. Particular motion of the object is recognized by obtaining the meaning of the “super-character” with image classification of the 2-D symbol via a trained convolutional neural networks model for various motions of the object derived from specific sequential combinations of text categories. Ideograms may contain imagery data instead of text categories, e.g., detailed images or reduced-size images.
    Type: Grant
    Filed: March 2, 2019
    Date of Patent: June 18, 2019
    Assignee: Gyrfalcon Technology Inc.
    Inventors: Lin Yang, Patrick Z. Dong, Baohua Sun
  • Patent number: 10311861
    Abstract: Methods of encoding voice data for loading into an artificial intelligence (AI) integrated circuit are provided. The AI integrated circuit may have an embedded cellular neural network for implementing AI tasks based on the loaded voice data. An encoding method may generate a two-dimensional (2D) frequency-time array from an audio waveform, apply a probability function to the 2D frequency-time array to generate a set of 2D arrays, load the set of 2D arrays into the AI integrated circuit, execute programming instructions contained in the AI integrated circuit to feed the set of 2D arrays into the embedded cellular neural network in the AI integrated circuit to generate a voice recognition result, and output the voice recognition result. The encoding method also trains a convolution neural network (CNN) and loads the weights of the CNN into the AI integrated circuit for implementing the AI tasks.
    Type: Grant
    Filed: January 15, 2018
    Date of Patent: June 4, 2019
    Assignee: Gyrfalcon Technology Inc.
    Inventors: Xiang Gao, Lin Yang, Wenhan Zhang
  • Patent number: 10311294
    Abstract: Methods of recognizing motions of an object in a video clip or an image sequence are disclosed. A plurality of frames are selected out of a video clip or an image sequence of interest. A text category is associated with each frame by applying an image classification technique with a trained deep-learning model for a set of categories containing various poses of an object within each frame. A “super-character” is formed by embedding respective text categories of the frames as corresponding ideograms in a 2-D symbol having multiple ideograms contained therein. Particular motion of the object is recognized by obtaining the meaning of the “super-character” with image classification of the 2-D symbol via a trained convolutional neural networks model for various motions of the object derived from specific sequential combinations of text categories. Ideograms may contain imagery data instead of text categories, e.g., detailed images or reduced-size images.
    Type: Grant
    Filed: March 2, 2019
    Date of Patent: June 4, 2019
    Assignee: Gyrfalcon Technology Inc.
    Inventors: Lin Yang, Patrick Z. Dong, Baohua Sun
  • Patent number: 10311149
    Abstract: Natural language translation device contains a bus, an input interface connecting to the bus for receiving a source sentence in a first natural language to be translated to a target sentence in second natural language one word at a time in sequential order. A two-dimensional (2-D) symbol containing a super-character characterizing the i-th word of the target sentence based on the received source sentence is formed in accordance with a set of 2-D symbol creation rules. The i-th word of the target sentence is obtained by classifying the 2-D symbol via a deep learning model that contains multiple ordered convolution layers in a Cellular Neural Networks or Cellular Nonlinear Networks (CNN) based integrated circuit.
    Type: Grant
    Filed: August 8, 2018
    Date of Patent: June 4, 2019
    Assignee: Gyrfalcon Technology Inc.
    Inventors: Lin Yang, Patrick Z. Dong, Catherine Chi, Charles Jin Young, Jason Z Dong, Baohua Sun
  • Patent number: 10296824
    Abstract: Fabrication methods of forming memory subsystem of CNN based digital IC for AI are disclosed. The method in SLC technology includes: providing a metal layer, forming a via layer, forming a HSL, forming a MTJ element layer and then etching out unmasked portions of the MTJ element layer to form at least two groups of different sized MTJ elements. The method in MLC technology includes: providing a metal layer, forming a via layer, forming a first HSL, forming a first MTJ element layer, etching out unmasked portions of the first MTJ element layer to form lower MTJ elements, forming a second HSL, forming a second MTJ element layer and etching out unmasked portions of the second MTJ element layer to form upper MTJ elements. Same sized first MTJ element layer and the second HSL are formed together.
    Type: Grant
    Filed: June 23, 2017
    Date of Patent: May 21, 2019
    Assignee: Gyrfalcon Technology Inc.
    Inventors: Chyu-Jiuh Torng, Lin Yang, Qi Dong
  • Patent number: 10296817
    Abstract: Apparatus for recognition of handwritten Chinese characters contains a bus, an input means connecting to the bus for receiving input imagery data created from a handwritten Chinese character, a Cellular Neural Networks or Cellular Nonlinear Networks (CNN) based integrated circuit operatively connecting to the bus for extracting features out of the input imagery data using pre-trained filter coefficients of a plurality of order convolutional layers stored therein, a memory connecting the bus, the memory being configured for storing weight coefficients of fully-connected (FC) layers, a processing unit connecting to the bus for performing computations of FC layers to classify the extracted features from the CNN based integrated circuit to a particular Chinese character in a predefined Chinese character set, and a display unit connecting to the bus for displaying the particular Chinese character.
    Type: Grant
    Filed: March 30, 2018
    Date of Patent: May 21, 2019
    Assignee: Gyrfalcon Technology Inc.
    Inventors: Lin Yang, Patrick Z. Dong, Charles Jin Young, Jason Dong, Wenhan Zhang, Baohua Sun
  • Patent number: 10275646
    Abstract: Methods of recognizing motions of an object in a video clip or an image sequence are disclosed. A plurality of frames are selected out of a video clip or an image sequence of interest. A text category is associated with each frame by applying an image classification technique with a trained deep-learning model for a set of categories containing various poses of an object within each frame. A “super-character” is formed by embedding respective text categories of the frames as corresponding ideograms in a 2-D symbol having multiple ideograms contained therein. Particular motion of the object is recognized by obtaining the meaning of the “super-character” with image classification of the 2-D symbol via a trained convolutional neural networks model for various motions of the object derived from specific sequential combinations of text categories. Ideograms may contain imagery data instead of text categories, e.g., detailed images or reduced-size images.
    Type: Grant
    Filed: January 3, 2018
    Date of Patent: April 30, 2019
    Assignee: Gyrfalcon Technology Inc.
    Inventors: Lin Yang, Patrick Z. Dong, Baohua Sun
  • Patent number: 10230045
    Abstract: Systems and methods for forming embedded memory in a processing unit. The methods include: depositing a dielectric layer on a metal landing pad of a logic circuit of a processing unit; opening vias in the dielectric layer; filling in the vias; performing chemical mechanical polishing (CMP); depositing an adhesion and topography planarization (ATP) layer; etching away portions of the ATP layer; filling in with inter layer dielectric (ILD) materials; performing CMP; depositing a MTJ film layer; patterning and etching away portions of the MTJ film layer; filling in with dielectric materials; performing CMP; and forming a bit line on the top layer. The methods may also include annealing in a forming gas during different steps of the above processed to reduce the high stress from the making of multi-metal layers of the processing unit at high temperature. This may prevent wafer warpage and/or significant topography in the fabrication process.
    Type: Grant
    Filed: July 5, 2017
    Date of Patent: March 12, 2019
    Assignee: Gyrfalcon Technology Inc.
    Inventors: Chyu-Jiuh Torng, Qi Dong, Lin Yang