Abstract: A circuit comprising: an execution unit; a plurality of addressable devices; and a data transfer engine coupled to the execution unit and to the devices, operable to fetch a plurality of descriptors under control of the execution unit, and based on each of the fetched descriptors to perform a transfer of data from a respective first to a respective second of the devices. The DMA engine comprises delay circuitry operable to block, during a delay period running from an earlier of the transfers, any later of the transfers involving at least one of the same devices as the earlier transfer, the delay circuitry being arranged to control the blocking in dependence on an indication received in one of the descriptors.

Abstract: Wireless receiver and method of operating a wireless receiver in a wireless communication network for: receiving a signal, the received signal comprising data containing at least one symbol from a symbol alphabet, the symbol alphabet consisting of complex values that define a direction in the complex plane, the received signal further comprising interference; measuring the variance of a first component of the received signal that is perpendicular to the defined direction in the complex plane; estimating the interference power of the received signal using the measured variance of the first component of the received signal; estimating a total power of the received signal; estimating the power of the at least one symbol of the received signal by subtracting the estimated interference power from the estimated total power of the received signal; and based on the estimated interference power and the estimated power of the at least one symbol of the received signal, performing at least one of the steps of: processin

Abstract: In one aspect, there is provided a method of processing a signal received using a wireless communication channel by a receiver in a wireless cellular network. In one embodiment, the method comprises receiving signal samples of a signal to be processed from a serving cell, identifying a second of dominant interfering cells generating an interfering signal, using a number of cells in the set to select an interference scenario, and using the selected interference scenario and at least one parameter related to the serving cell and the interfering cells to select a processing function for processing the signal.

Abstract: A system and method for processing digital samples from a signal received via a wireless transmission channel in a wireless communications system. The method comprises: comparing a target signal quality value with an estimated received signal quality value; detecting if the estimated received signal quality value exceeds the target signal quality value for a period; and selecting one of a plurality of processing routines of differing sensitivities for processing the digital samples.

Abstract: A fractional rate converting filter in a wireless transceiver comprising a delay line, multiplier circuit, adder circuit, and selector. The delay line receives a digital input signal at a first sample rate and has delay blocks each providing an output and receiving samples gated at a plurality of clock cycles of an integer sub-multiple frequency of a clock. The outputs are multiplied by corresponding filter tap coefficients. Each filter tap coefficient is spaced by a first integer Y. The adder circuit receives and sums the tap outputs to provide an output signal. The selector iteratively shifts the coefficients by a second integer Z. The output of each delay block is multiplied by corresponding shifted filter tap coefficients. The delay blocks are inhibited from receiving another input sample during the plurality of clock cycles. The output signal has a second sample rate at the integer sub-multiple frequency of the clock.

Abstract: Disclosed herein is a method of accessing a slave device from a circuit including a central processing unit, a data transfer engine, and an interface to the slave device. In one embodiment, the method includes: executing code on the central processing unit to set up the data transfer engine to access the slave device; and based on the set-up, operating the data transfer engine to supply a read request word to a transmit buffer of the interface for transmission to the slave device, and, after return of a corresponding response word to a first-in-first-out receive buffer of the interface, to disable the first-in-first-out receive buffer from receiving any further data such that the last word therein is assured to be the response word. The method further includes using an underflow mechanism of the first-in-first-out receive buffer to determine the last word therein and hence determine the response word.

Abstract: The invention provides a receiver comprising a data input and a strobe input. The strobe signal transitions whenever two consecutive bits in the data signal are the same. The receiver comprises combining means for generating a recovered clock signal from a combination of the data and strobe signals. The receiver also comprises a first sampling stage arranged to sample the data signal in dependence on the recovered clock signal, the first sampling stage comprising a plurality of sampling circuits and being arranged to obtain consecutive samples of the data signal using alternating ones of the sampling circuits. A second sampling stage is arranged to sample the data from the first sampling stage in dependence on a local system clock signal.

Abstract: Circuitry and a method for use in a radio frequency receiver for processing a radio frequency signal are provided. The circuitry comprises a mixer arranged to receive the radio frequency signal and down-convert the received radio frequency signal to a lower frequency. The received radio frequency signal has an interference component and the interference component in the down-converted signal is within an interference frequency range. The circuitry also comprises an LC based notch filter arranged to receive the down-converted signal from the mixer, filter the down-converted signal, and output the filtered signal for processing by a baseband processing block. The LC based notch filter has a notch centered within said interference frequency range, such that the LC based notch filter is arranged to attenuate the interference component in the down-converted signal.

Abstract: A driver circuit for supplying a drive signal to a mixer circuit comprising a first and second circuit branch and an operational amplifier. The first circuit branch receives an input signal and a bias signal. The second circuit branch receives the input signal. The operational amplifier has a first input connected to a junction node of the first circuit branch and a second input connected to a junction node of the second circuit branch. The operational amplifier is arranged to provide an operational amplifier output signal a second component of the second circuit branch so that a voltage at the junction node of the second circuit branch is equal to a voltage at the junction node of the first circuit branch. The voltage is dependent on the input signal and providing the drive signal.

Abstract: A computer processor with control and data processing capabilities comprises a decode unit for decoding instructions. A data processing facility comprises a first data execution path including fixed operators and a second data execution path including at least configurable operators, the configurable operators having a plurality of predefined configurations, at least some of which are selectable by means of an opcode portion of a data processing instruction. The decode unit is operable to detect whether a data processing instruction defines a fixed data processing operation or a configurable data processing operation, said decode unit causing the computer system to supply data for processing to said first data execution path when a fixed data processing instruction is detected and to said configurable data execution path when a configurable data processing instruction is detected.

Abstract: A computer processor comprises a decode unit and a processing channel. The decode unit decodes a stream of instruction packets from a memory, each instruction packet comprising a plurality of instructions. The processing channel comprises a plurality of functional units and operable to perform control processing operations. The decode unit is operable to receive and decode instruction packets of a bit length of 64 bits and to detect if the instruction packet defines three control instructions each having a length of 21 bits. The decode unit detects that the instruction packet comprises the three control instructions. The control instructions are supplied to the processing channel for execution in the order in which they appear in the instruction packet. The detection uses an identification bit in the instruction packet.

Abstract: The present invention provides a method of protecting against errors in a boot memory, the method comprising initiating booting of a processor by executing primary boot code from a primary boot memory, and based on the execution of the primary boot code: accessing a data structure comprising a plurality of redundant portions of boot information stored on a secondary boot memory; performing an error check on a plurality of the portions to determine whether those portions contain errors and, based on the error checks, to identify a valid portion; and booting the processor using the valid portion of boot information.

Abstract: A digital linear transmitter for digital to analog conversion of a radio frequency signal. The transmitter includes a delta sigma (??) digital to analog converter (DAC) and a weighted signal digital to analog converter in the transmit path of a wireless device to reduce reliance on relatively large analog components. The ?? DAC converts the lowest significant bits of the oversampled signal while the weighted signal digital to analog converter converts the highest significant bits of the oversampled signal. The transmitter core includes components for providing an oversampled modulated digital signal which is then subjected to first order filtering of the oversampled signal prior to generating a corresponding analog signal. The apparatus and method reduces analog components and increases digital components in transmitter core architecture of wireless RF devices.

Abstract: A method of power control in a wireless communication system wherein blocks are transmitted from a transmitter to a receiver on multiple wireless transport channels. The method comprises comparing a target signal quality value with a received signal quality value and providing the results of the comparing step to the transmitter to adjust transmit power based on the comparing step. A corresponding receiver is also provided.

Abstract: A method and system for fractionally converting sample rates. Fractional rate conversion for a transmit path of a transceiver is achieved by upsampling an input signal having a first sample rate by a first integer factor, removing aliasing resulting from the upconversion process, and then downsampling the intermediate signal by a second integer factor to provide a final signal having a second sample rate. The first factor and the second factor are selected to obtain a desired output sample rate that is a fraction of the sample rate of the input signal.

Abstract: A method of power control in a wireless communication system, wherein blocks are transmitted from a transmitter to a receiver via a wireless transport channel. The method comprises comparing a target signal quality value with a received signal quality value and providing the results of the comparing step to the transmitter to adjust transmit power based on the comparing step. The target signal quality value is set by the following steps: determining an initial target value; detecting if a data block has been received; detecting if received blocks have been successfully decoded; and decreasing the target value when pass blocks are received and increasing the target value when failed blocks are received subject to monitoring a period of inactivity on the transport channel in which no blocks are received.

Abstract: A method and system for generating channel estimates for processing signals received through first and second transmission channels in a wireless communications network, each channel corresponding to a separate transmit antenna, and each signal comprising a plurality of samples derived from symbols transmitted in the signal by: generating first variable z1 (k) and second variable z2 (k); and providing a set of filter coefficients (I) and generating first and second channel estimates using first and second variables and a set of filter coefficients.

Abstract: A method of power control in a wireless communications system wherein blocks are transmitted from a transmitter to a receiver via a wireless transmission channel. The method comprises comparing a target signal quality value with a received signal quality value and providing the results of the comparing step to the transmitter to adjust transmit power based on the comparing step. The target signal quality value is set by the following steps: determining an initial target value; determining if received blocks have been successfully decoded; identifying the received blocks as pass or fail blocks; when pass blocks are received, comparing the target signal quality value with the received signal quality value and decreasing the target value only if the target value is greater than the received signal quality value less a margin.

Abstract: A method, receiver and program for processing radio signals to identify an n-ray channel condition. The method comprises: receiving signal samples and estimating a plurality of channel taps from the a samples; estimating for each of the channel taps a signal power and a disturbance power; filtering the signal power to provide a filtered signal power quantity; filtering the disturbance power to provide a filtered disturbance power quantity; using the filtered power quantities to determine n strongest channel taps; generating first and second comparison parameters using the strongest channel taps and at least one other channel tap; providing a comparison result based on the first and second comparison parameters and a thresh-old value, and; identifying an n-ray channel condition from the comparison result.

Abstract: A method for limiting peak-to-average power of a signal transmitted from a power amplifier. The method comprises: applying a pulse-shape filter to a first signal, thereby generating a second signal being a filtered version of the first signal; and outputting the second signal for transmission from a power amplifier. The method further comprises: applying each of a plurality of predictor filters to a respective instance of the first signal, each predictor filter approximating the application of the pulse-shape filter to the first signal based on a different respective set of filter coefficients, and each thereby generating a respective third signal. The method also further comprises determining an indicator of amplitude of each of the third signals, selecting the indicator corresponding to the largest of those amplitudes, generating a modifier based on the selected indicator, and using the modifier to limit the first signal prior to applying the pulse-shape filter.