Patents Assigned to Icera, Inc.
  • Publication number: 20100322191
    Abstract: There is disclosed a method of controlling physical channel establishment in a wireless communication system, which method comprises: a.) determining if decoding of a system frame number is required as part of an initialization of a physical channel establishment procedure; b.) if decoding of the system frame number is not required, initializing a decoding of a system frame number for the channel to be established; and c.) if the decoding of the system frame number fails, terminating the channel establishment procedure.
    Type: Application
    Filed: November 28, 2008
    Publication date: December 23, 2010
    Applicant: ICERA INC.
    Inventor: Damien Lefebvre
  • Publication number: 20100322094
    Abstract: There is disclosed a method of determining one or more candidate frequencies for a carrier signal in a received signal, which method comprises: generating a narrowband spectrum of the received signal; detecting one or more peaks in the narrowband spectrum; generating a candidate frequency list, each frequency at which a peak occurs being included in the candidate frequency list. The method further comprises: removing the detected one or more peaks from the narrowband spectrum to generate a modified narrowband spectrum; detecting one or more further peaks in the modified narrowband spectrum; and modifying the candidate frequency list in dependence on the one or more further peaks.
    Type: Application
    Filed: December 11, 2008
    Publication date: December 23, 2010
    Applicant: ICERA INC.
    Inventors: Steve Allpress, Laolu Lijofi, Donal Price
  • Publication number: 20100309850
    Abstract: A method of power control in a wireless communications system wherein blocks are transmitted from a transmitter to a receiver via a wireless transmission channel. The method comprises comparing a target signal quality value with a received signal quality value and providing the results of the comparing step to the transmitter to adjust transmit power based on the comparing step. The target signal quality value is set by the following steps: determining an initial target value; determining if received blocks have been successfully decoded; identifying the received blocks as pass or fail blocks; when pass blocks are received, comparing the target signal quality value with the received signal quality value and decreasing the target value only if the target value is greater than the received signal quality value less a margin.
    Type: Application
    Filed: December 11, 2008
    Publication date: December 9, 2010
    Applicant: ICERA INC.
    Inventors: Edward Andrews, Jonathan Wallington, Carlo Luschi
  • Publication number: 20100304779
    Abstract: A method of power control in a wireless communication system, wherein blocks are transmitted from a transmitter to a receiver via a wireless transport channel. The method comprises comparing a target signal quality value with a received signal quality value and providing the results of the comparing step to the transmitter to adjust transmit power based on the comparing step. The target signal quality value is set by the following steps: determining an initial target value; detecting if a data block has been received; detecting if received blocks have been successfully decoded; and decreasing the target value when pass blocks are received and increasing the target value when failed blocks are received subject to monitoring a period of inactivity on the transport channel in which no blocks are received.
    Type: Application
    Filed: December 11, 2008
    Publication date: December 2, 2010
    Applicant: ICERA INC.
    Inventors: Edward Andrews, Jonathan Wallington, Carlo Luschi
  • Publication number: 20100304769
    Abstract: An inter-radio-access-technology device comprising: an interface for communicating over a wireless cellular network, and a processor arranged to execute code for performing operations handling communications via the interface according to a plurality of different radio access technologies. The processor is operable to execute code using any selected one of a plurality of different instruction sets, each set being configured for performing operations according to a respective one of the radio access technologies. The device is operable to dynamically switch between the radio access technologies, by selecting corresponding code for execution by the processor and selecting the corresponding instruction set for use in execution of the selected code.
    Type: Application
    Filed: November 12, 2008
    Publication date: December 2, 2010
    Applicant: ICERA INC.
    Inventors: Simon Fellows, Simon Huckett, Godfrey Da Costa
  • Publication number: 20100296553
    Abstract: A method of processing digital samples of a signal received at a receiver of a wireless communication system includes monitoring channel conditions and generating a channel indicator including at least one channel parameter by performing at least one of: estimating a channel mobility parameter and comparing it with a threshold; estimating a channel parameter of the energy of the channel outside a predefined temporal window and comparing it with a threshold; estimating a channel temporal duration parameter and establishing if it meets predetermined criteria; estimating a channel-zero location parameter and establishing if it meets predetermined criteria; estimating a received-signal signal-to-disturbance power ratio and comparing it to a threshold; estimating an estimated-channel-response signal-to-disturbance power ratio; estimating the degree of non-stationarity of the disturbance at the receiver input; and selecting one of a plurality of processing routines for processing the digital samples based on said c
    Type: Application
    Filed: June 4, 2010
    Publication date: November 25, 2010
    Applicant: Icera Inc.
    Inventors: Carlo Luschi, Gang Wang
  • Publication number: 20100290547
    Abstract: A method and system for generating channel estimates for processing signals received through first and second transmission channels in a wireless communications network, each channel corresponding to a separate transmit antenna, and each signal comprising a plurality of samples derived from symbols transmitted in the signal by: generating first variable z1 (k) and second variable z2 (k); and providing a set of filter coefficients (I) and generating first and second channel estimates using first and second variables and a set of filter coefficients.
    Type: Application
    Filed: December 4, 2008
    Publication date: November 18, 2010
    Applicant: ICERA INC.
    Inventors: Carlo Luschi, Abdelkader Medles
  • Publication number: 20100284500
    Abstract: A method and corresponding system for generating an estimate of at least one of a signal power, a noise power and a signal to interference ratio for signal samples received via first and second wireless channels, the signal samples corresponding to pilot symbols transmitted in respective different structures via the first and second wireless channels. The method comprises: calculating first and second variables, each variable being a sequence of values computed from the received signal samples and the pilot symbols for each respective first and second wireless channel; generating first and second channel estimates from the first and second variables; combining the first and second channel estimates to generate a combined channel estimate; and generating at least one of the signal power, noise power and SIR using the combined channel estimate.
    Type: Application
    Filed: December 4, 2008
    Publication date: November 11, 2010
    Applicant: ICERA INC.
    Inventors: Carlo Luschi, Abdelkader Medles
  • Publication number: 20100267418
    Abstract: The disclosure provides a module for use in a wireless electronic device and being removable therefrom. In one embodiment, the module includes an antenna connector for connecting the antenna of the wireless terminal to the module, and transferring radio frequency signals over a wireless interface. The module also includes a first storage means storing user authentication information for use in authenticating a user of the wireless terminal to a wireless cellular network, and a second storage means storing communications code for processing information to be transferred over the wireless interface. The module further includes a processor arranged to execute the communications code in order to process information for communicating between the wireless terminal and the cellular network via the antenna connector.
    Type: Application
    Filed: July 11, 2008
    Publication date: October 21, 2010
    Applicant: ICERA, INC.
    Inventor: Nigel Toon
  • Publication number: 20100254445
    Abstract: Disclosed herein are methods of processing transmissions in a wireless communication system to detect whether a transmission unit contains transmitted data, systems for processing transmissions in a digital communications system to detect the same, receivers for processing transmissions in a wireless communications system and computer readable media implementing a method for processing the same. In one embodiment, a method of processing transmissions in a wireless communication system to detect whether a transmission unit contains transmitted data includes: generating an averaged function of bit reliability indicators from a plurality of received samples and applying a test to compare an average of ln cos h(ยท) (natural logarithm of the hyperbolic cosine) values for the reliability indicators, with a factor proportional to an average signal-to-disturbance ratio of the plurality of samples to determine if the transmission unit contains transmitted data.
    Type: Application
    Filed: June 20, 2008
    Publication date: October 7, 2010
    Applicant: ICERA, INC.
    Inventors: Edward Andrews, Carlo Luschi, Jonathan Wallington
  • Publication number: 20100254469
    Abstract: A method and corresponding receiver for transmitting channel quality data for a channel in a wireless communication system are provided. The method comprises determining channel quality metrics for frequency intervals within the channel, selecting groups of frequency intervals based on the determined metrics, and transmitting one or more channel quality indicators for the groups. The invention also provides a method of transmitting over a channel based on such channel quality indicators feedback from a receiver, and a corresponding transmitter.
    Type: Application
    Filed: September 18, 2008
    Publication date: October 7, 2010
    Applicant: ICERA INC.
    Inventors: Carlo Luschi, Tarik Tabet
  • Patent number: 7796700
    Abstract: According to an embodiment of the invention, a method and system is disclosed for determining log-likelihood ratios for a coded set of individual bits (40) of a quadrature amplitude modulation (QAM) codeword. In the method at most two constant values (33,35) may be determined to perform a set of predetermined functions, the output of each of function is based on the constant values and at least one received component corresponding to the codeword, to determine log-likelihood ratios (37) for each individual bit of the set of individual bits of the codeword. The QAM codeword may correspond to at least a portion of a signal of a wireless device, such as a mobile third-generation device operating according to a Wideband Code-Division Multiple Access (WCDMA) standard.
    Type: Grant
    Filed: October 26, 2005
    Date of Patent: September 14, 2010
    Assignee: Icera Inc.
    Inventors: Steve Allpress, Steve Felix, Carlo Luschi
  • Publication number: 20100225351
    Abstract: A logic circuit latch including an input stage for receiving a logical input signal and a pair of differential amplifiers, each having an input operatively coupled to the input stage, and at least one of them having an output arranged to supply the logical output of the latch. Each of the differential amplifiers includes a transistor connected as a load, and an output of each of the differential amplifiers is coupled to bias the load transistor of the other differential amplifier. If the latch switches from the transparent state to the closed state while the logical input signal is transitioning between logical levels, the differential amplifiers drive up the logical output of the latch if the logical input signal transitions from a first to a second logical level, and drive down the logical output of the latch if the input signal transitions from the second to the first logical level.
    Type: Application
    Filed: February 26, 2010
    Publication date: September 9, 2010
    Applicant: ICERA INC.
    Inventor: Stephen Felix
  • Publication number: 20100202421
    Abstract: A method, program and apparatus for transmitting a signal in a time slot of a channel comprising a plurality of time slots. Using a transmitter having a processor and a power amplifier, the method comprises: retrieving a reference ramp pattern from a memory; determining an output power level for the slot from a plurality of possible output power levels, each requiring a respective corresponding ramp pattern; executing software on the processor to apply a scaling function to the reference ramp pattern in dependence on the determined output power level, thus generating a scaled ramp pattern corresponding to the pattern required for that determined level; supplying the scaled ramp pattern to a control input of the power amplifier, to control the gain of the power amplifier during the time slot; and using the power amplifier, controlled according to the scaled ramp pattern, to transmit the signal in the time slot.
    Type: Application
    Filed: February 10, 2010
    Publication date: August 12, 2010
    Applicant: ICERA INC.
    Inventor: Donal Price
  • Publication number: 20100185789
    Abstract: Disclosed herein is a method of accessing a slave device from a circuit including a central processing unit, a data transfer engine, and an interface to the slave device. In one embodiment, the method includes: executing code on the central processing unit to set up the data transfer engine to access the slave device; and based on the set-up, operating the data transfer engine to supply a read request word to a transmit buffer of the interface for transmission to the slave device, and, after return of a corresponding response word to a first-in-first-out receive buffer of the interface, to disable the first-in-first-out receive buffer from receiving any further data such that the last word therein is assured to be the response word. The method further includes using an underflow mechanism of the first-in-first-out receive buffer to determine the last word therein and hence determine the response word.
    Type: Application
    Filed: December 21, 2009
    Publication date: July 22, 2010
    Applicant: ICERA INC.
    Inventor: Andrew Bond
  • Publication number: 20100095106
    Abstract: A method, chip and computer program product for booting from a secondary boot source. In one embodiment, the method includes: (1) retrieving primary boot code from an on-chip primary boot source on the same chip as a processor, the primary boot code comprising at least a boot discovery algorithm for determining the location of an external secondary boot source external to said chip, (2) executing the primary boot code on the processor, including the boot discovery algorithm, thus operating the processor to check each of a plurality of locations to determine the location of the external secondary boot source, (3) retrieving the secondary boot code from the determined location and (4) continuing the booting of the processor by executing the secondary boot code on the processor.
    Type: Application
    Filed: October 15, 2009
    Publication date: April 15, 2010
    Applicant: ICERA Inc.
    Inventors: Alan Alexander, Philippe Guasch
  • Publication number: 20100088688
    Abstract: Disclosed herein is a method of optimising an executable program to improve instruction cache hit rate when executed on a processor. A method of predicting instruction cache behaviour of an executable program is also disclosed. According to further aspects of the present invention, there is provided a software development tool product comprising code which when executed on a computer will perform the method of optimising an executable program. A linker product and a computer program are also disclosed.
    Type: Application
    Filed: October 2, 2009
    Publication date: April 8, 2010
    Applicant: ICERA Inc.
    Inventors: David Alan Edwards, Alan Alexander
  • Patent number: 7583106
    Abstract: A circuit comprising: clock circuitry for supplying a first faster clock signal to a first circuit portion and a second slower clock signal to a second circuit portion, and varying the relative frequency of the first and second clock signals. Synchronisation logic generates pulses which indicate when to transfer data between the first and second circuit portions. The clock circuitry generates a first control signal at a predetermined time in each cycle of the first clock signal prior to a predetermined edge, and a second control signal at a predetermined time in each cycle of the second clock signal prior to a predetermined edge. A change in the relative frequency is conditional on a coincidence of the first and second control signals. The synchronisation generates the pulses such that there is at least one cycle of the first clock signal between those pulses, and such that there is only one of those pulses per cycle of the second clock signal.
    Type: Grant
    Filed: December 14, 2007
    Date of Patent: September 1, 2009
    Assignee: Icera, Inc.
    Inventors: Pete Cumming, Jon Mangnall, Graham Cunningham
  • Patent number: 7577048
    Abstract: A double data rate memory interface circuit for transferring data between an interfacing device and double data rate memory device. The interface circuit comprises a data input for receiving a data signal from a first of those devices, and a strobe input for receiving a strobe signal from that first device. The interface circuit also comprises delay circuitry for supplying the data and strobe signals to the other device with a timing offset introduced therebetween. The delay circuitry comprises a software programmable storage medium and a digitally controllable delay element coupled to the storage medium, the delay element being arranged to control the timing offset in dependence on a delay setting programmed into that storage medium.
    Type: Grant
    Filed: December 31, 2007
    Date of Patent: August 18, 2009
    Assignee: Icera, Inc.
    Inventor: Stephen Felix
  • Patent number: 7564274
    Abstract: A system (10,90), apparatus (12,30,40,50,60,70) and method (100) is disclosed for detecting excess current leakage between drain/source of a metal oxide semiconductor (MOS) transistor (36,46) within a complementary MOS (CMOS) environment. A load control (32,42) is arranged as a compliment to the MOS transistor. A comparator (34,44) is electrically connected to the load control and the MOS transistor, and produces an output signal representative of the detection of a current leakage exceeding a threshold. In response to the received output signal indicating an excess current leakage, system voltage/frequency may be adjusted to prevent damage to the CMOS environment.
    Type: Grant
    Filed: February 24, 2005
    Date of Patent: July 21, 2009
    Assignee: Icera, Inc.
    Inventor: Peter William Hughes