Patents Assigned to Imagination Technologies
-
Patent number: 11734553Abstract: Methods for determining a fixed point format for one or more layers of a DNN based on the portion of the output error of the DNN attributed to the fixed point formats of the different layers. Specifically, in the methods described herein the output error of a DNN attributable to the quantisation of the weights or input data values of each layer is determined using a Taylor approximation and the fixed point number format of one or more layers is adjusted based on the attribution. For example, where the fixed point number formats used by a DNN comprises an exponent and a mantissa bit length, the mantissa bit length of the layer allocated the lowest portion of the output error may be reduced, or the mantissa bit length of the layer allocated the highest portion of the output error may be increased. Such a method may be iteratively repeated to determine an optimum set of fixed point number formats for the layers of a DNN.Type: GrantFiled: June 22, 2022Date of Patent: August 22, 2023Assignee: Imagination Technologies LimitedInventor: James Imber
-
Patent number: 11734794Abstract: A binary logic circuit for performing an interpolation calculation between two endpoint values E0 and E1 using a weighting index i for generating an interpolated result P, the values E0 and E1 being formed from Adaptive Scalable Texture Compression (ASTC) colour endpoint values C0 and C1 respectively, the colour endpoint values C0 and C1 being low-dynamic range (LDR) or high dynamic range (HDR) values, the circuit comprising: an interpolation unit configured to perform an interpolation between the colour endpoint values C0 and C1 using the weighting index i to generate a first intermediate interpolated result C2; combinational logic circuitry configured to receive the interpolated result C2 and to perform one or more logical processing operations to calculate the interpolated result P according to the equation: (1) P=?(C2<<8)+C2+32)/64? when the interpolated result is not to be compatible with an sRGB colour space and the colour endpoint values are LDR values; (2) P=?(C2<<8)+128.Type: GrantFiled: July 30, 2021Date of Patent: August 22, 2023Assignee: Imagination Technologies LimitedInventor: Kenneth Rovers
-
Patent number: 11734788Abstract: A SIMD processing unit processes a plurality of tasks which each include up to a predetermined maximum number of work items. The work items of a task are arranged for executing a common sequence of instructions on respective data items. The data items are arranged into blocks, with some of the blocks including at least one invalid data item. Work items which relate to invalid data items are invalid work items. The SIMD processing unit comprises a group of processing lanes configured to execute instructions of work items of a particular task over a plurality of processing cycles. A control module assembles work items into the tasks based on the validity of the work items, so that invalid work items of the particular task are temporally aligned across the processing lanes. In this way the number of wasted processing slots due to invalid work items may be reduced.Type: GrantFiled: October 29, 2021Date of Patent: August 22, 2023Assignee: Imagination Technologies LimitedInventors: John Howson, Jonathan Redshaw, Yoong Chert Foo
-
Patent number: 11734177Abstract: A memory interface for interfacing between a memory bus and a cache memory, comprising: a plurality of bus interfaces configured to transfer data between the memory bus and the cache memory; and a plurality of snoop processors configured to receive snoop requests from the memory bus; wherein each snoop processor is associated with a respective bus interface and each snoop processor is configured, on receiving a snoop request, to determine whether the snoop request relates to the bus interface associated with that snoop processor and to process the snoop request in dependence on that determination.Type: GrantFiled: August 26, 2021Date of Patent: August 22, 2023Assignee: Imagination Technologies LimitedInventors: Martin John Robinson, Mark Landers
-
Patent number: 11734879Abstract: Graphics processing systems can include lighting effects when rendering images. “Light probes” are directional representations of lighting at particular probe positions in the space of a scene which is being rendered. Light probes can be determined iteratively, which can allow them to be determined dynamically, in real-time over a sequence of frames. Once the light probes have been determined for a frame then the lighting at a pixel can be determined based on the lighting at the nearby light probe positions. Pixels can then be shaded based on the lighting determined for the pixel positions.Type: GrantFiled: August 19, 2021Date of Patent: August 22, 2023Assignee: Imagination Technologies LimitedInventors: Jens Fursund, Luke T. Peterson
-
Patent number: 11727895Abstract: A colour processor for mapping an image from source to destination colour gamuts has an input for receiving a source image including a plurality of source colour points expressed according to the source gamut; a colour characterizer configured to, for each source colour point in the source image, determine a position of intersection of a curve with the boundary of the destination gamut; and a gamut mapper configured to, for each source colour point in the source image: if the source colour point lies inside the destination gamut, apply a first translation factor to translate the source colour point to a destination colour point within a first range of values; or if the source colour point lies outside the destination gamut, apply a second translation factor, different to the first translation factor, to translate the source colour point to a destination colour point within a second range of values.Type: GrantFiled: February 17, 2022Date of Patent: August 15, 2023Assignee: Imagination Technologies LimitedInventor: Paolo Fazzini
-
Patent number: 11727549Abstract: A method of filtering a target pixel in an image forms, for a kernel of pixels comprising the target pixel and its neighbouring pixels, a data model to model pixel values within the kernel; calculates a weight for each pixel of the kernel comprising: (i) a geometric term dependent on a difference in position between that pixel and the target pixel; and (ii) a data term dependent on a difference between a pixel value of that pixel and its predicted pixel value according to the data model; and uses the calculated weights to form a filtered pixel value for the target pixel, e.g. by updating the data model with a weighted regression analysis technique using the calculated weights for the pixels of the kernel; and evaluating the updated data model at the target pixel position so as to form the filtered pixel value for the target pixel.Type: GrantFiled: June 22, 2021Date of Patent: August 15, 2023Assignee: Imagination Technologies LimitedInventor: Ruan Lakemond
-
Patent number: 11727623Abstract: Rendering systems that can use combinations of rasterization rendering processes and ray tracing rendering processes are disclosed. In some implementations, these systems perform a rasterization pass to identify visible surfaces of pixels in an image. Some implementations may begin shading processes for visible surfaces, before the geometry is entirely processed, in which rays are emitted. Rays can be culled at various points during processing, based on determining whether the surface from which the ray was emitted is still visible. Rendering systems may implement rendering effects as disclosed.Type: GrantFiled: August 20, 2021Date of Patent: August 15, 2023Assignee: Imagination Technologies LimitedInventor: Luke T. Peterson
-
Patent number: 11727525Abstract: Methods and apparatus for merging tasks in a graphics pipeline in which, subsequent to a trigger to flush a tag buffer, one or more tasks from the flushed tag buffer are generated, each task comprising a reference to a program and plurality of fragments on which the program is to be executed, wherein a fragment is an element of a primitive at a sample position. It is then determined whether merging criteria are satisfied and if satisfied, one or more fragments from a next tag buffer flush are added to a last task of the one or more tasks generated from the flushed tag buffer.Type: GrantFiled: May 28, 2021Date of Patent: August 15, 2023Assignee: Imagination Technologies LimitedInventors: Roger Hernando Buch, Panagiotis Velentzas, Richard Broadhurst, Xile Yang, John W. Howson
-
Patent number: 11721060Abstract: A system and method for performing intersection testing of rays in a ray tracing system. The ray tracing system uses a hierarchical acceleration structure comprising a plurality of nodes, each identifying one or more elements able to be intersected by a ray. The system iteratively obtains ray requests, each of which identifies a ray and a node against which the ray is to be tested, and performs intersection testing based on the ray requests. The number of ray requests obtained in each iteration reduces responsive to an amount of memory occupied by information relating to the rays (undergoing intersection testing) increasing.Type: GrantFiled: September 30, 2021Date of Patent: August 8, 2023Assignee: Imagination Technologies LimitedInventor: Daniel Barnard
-
Patent number: 11721068Abstract: Viewport transformation modules for use in a three-dimensional rendering system wherein vertices are received from an application in a strip. The viewport transformation modules include a fetch module configured to read from a vertex buffer: untransformed coordinate data for a vertex in a strip; information identifying a viewport associated with the vertex; and information identifying a viewport associated with one or more other vertices in the strip. The one or more other vertices in the strip are selected based on a provoking vertex of a primitive to be formed by the vertices in the strip and a number of vertices in the primitive. The viewport transformation modules also include a processing module that performs a viewport transformation on the untransformed coordinate data based on each of the identified viewports to generate transformed coordinate data for each identified viewport; and a write module that writes the transformed coordinate data for each identified viewport to the vertex buffer.Type: GrantFiled: March 2, 2021Date of Patent: August 8, 2023Assignee: Imagination Technologies LimitedInventor: Jairaj Dave
-
Patent number: 11720399Abstract: A method of scheduling tasks within a GPU or other highly parallel processing unit is described which is both age-aware and wakeup event driven. Tasks which are received are added to an age-based task queue. Wakeup event bits for task types, or combinations of task types and data groups, are set in response to completion of a task dependency and these wakeup event bits are used to select an oldest task from the queue that satisfies predefined criteria.Type: GrantFiled: December 1, 2021Date of Patent: August 8, 2023Assignee: Imagination Technologies LimitedInventors: Simon Nield, Adam de Grasse, Luca Iuliano, Ollie Mower, Yoong-Chert Foo
-
Patent number: 11715256Abstract: A method and an intersection testing module for performing intersection testing of a ray with a box in a ray tracing system. The ray and the box are defined in a 3D space using a space-coordinate system, and the ray is defined with a ray origin and a ray direction. A ray-coordinate system is used to perform intersection testing, wherein the ray-coordinate system has an origin at the ray origin, and the ray-coordinate system has three basis vectors. A first of the basis vectors is aligned with the ray direction. A second and a third of the basis vectors: (i) are both orthogonal to the first basis vector, (ii) are not parallel with each other, and (iii) have a zero as one component when expressed in the space-coordinate system. A result of performing the intersection testing is outputted for use by the ray tracing system.Type: GrantFiled: March 23, 2022Date of Patent: August 1, 2023Assignee: Imagination Technologies LimitedInventors: Simon Fenney, Rostam King, Peter Smith-Lacey, Gregory Clark
-
Patent number: 11715255Abstract: Ray tracing systems and computer-implemented methods are described for performing intersection testing on a bundle of rays with respect to a box. Silhouette edges of the box are identified from the perspective of the bundle of rays. For each of the identified silhouette edges, components of a vector providing a bound to the bundle of rays are obtained and it is determined whether the vector passes inside or outside of the silhouette edge. Results of determining, for each of the identified silhouette edges, whether the vector passes inside or outside of the silhouette edge, are used to determine an intersection testing result for the bundle of rays with respect to the box.Type: GrantFiled: March 16, 2022Date of Patent: August 1, 2023Assignee: Imagination Technologies LimitedInventors: Gregory Clark, Steven J. Clohset, Luke T. Peterson
-
Patent number: 11715243Abstract: Anisotropic texture filtering applies a texture at a sampling point in screen space. Calculated texture-filter parameters configure a filter to perform filtering of the texture for the sampling point. The texture for the sampling point is filtered using a filtering kernel having a footprint in texture space determined by the texture-filter parameters. Texture-filter parameters are calculated by generating a first and a second pair of screen-space basis vectors being rotated relative to each other. First and second pairs of texture-space basis vectors are calculated that correspond to the first and second pairs of screen-space basis vectors transformed to texture space under a local approximation of a mapping between screen space and texture space. An angular displacement is determined between a selected pair of the first and second pairs of screen-space basis vectors and screen-space principal axes of a local approximation of the mapping that indicate the maximum and minimum scale factors of the mapping.Type: GrantFiled: November 24, 2021Date of Patent: August 1, 2023Assignee: Imagination Technologies LimitedInventor: Rostam King
-
Patent number: 11715175Abstract: Tiling engines and methods for hierarchically tiling a plurality of primitives. A chain of sorting units includes a top level sorting unit followed by lower level sorting units, the top level sorting unit determining which of a plurality of regions of a render space each of the plurality of primitives at least partially falls within. For each region a primitive at least partially falls within an identifier of that primitive is stored in a queue. Each of the lower level sorting units selects queues of a preceding sorting unit in the chain to process, and determines which of a plurality of sub-regions of the region associated with that queue each of the primitives at least partially falls within. For each such sub-region an identifier of that primitive is stored in a queue of the lower level sorting unit that is associated with that sub-region. An output unit outputs the primitives identified in the queues of the last lower level sorting unit in the chain on a queue by queue basis.Type: GrantFiled: October 19, 2021Date of Patent: August 1, 2023Assignee: Imagination Technologies LimitedInventors: Robert Brigg, Lorenzo Belli
-
Patent number: 11716094Abstract: Methods for converting an n-bit number into an m-bit number for situations where n>m and also for situations where n<m, where n and m are integers. The methods use truncation or bit replication followed by the calculation of an adjustment value which is applied to the replicated number.Type: GrantFiled: May 23, 2022Date of Patent: August 1, 2023Assignee: Imagination Technologies LimitedInventor: Simon Fenney
-
Patent number: 11715254Abstract: Ray tracing systems have computation units (“RACs”) adapted to perform ray tracing operations (e.g. intersection testing). There are multiple RACs. A centralized packet unit controls the allocation and testing of rays by the RACs. This allows RACs to be implemented without Content Addressable Memories (CAMs) which are expensive to implement, but the functionality of CAMs can still be achieved by implemented them in the centralized controller.Type: GrantFiled: February 11, 2022Date of Patent: August 1, 2023Assignee: Imagination Technologies LimitedInventors: Joseph M. Richards, Luke T. Peterson, Steven J. Clohset
-
Patent number: 11710268Abstract: A graphics processing unit (GPU) processes graphics data using a rendering space which is sub-divided into a plurality of tiles. The GPU comprises cost indication logic configured to obtain a cost indication for each of a plurality of sets of one or more tiles of the rendering space. The cost indication for a set of tile(s) is suggestive of a cost of processing the set of one or more tiles. The GPU controls a rendering complexity with which primitives are rendered in tiles based on the cost indication for those tiles. This allows tiles to be rendered in a manner that is suitable based on the complexity of the graphics data within the tiles. In turn, this allows the rendering to satisfy constraints such as timing constraints even when the complexity of different tiles may vary significantly within an image.Type: GrantFiled: May 3, 2022Date of Patent: July 25, 2023Assignee: Imagination Technologies LimitedInventors: John W. Howson, Richard Broadhurst, Steven Fishwick
-
Patent number: 11710263Abstract: A method of rasterising a line in computer graphics determines whether the line's start and/or end is inside a diamond test area within the pixel. If the end is not inside and the start is inside, the pixel is drawn as part of the line. If neither the start nor the end of the line are inside, it is determined whether the line crosses more than one extended diamond edge and if so, it is further determined (i) whether an extended line passing through the start and end is substantially vertical and touches the right point of the diamond area, (ii) if the extended line touches the bottom point of the diamond area, and (iii) whether the extended line is on a same side of each point of the diamond area. If any of (i), (ii) and (iii) is positive, the pixel is drawn as part of the line.Type: GrantFiled: May 14, 2022Date of Patent: July 25, 2023Assignee: Imagination Technologies LimitedInventor: Casper Van Benthem