Abstract: A microfluidic device (100) comprises: a reaction chamber (102); at least a first and a second supply channel (110a, 110b) for allowing transport of a first fluid and a second fluid, respectively, from a fluid supply source (112a, 112b) into the reaction chamber (102), wherein each of the first and the second supply channels (110a, 110b) comprises a side drain (114a, 114b) connected to the supply channel (110a, 110b) between the fluid supply source (112a, 112b) and the reaction chamber (102), wherein the side drain (114a, 114b) is configured to prevent undesired diffusion of the fluid in the supply channel (110a, 110b) into the reaction chamber (102); at least a first and a second outlet (120a, 120b) connected to the reaction chamber (102) for allowing transport of fluid from the reaction chamber (102), wherein the first and second outlets (120a, 120b) have different dimensions to provide different hydraulic resistance.

Abstract: An image sensor comprises at least two vertically stacked photo-sensitive devices wherein each respective photo-sensitive device comprises a stack of a top electrode, a first charge transport layer and an active layer. Each respective stack generates electrical charges in response to a corresponding predefined range of wavelengths of light incident on the image sensor. Each photo-sensitive device further comprises a second charge transport layer having a first portion, vertically aligned underneath the active layer, and a second portion, transfer region, protruding laterally to extend beyond the active layer. A dielectric layer separates the first portion from a bottom electrode providing a voltage for depleting the first portion, and the transfer region from a transfer gate providing a voltage for transferring the generated electrical charge to a floating electrical connection, shared by all stacked photo-sensitive devices. The floating electrical connection couples to a read-out-circuitry.

Abstract: Josephson junction based logic devices and methods for their use are described. An example Josephson junction based logic device includes a two-input OR/AND (OA2) gate. The OA2 gate includes a first input node inductively coupled to a first input source and a second input node inductively coupled to a second input source. The first and second input sources are configured to provide single-flux-quantum (SFQ) pulses. The OA2 gate also includes first plurality of inductors coupled between the first input node and one of: a first output node or a second output node. The OA2 gate additionally includes a second plurality of inductors coupled between the second input node and one of: the first or the second output nodes. The OA2 gate also includes Josephson junctions coupled between a common node and one of: the first or the second input node, or the first or the second output node.

Abstract: The present invention provides a flexible ultrasound transducer for an ultrasound monitoring system for examining a curved object. The ultrasound transducer comprises an integrated circuit structure and a multi-layered structure, said multi-layered structure comprising an array of ultrasound transducing elements arranged in a first layer structure and configured for generating ultrasonic energy propagating along a main transducer axis Z and an array of control circuits arranged in a second layer structure, and wherein the array of control circuits and the integrated circuit structure are configured for operating the array of ultrasound transducing elements in said first layer structure, Further, the multi-layered structure comprises at least one flexible layer arranged so that the bending flexibility of the multi-layered structure permits the ultrasound transducer to form a continuous contact with said curved object during operation.

Abstract: According to an aspect of the present inventive concept there is provided a device for imaging of a microscopic object, the device comprising: an array of light sensitive areas sensitive to detect light spanning a wavelength range of at least 400-1200 nm; at least one light source comprising at least a first point of operation in which the at least one light source is configured to generate visible light, and a second point of operation in which the at least one light source is configured to generate infrared light, and being arranged to illuminate the microscopic object such that light is scattered by the microscopic object; wherein the array of light sensitive areas is configured to detect an interference pattern formed between the scattered light and non-scattered light; the device being configured to be set in a selected point of operation from the at least first and second points of operation, for detecting the interference pattern for imaging the microscopic object at a wavelength defined by the sele

Abstract: A system is provided for performing secure key exchange between a plurality of nodes of a communication network. The system comprises a master node and at least two slave nodes. In this context, the master node is configured to authenticate the at least two slave nodes with a pair-wise authentication key corresponding to each pair of master node and slave nodes. The master node is further configured to generate a group authentication key common to the plurality of nodes. Furthermore, the master node is configured to encrypt the group authentication key with the pair-wise authentication key for each respective pair of master node and slave nodes, thereby generating a respective encrypted group authentication key. Moreover, the master node is configured to communicate the encrypted group authentication key to the respective slave nodes.

Abstract: A method for forming a nanopore transistor and a nanopore transistor is provided. The method includes: (a) forming an aperture in a filler material by: (i) providing a fin comprising a semiconductor layer and a top layer; (ii) patterning the top layer to form a pillar; (iii) embedding the pillar in a filler material; (iv) removing the pillar, leaving an aperture; (v) lining the aperture with a spacer material; (b) forming a nanopore by etching through the aperture; (b) lining the nanopore with a dielectric, (c) forming a source and a drain by either: between steps a.ii and a.iii, doping the bottom semiconductor layer by using the pillar as a mask, or after step c, filling the aperture with a sealing material, thereby forming a post; removing the filler material; doping the bottom semiconductor layer by using the post as a mask; and removing the sealing material.

Abstract: According to an aspect of the present inventive concept there is provided a light distribution device comprising a waveguide comprising a light coupling portion for light propagation, and a slab layer comprising a light coupling edge arranged at a boundary of the slab layer, configured for light propagation. The light coupling portion extends alongside and at a distance from the light coupling edge, forming a gap therebetween. The light distribution device is configured to allow light in the waveguide to be coupled into the slab layer across the gap. The slab layer is configured to propagate light coupled into the slab layer such that an interference pattern is formed in the slab layer, and for control of the interference pattern.

Abstract: A beam-steering antenna system for improving the angular coverage comprises a transmission line comprising a first end and a second end. The antenna system further comprises a plurality of antenna elements selectively coupled to the transmission line for selectively coupling energy within the transmission line to the plurality of antenna elements. Furthermore, the antenna system comprises a power amplifier coupled to the first end of the transmission line configured to couple-in an input signal into the transmission line during a first operating period. Moreover, the antenna system comprises a delay line coupled to the second end of the transmission line configured to reflect a portion of the input signal into the transmission line, thereby providing a reflection signal during a second operating period.

Abstract: A slope analog-to-digital converter, ADC, comprises: an input unit comprising a sampling capacitor, wherein the input unit is configured to during an initial period obtain a sampled value of an analog input signal and, during a conversion period, hold the sampled value across the sampling capacitor; and a comparator configured to determine a most significant bit of the analog input signal during the initial period; wherein the ADC during the conversion period is configured to receive a slope signal and to be adapted based on the determined most significant bit such that the comparator is further configured to adaptively compare the sampled value and the slope signal for converting the sampled value to a digital representation.

Abstract: A method for continuously separating components from a sample includes providing a field-flow fractionation device including: a channel coupled to a flow generator for translocating the sample components along the channel in a first direction, an actuator for translocating the sample components in a second direction, at an angle with the first direction, and an array of electrodes electrically or capacitively connected to an AC power source, operating the actuator so as to translocate the sample components in a second direction at an angle with the first direction, operating the AC power source so as to generate an AC electric field between adjacent rows, and operating the flow generator, collecting sample components from the sample outlets.

Abstract: A device for light-based analysis of a substance in a liquid sample comprises: an analysis cell for holding the liquid sample; wherein the analysis cell comprises a first wall portion for passing light generated by a light source into the analysis cell, and a second wall portion for passing light from the analysis cell to a light detector; and a plunger configured for movement along walls of the analysis cell for allowing entry of the liquid sample into the analysis cell and pushing the liquid sample out of the analysis cell; wherein at least one wiper is arranged on the plunger for cleaning the first and second wall portions during movement of the plunger.

Abstract: The current invention concerns a method, a computer system, and a computer program product for blood vessel image extraction from ultrasound signals, and a method and apparatus for ultrasound imaging A set of ultrasound signals at successive times in a plurality of spatial points is obtained. The ultrasound signals are decomposed as a sum of terms. Each term consists of a time-independent spatial component image factor and a space-independent temporal component signal. The spatial component images are mutually orthonormal. The temporal component signals are mutually orthogonal. A sharpened spatial image for each of multiple spatial component images is determined. A processed image being a bilinear combination of multiple sharpened spatial images is generated.

Abstract: A system and method of simulating device aging based on a digital waveform representative of a workload of an electronic device are disclosed. In one aspect, the method comprises grouping contiguous sets of cycles into segments, each set corresponding to a segment. Each segment has values for a combination of segment parameters that are unique from each of the other segments and a start point that is separated from a start point of an adjacent segment by a pre-defined distance criterion. Grouping the sets into the segments comprises, for each segment: sampling one or more sequential cycles of the workload, generating the segment based on the sampled contiguous cycles having a period exceeding a threshold period, and determining the values for the combination of segment parameters. The method further comprises applying an aging model to the segments to simulate the aging. The segments are a representation of the digital waveform.

Abstract: A method of etching an indium gallium zinc oxide (IGZO) structure is provided. In one aspect, the method includes exposing the IGZO structure to a reactant flow including a hydrocarbon-based reactant. Thereby, a reactant layer is formed on the IGZO structure. The method also includes exposing the reactant layer formed on the IGZO structure to an argon flow. Thereby, one or more reactant molecules are removed from the reactant layer. The one or more reactant molecules, which are removed from the reactant layer formed on the IGZO structure, are removed together with one or more IGZO molecules, thus leading to an etching of the IGZO structure.

Abstract: According to an aspect of the present inventive concept there is provided a method for forming source/drain contacts, the method comprising: depositing a material layer over a first and second layer stack formed in a first and second device region of a substrate, respectively, each layer stack comprising a number of semiconductor channel layers and the layer stacks being separated by a trench filled with insulating material to form an insulating wall between the layer stacks and between the device regions; forming a contact partition trench in the material layer at a position above the insulating wall, and filling the contact partition trench with an insulating material to form a contact partition wall on top of the insulating wall; forming a first and a second source/drain contact trench on mutually opposite sides of the contact partition wall, the first source/drain contact trench being formed above a source/drain region in the first device region, and the second source/drain contact trench being formed

Abstract: A method of producing a gate cut in a semiconductor component is provided. In one aspect, an array of nano-sized semiconductor fins is processed on a semiconductor substrate. Rails may be buried in the substrate and in a layer of dielectric material that isolates neighboring fins from each other. The rails may extend in the direction of the fins and each rail may be situated between two adjacent fins. The rails may be buried power rails for enabling the formation of a power delivery network at the back of an integrated circuit chip. At the front side of the substrate, one or more gate structures are produced. The gate structures extend transversally, or perpendicularly, with respect to the fins and the rails. A gate cut is produced by forming an opening from the back side of the substrate, and removing a portion of the gate structure at the bottom of the opening, thereby creating a gate cut that is aligned to the sidewalls of the rail.

Abstract: A field-effect transistor and a method for controlling such is provided herein. The field-effect transistor includes a source terminal and a drain terminal arranged on a first side of a semiconductor layer and a single gate arranged on a second side of the semiconductor layer opposite the first side. The gate and the source terminal are arranged to overlap with a first common region of the semiconductor layer and the gate and the drain terminal are arranged to overlap with a second common region of the semiconductor layer.

Abstract: The present invention provides a micro-reactor (1) adapted to host chemical reactions having at least one microfluidic layer, said micro-reactor (1) comprising a fluid inlet (2) and a fluid outlet (3); a plurality of micro-reaction chambers (10) arranged in rows (7) and columns (6), each micro-reaction chamber comprising a chamber inlet (10a) and a chamber outlet (10b); a plurality of supply channels (4) for supplying fluid to from said fluid inlet (2) to said micro-reaction chambers (10) and further arranged for draining said micro-reaction chambers (10) to said fluid outlet (3), said supply channels (10) extending in a first direction (D1) along the columns (6) of micro-reaction chambers (10) and arranged such that there is one supply channel (4) between adjacent columns (6).

Abstract: A method of operating a pore field-effect transistor (FET) sensor for detecting particles, wherein the pore FET sensor comprises a FET wherein a gate is controlled by a pore filled by a fluid, comprises: controlling a first voltage (Vcis) to set the FET in a subthreshold region; controlling a second voltage (Vtrans) to set a voltage difference between the first and second voltages (Vtrans) such that an effective difference in gate voltage experienced between a minimum and a maximum effective gate voltage during movement of a particle in the fluid is at least kT/q; and detecting a drain-source current in the FET, wherein the particle passing through the pore modulates the drain-source current for detecting presence of the particle.