Abstract: A semiconductor module includes an electrically conductive lower contact piece and an electrically conductive upper contact piece spaced apart from one another in a vertical direction. The module further includes a semiconductor chip having a first load connection and a second load connection. The semiconductor chip is electrically conductively connected by the second load connection to the lower contact piece, and electrically conductively connected to the upper contact piece by at least one bonding wire bonded to the first load connection. An explosion protection means is arranged between the first load connection and the upper contact piece and into which each of the bonding wires is embedded over at least 80% or over at least 90% of its length.

Abstract: Devices and methods are provided in which a driver is supplied via a first current path and a second current path which can comprise a switching element.

Abstract: Some embodiments relate to charge pump regulators to selectively activate a charge pump based not only on the voltage output of the charge pump, but also on a series of wake-up pulses that are delivered at predetermined time intervals and which are delivered independently of the voltage output of the charge pump. Hence, these wake-up pulses prevent extended periods of time in which the charge pump is inactive, thereby helping to prevent latch-up in some situations.

Abstract: A circuit for sensing a physical quantity according to an embodiment of the present invention includes a first oscillator circuit configured to provide a first clock signal including a first frequency depending on the physical quantity, and a second oscillator circuit configured to provide a second clock signal comprising a second frequency depending on the physical quantity. The circuit also includes a frequency comparator circuit configured to provide a frequency signal indicative of the physical quantity, the frequency signal being based on the first and second frequencies, wherein the first and second oscillator circuits are configured to provide the first and second clock signals such that due to a change in the physical quantity one frequency of the first and second frequencies increases, while the other frequency of the first and second frequencies decreases.

Abstract: An apparatus includes a pair of an alarm condition generator and an associated alarm circuit and a test circuit. The alarm circuit is configured to generate an alarm signal in response to a detection of an associated alarm condition. The alarm condition generator is configured to generate the associated alarm condition for its associated alarm circuit in response to a reception of a first reset of a first type of reset. The test circuit is configured to receive the alarm signal and the first reset and to generate in response to a reception of both the first reset and the alarm signal a second reset of a second type of reset.

Abstract: A method of manufacturing a semiconductor device includes providing a transfer foil. A plurality of semiconductor chips is placed on and adhered to the transfer foil. The plurality of semiconductor chips adhered to the transfer foil is placed over a multi-device carrier. Heat is applied to laminate the transfer foil over the multi-device carrier, thereby accommodating the plurality of semiconductor chips between the laminated transfer foil and the multi-device carrier.

Abstract: A power semiconductor module includes a first printed circuit board having a first insulation carrier, and a first upper metallization and a first lower metallization applied to the first insulation carrier on mutually opposite sides, and a second printed circuit board having a second insulation carrier and a second upper metallization applied to the second insulation carrier. The second printed circuit board is spaced apart from the first printed circuit board in a vertical direction oriented perpendicular to the opposite sides of the first insulation carrier. A semiconductor chip is disposed between the printed circuit boards and electrically conductively connected at least to the second upper metallization. The first lower metallization and the second upper metallization face one another. The first printed circuit board has a first thick conductor layer at least partly embedded in the first insulation carrier and which has a thickness of at least 100 ?m.

Abstract: A MEMS structure and a method for operation a MEMS structure are disclosed. In accordance with an embodiment of the present invention, a MEMS structure comprises a substrate, a backplate, and a membrane comprising a first region and a second region, wherein the first region is configured to sense a signal and the second region is configured to adjust a threshold frequency from a first value to a second value, and wherein the backplate and the membrane are mechanically connected to the substrate.

Abstract: According to an embodiment, a programmable logic device includes a plurality of logic blocks, memory, a plurality of connection control elements and a logic unit. The logic blocks are grouped into one or more programmed partitions. The memory stores authentication information and partition information. The connection control elements controllably interconnect different ones of the logic blocks. The logic unit controls external access to the one or more partitions based on the authentication information, controls reprogramming of the one or more partitions based on at least some of the partition information and configures the connection control elements based on at least some of the partition information.

Abstract: A circuit includes a power circuit and a current sensing circuit. The power circuit has a main current loop. The current sensing circuit is spaced apart from and electrically decoupled from the power circuit. The current sensing circuit is operable to generate a voltage proportional to an electromagnetic field generated responsive to a current change in the main current loop of the power circuit and generate a current information signal based on the voltage. The current information signal describes the current in the main current loop.

Abstract: According to one embodiment, an electronic circuit is described comprising a processing circuit configured to perform a data processing including a plurality of successive operations, wherein in at least some of the plurality of operations, a predetermined input value is processed; a check value memory; a controller configured to check, for each operation of the data processing performed by the processing circuit, whether the predetermined input value is processed in the operation, and, if the predetermined input value is processed in the operation, combine the predetermined input value to the content of the check value memory and a detector configured to check, when the processing is complete, whether the content of the check value memory is equal to a predetermined value.

Abstract: According to various embodiments, a method for manufacturing a semiconductor device may include providing a semiconductor workpiece including a device region at a first side of the semiconductor workpiece, wherein a mechanical stability of the semiconductor workpiece is insufficient to resist at least one back end process without damage, and depositing at least one conductive layer over a second side of the semiconductor workpiece opposite the first side of the semiconductor workpiece, wherein the at least one conductive layer increases the mechanical stability of the semiconductor workpiece to be sufficient to resist the at least one back end process without damage.

Abstract: Integrated circuit systems, such as sensor systems, having on-board-diagnostic (OBD) circuits for the detection of errors presenting internal to the systems are disclosed, along with related methods. In one embodiment, an ADC multiplexer receives analog output readback from an output driver and provides a signal triggering an OBD circuit for internal error indication performed completely independent of digital-to-analog converters (DAC) and output drivers, which can be the point of failure.

Abstract: A communication system having a configurable bandpass filter is disclosed. The system includes a bandpass filter and a bandpass controller. The bandpass filter has an adjustable center frequency. The bandpass controller is configured to identify a frequency shift in a master in or received signal and to shift the center frequency of the bandpass filter according to the identified frequency shift.

Abstract: A wafer contacting device may include: a receiving region configured to receive a wafer; and an elastically deformable carrier disposed in the receiving region and including an electrically conductive surface region.

Abstract: Embodiments relate to Hall effect sensor circuits and devices that provide improved performance, such as reduced residual offset errors and/or improved S/N ratios. In an embodiment, a Hall effect sensor circuit comprises two circuit portions, a first with a higher bandwidth for higher frequencies and having an improved S/N ratio, and a second with a lower bandwidth for lower frequencies and having low residual offset. First and second Hall plates or devices are incorporated in the first and second circuit portions. The first Hall plate can be operated with a larger bias voltage and a larger, high-pass-filtered signal bandwidth, while the second Hall plate can be operated with a smaller bias voltage and a smaller, low-pass-filtered signal bandwidth. Individual output signals from each of the first and second Hall plates can be scaled and combined to provide an overall output signal with the benefits of each circuit portion, including reduced residual offset error and negligible increased noise.

Abstract: A device includes a first power semiconductor chip with a first contact pad and a second contact pad on a first face and a third contact pad on the second face. The device further includes a second power semiconductor chip with a first contact pad and a second contact pad on a first face and a third contact pad on the second face. The first and second power semiconductor chips are arranged one above another, and the first face of the first power semiconductor chip faces in the direction of the first face of the second power semiconductor chip. In addition, the first power semiconductor chip is located laterally at least partially outside of the outline of the second power semiconductor chip.

Abstract: A redistribution board includes a first conductive layer including a redistribution structure for low voltage signals, a second conductive layer including a redistribution structure for high voltage signals, and a non-conductive layer. The second conductive layer is spaced apart from the first conductive layer by the non-conductive layer. The redistribution board further includes a conductive connector extending from a mounting surface of the redistribution board to the second conductive layer. The conductive connector is surrounded by a low voltage trace of the first conductive layer.

Abstract: A photodetector includes a substrate and an insulating arrangement formed in the substrate. The insulating arrangement electrically insulates a confined region of the substrate. The confined region is configured to generate free charge carriers in response to an irradiation. The photodetector further includes a read-out electrode arrangement configured to provide a photocurrent formed by at least a portion of the free charge carriers that are generated in response to the irradiation. The photodetector also includes a biasing electrode arrangement that is electrically insulated against the confined region by means of the insulating arrangement. The biasing electrode arrangement is configured to cause an influence on a spatial charge carrier distribution within the confined region so that fewer of the free charge carriers recombine at boundaries of the confined region compared to an unbiased state.

Abstract: A communication method for the communication between two appliances which are set up for communication in a first communication mode is provided. The method includes sending an activation sequence in a second communication mode from the first to the second appliance in order to initiate communication based on the first communication mode; sending data from the second appliance to the first appliance based on the first communication mode. The activation sequence sent to the second appliance includes an initialization sequence and a request for data communication in the first communication mode. In addition, a corresponding electronic appliance and system are provided.