Abstract: A method of controlling current through a transistor is provided. A voltage and current through the transistor are measured. A safe operating current for the voltage is determined. For each of a first sequence of current pulses, a voltage of a voltage pulse applied to a control node of the transistor using a feedback controller is adjusted until the current measured through the transistor is not greater than a first function of the safe operating current. For each of a second sequence of current pulses after the first sequence of current pulses, the voltage of the voltage pulse applied to the control node of the transistor using the feedback controller is adjusted until the current measured through the transistor is not greater than a second function of the safe operating current.

Abstract: A transistor device includes field plate contacts that electrically connect a final metallization layer to field electrodes in underlying trenches, and mesa contacts that electrically connect the final metallization layer to semiconductor mesas confined by the trenches. Each field plate contact is divided into field plate contact segments that are separated from one another. Each mesa contact is divided into mesa contact segments that are separated from one another. In a first area adjacent to an end of the trenches, a first line that runs perpendicular to the trenches intersects a first field plate contact segment of the field plate contacts and a first mesa contact segment of the mesa contacts. In a second area spaced inward from the first area, a second line that runs perpendicular to the trenches intersects a second field plate contact segment of the field plate contacts and a second mesa contact segment of the mesa contacts.

Abstract: A semiconductor device includes a main bi-directional switch formed on a semiconductor substrate and having first and second gates, a first source electrically connected to a first voltage terminal, a second source electrically connected to a second voltage terminal, and a common drain. The semiconductor device further includes a discharge circuit having a plurality of individual transistors or an auxiliary bi-directional switch monolithically integrated with the main bi-directional switch and connected in a common source configuration to the semiconductor substrate. The plurality of individual transistors or the auxiliary bi-directional switch includes a first drain connected to the first source of the main bi-directional switch, a second drain connected to the second source of the main bi-directional switch, and first and second gates each decoupled from gate drive circuitry so that the first and the second gates are controlled at least passively and based on a state of the main bi-directional switch.

Abstract: A method of forming a current measurement device includes providing a glass substrate having first and second substantially planar surfaces that are opposite one another, forming a plurality of through-vias in the glass substrate that each extend between the first and second substantially planar surfaces, and forming conductive tracks on the glass substrate that connect adjacent ones of the through-vias together. Forming the plurality of through-vias includes applying radiation to the glass substrate, and the conductive tracks and the through-vias collectively form a coil structure in the glass substrate.

Abstract: A molded semiconductor package includes: semiconductor dies attached to a first side of a leadframe and electrically interconnected to form a power electronic circuit; a substrate attached to a second side of the leadframe opposite the first side, and including a metal body and electrically insulative material that separates the metal body from the leadframe; and a molding compound encapsulating the dies. The metal body includes a first surface in contact with the electrically insulative material, a second surface opposite the first surface and which is not covered by the molding compound, and a bevelled edge extending between the first and second surfaces. The bevelled edge of the metal body has a first sloped side face that extends from the first surface to an apex of the bevelled edge, and a second sloped side face that extends from the apex to the second surface. Methods of producing the package are also described.

Abstract: A vertical power semiconductor transistor device includes: a drain region of a first conductivity type; a body region of a second conductivity type; a drift region of the first conductivity type which separates the body region from the drain region; a source region of the first conductivity type separated from the drift region by the body region; a gate trench extending through the source and body regions and into the drift region, the gate trench including a gate electrode; and a field electrode in the gate trench or in a separate trench. The drift region has a generally linearly graded first doping profile which increases from the body region toward a bottom of the trench that includes the field electrode, and a graded second doping profile that increases at a greater rate than the first doping profile from an end of the first doping profile toward the drain region.

Abstract: A chip includes a semiconductor body coupled to a first and a second load terminal. The semiconductor body includes an active region including a plurality of breakthrough cells, each of the breakthrough cells includes: an insulation structure; a drift region; an anode region, the anode region being electrically connected to the first load terminal and disposed in contact with the first load terminal; a first barrier region arranged in contact with each of the anode region and the insulation structure, where the first barrier region of the plurality of breakthrough cells forms a contiguous semiconductor layer; a second barrier region separating each of the anode region and at least a part of the first barrier region from the drift region; and a doped contact region arranged in contact with the second load terminal, where the drift region is positioned between the second barrier region and the doped contact region.

Abstract: An apparatus includes a controller. The controller controls a main power supply to produce an output signal to power multiple dynamic loads such as disposed in series or other suitable configuration. The controller detects a transient power consumption condition associated with a first dynamic load of the multiple dynamic loads. The controller then adjusts control of the main power supply and generation of the output signal based on the detected transient power consumption condition.

Abstract: An apparatus includes a power supply monitor operative to monitor a status of multiple power converters. Based on the monitored status, the power supply monitor detects an event associated with a first power converter of the multiple power converters. The power supply monitor communicates a notification of the event to a management entity. The notification is encoded to include an identity of the first power converter experiencing the event as determined by the power supply monitor or other suitable entity.

Abstract: A multiphase power converter comprises a regulator, a value-supply system arranged for collecting at least one operating point of the power converter, and a predictor for determining updated phase statuses, for activating or deactivating each of the phases (111, 112, 113, . . . ) during a further operation of the power converter. The updated phase statuses are determined using a process based on the at least one collected operating point and predictor parameters obtained from a machine-learning process.

Abstract: A transistor device includes a semiconductor substrate having a first major surface, a cell field and an edge termination region laterally surrounding the cell field. The cell field includes: elongate active trenches that extend from the first major surface into the semiconductor substrate, a field plate and a gate electrode being positioned in each elongate active trench, the gate electrode being arranged above and electrically insulated from the field plate; and elongate mesas, each elongate mesa being formed between neighbouring elongate active trenches, the elongate mesas comprising a drift region, a body region on the drift region and a source region on the body region.

Abstract: A semiconductor device includes a semiconductor die with a metallization layer including a first metal with a comparatively high melting point, a die carrier including a second metal with a comparatively high melting point, a first intermetallic compound arranged between the semiconductor die and the die carrier and including the first metal and a third metal with a comparatively low melting point, a second intermetallic compound arranged between the first intermetallic compound and the die carrier and including the second metal and the third metal, and precipitates of a third intermetallic compound arranged between the first intermetallic compound and the second intermetallic compound and including the third metal and a fourth metal with a comparatively high melting point.

Abstract: A semiconductor module includes a laminate structure having an electrically insulating core layer with opposing first and second sides, a first redistribution layer arranged on the first side and a second redistribution layer arranged on the second side. First and second transistor devices are coupled to form a half-bridge circuit. Both transistor devices have a first side at which a cell field is arranged and an opposing second side. A control chip has a first side with contact pads. The transistor devices and control chip are arranged laterally adjacent one another and embedded in the core layer. The first side of the control chip and one transistor device and the second side of the other transistor device face towards the first redistribution layer on the first side of the core layer.

Abstract: A power supply system comprises: a switched-capacitor converter, a controller, and a monitor. Via generation of control signals, the controller controls settings of switches in the switched-capacitor converter to convert a received input voltage to an output voltage that powers a load. The monitor in the power supply system at least occasionally determines an impedance associated with the switched-capacitor converter. A magnitude of the determined impedance provides an indication whether the switched-capacitor converter is operating efficiently. To ensure efficient operation of the switched-capacitor converter, based on input form the monitor, the controller adjusts the control signals controlling the switches in the switched-capacitor converter as a function of the determined impedance.

Abstract: A multi-phase PFC (power factor correction) system, controller for the multi-phase PFC system and method of controlling the multi-phase PFC system are described. The controller includes a digital circuitry configured to calculate a delay value based on a positive current slope and a negative current slope for a first phase of the plurality of phases which is enabled for all load current conditions. In response to an increase in an average current reference, the digital circuitry is configured to enable a second phase of the plurality of phases such that a current output by the second phase is out of phase with a current output by the first phase by an amount corresponding to the delay value as referenced to a beginning of a boost charging portion of a switching cycle for the first phase.

Abstract: An apparatus comprises an energy transfer device configured to supply power from a primary side of an isolation barrier through the isolation barrier to a secondary side of the of the isolation barrier for driving a gate of a switch for controlling output of the switch at the secondary side. The apparatus comprises a monitoring component. The monitoring component is configured to monitor an operating state of the switch. The monitoring component is configured to evaluate the operating state to determine whether a fault has occurred, perform a countermeasure, and/or provide a signal of the fault.

Abstract: A semiconductor device includes a carrier, a first external contact, a second external contact, and a semiconductor die. The semiconductor die has a first main face, a second main face opposite to the first main face, a first contact pad disposed on the first main face, a second contact pad disposed on the second main face, a third contact pad disposed on the second main face, and a vertical transistor. The semiconductor die is disposed with the first main face on the carrier. A clip connects the second contact pad to the second external contact. A first bond wire is connected between the third contact pad and the first external contact. The first bond wire is disposed at least partially under the clip.

Abstract: A power supply includes a storage component to store an output current value representative of a magnitude of output current supplied by an output voltage of a power converter to power a load. The power supply further includes an offset reference generator and a controller. The offset reference generator produces an offset reference signal, the output current value being offset by the offset reference signal. The controller controls generation of the output voltage of the power converter as a function of the offset output current value with respect to a threshold signal (value). Additionally, the controller is configured to detect a startup mode of a power converter operative to convert an input voltage into an output voltage. During the startup mode, the controller: i) produces a threshold signal having a magnitude that varies over time, and ii) controls operation of switches in the power converter as a function of the threshold signal while the power converter is operated in a diode emulation mode.

Abstract: The primary side of an LLC converter includes a primary-side switch network connected to an LLC network having a first winding of an isolation transformer. The secondary side includes a secondary-side switch network having first and second rectification branches coupled to different tap points of a second winding of the isolation transformer. Switching of the secondary-side switch network is controlled based on a drive signal and a current sense signal indicative of current in the rectification branches. For a first part of each switching cycle, discontinuous conduction mode (DCM) is detected based on a falling edge of the current sense signal occurring before a falling edge of the drive signal for the first rectification branch. For a second part of each switching cycle, DCM is detected based on the falling edge of the current sense signal occurring before a falling edge of the drive signal for the second rectification branch.

Abstract: A method for driving a power transistor includes comparing a measurement signal that is representative of a load current to a comparator threshold that corresponds to an overcurrent threshold; generating a first fault signal when the measurement signal exceeds the comparator threshold for a first time interval; generating a second fault signal when the measurement signal exceeds the comparator threshold for a second time interval that is greater than the first time interval; regulating a control voltage provided to the control terminal of the transistor to turn off the transistor in response to the second fault signal; and in response to the first fault signal, adjusting the control voltage to an adjusted voltage level in order to limit the load current to a reduced current level that is preconfigured to be greater than the overcurrent threshold. The adjusted voltage level is sufficient to maintain the power transistor in an on-state.