Patents Assigned to Infineon Technologies
  • Semiconductor device, integrated circuit and method of manufacturing an integrated circuit
    Patent number: 8710575
    Abstract: A semiconductor device is formed in a semiconductor substrate comprising a first main surface and includes a control gate disposed in a lower portion of a first trench formed in the first main surface, a floating gate disposed in the first trench above the control gate and insulated from the control gate, a source region of a first conductivity type, a body region of a second conductivity type, and a drain region of the first conductivity type.
    Type: Grant
    Filed: January 31, 2013
    Date of Patent: April 29, 2014
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Werner Schwetlick
  • Capacitance sensing
    Patent number: 8710853
    Abstract: Embodiments related to sensing a capacitance are described and depicted.
    Type: Grant
    Filed: August 31, 2010
    Date of Patent: April 29, 2014
    Assignee: Infineon Technologies AG
    Inventors: Mee Hing He, Leela Madhuri Bhaskarabhotla, Arno Rabenstein, Qian Zhao
  • Electronic device
    Patent number: 8709876
    Abstract: An electronic device is disclosed. In one embodiment, the electronic device includes a substrate, a plurality of conducting lines formed on a first conducting material that is disposed on the substrate, and a layer of a second conducting material disposed on the plurality of conducting lines. The conducting lines include a top face and a side face. The layer of the second conducting material includes a first thickness disposed on each of the top faces and a second thickness disposed on each of the side faces. To this end, the first thickness is greater than the second thickness.
    Type: Grant
    Filed: September 11, 2012
    Date of Patent: April 29, 2014
    Assignee: Infineon Technologies AG
    Inventors: Manfred Schneegans, Holger Torwesten
  • Electronic component, a semiconductor wafer and a method for producing an electronic component
    Patent number: 8710665
    Abstract: An electronic component includes a semiconductor substrate defined by a generally planar first face, a generally planar second face and side faces extending between the generally planar second face and the generally planar first face. The semiconductor substrate has a curved contour between the generally planar second face and the side faces.
    Type: Grant
    Filed: October 6, 2008
    Date of Patent: April 29, 2014
    Assignee: Infineon Technologies AG
    Inventor: Friedrich Kroener
  • Electronic component and a system and method for producing an electronic component
    Patent number: 8710590
    Abstract: In a method for producing an electronic component, a substrate is doped by introducing doping atoms. In the doped substrate, at least one connection region of the electronic component is formed by doping with doping atoms. Furthermore, at least one additional doped region is formed at least below the at least one connection region by doping with doping atoms. Furthermore, at least one well region is formed in the substrate by doping with doping atoms in such a way that the well region doping is blocked at least below the at least one additional doped region.
    Type: Grant
    Filed: June 16, 2006
    Date of Patent: April 29, 2014
    Assignee: Infineon Technologies AG
    Inventors: Philipp Riess, Henning Feick, Martin Wendel
  • Method of manufacturing semiconductor devices using ion implantation
    Patent number: 8710620
    Abstract: A manufacturing method provides a semiconductor device with a substrate layer and an epitaxial layer adjoining the substrate layer. The epitaxial layer includes first columns and second columns of different conductivity types. The first and second columns extend along a main crystal direction along which channeling of implanted ions occurs from a first surface into the epitaxial layer. A vertical dopant profile of one of the first and second columns includes first portions separated by second portions. In the first portions a dopant concentration varies by at most 30%. In the second portions the dopant concentration is lower than in the first portions. The ratio of a total length of the first portions to the total length of the first and second portions is at least 50%. The uniform dopant profiles improve device characteristics.
    Type: Grant
    Filed: July 18, 2012
    Date of Patent: April 29, 2014
    Assignee: Infineon Technologies AG
    Inventors: Hans-Joachim Schulze, Johannes Laven, Dieter Fuchs, Werner Schustereder, Roman Knoefler
  • Semiconductor device with an amorphous semi-insulating layer, temperature sensor, and method of manufacturing a semiconductor device
    Patent number: 8710615
    Abstract: According to an embodiment, a semiconductor device includes a semiconductor substrate and an amorphous semi-insulating layer on the semiconductor substrate.
    Type: Grant
    Filed: August 31, 2011
    Date of Patent: April 29, 2014
    Assignee: Infineon Technologies AG
    Inventor: Gerhard Schmidt
  • Device and method including a soldering process
    Patent number: 8710678
    Abstract: A device and method of making a device is disclosed. One embodiment provides a substrate. A semiconductor chip is provided having a first surface with a roughness of at least 100 nm. A diffusion soldering process is performed to join the first surface of the semiconductor chip to the substrate.
    Type: Grant
    Filed: July 3, 2012
    Date of Patent: April 29, 2014
    Assignee: Infineon Technologies AG
    Inventors: Paul Ganitzer, Francisco Javier Santos Rodriguez, Martin Sporn, Daniel Kraft
  • System and method for a driver circuit with a referenced control signal
    Patent number: 8710873
    Abstract: In accordance with an embodiment, a method of operating a gate driving circuit includes receiving a reference timing pulse, measuring the received timing pulse according to a local clock generator of the gate driving circuit, and generating a switching control signal based on the measured received timing pulse.
    Type: Grant
    Filed: August 29, 2012
    Date of Patent: April 29, 2014
    Assignee: Infineon Technologies Austria AG
    Inventors: Jens Barrenscheen, Laurent Beaurenaut, Marco Bachhuber, Tommaso Bacigalupo, Marcus Nuebling
  • Integrated circuits with magnetic core inductors and methods of fabrications thereof
    Patent number: 8709831
    Abstract: In one embodiment, a method of forming a semiconductor device includes forming a first inductor coil within and/or over a substrate. The first inductor coil is formed adjacent a top side of the substrate. First trenches are formed within the substrate adjacent the first inductor coil. The first trenches are filled at least partially with a magnetic fill material. At least a first portion of the substrate underlying the first inductor coil is thinned. A backside magnetic layer is formed under the first portion of the substrate. The backside magnetic layer and the magnetic fill material form at least a part of a magnetic core region of the first inductor coil.
    Type: Grant
    Filed: May 28, 2013
    Date of Patent: April 29, 2014
    Assignee: Infineon Technologies AG
    Inventors: Renate Hofmann, Carsten Ahrens, Wolfgang Klein, Alexander Glas
  • Circuit arrangement having a load transistor and a voltage limiting circuit and method for driving a load transistor
    Patent number: 8710894
    Abstract: The present invention relates to a circuit arrangement having the following features: a load transistor having a control connection and a first and second load connection; a drive connection coupled to the control connection of the load transistor and serving for the application of a drive signal; a voltage limiting circuit connected between one of the load connections and the drive connection of the transistor; and a deactivation circuit connected to the voltage limiting circuit and serving for the deactivation of the voltage limiting circuit in a manner dependent on a deactivation signal, which is dependent on a load current through the load transistor and/or on a drive voltage of the load transistor.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: April 29, 2014
    Assignee: Infineon Technologies AG
    Inventors: Christian Arndt, Veli Kartal, Rainald Sander
  • Receiver and transmitter receiver system
    Patent number: 8710963
    Abstract: A receiver for receiving messages from a transmitter includes a controller and a driver stage for providing a supply voltage to the transmitter based on a control signal. The controller is configured to provide the control signal to compensate for changes of the supply voltage caused by a modulation of the current consumption of the transmitter, such that the supply voltage remains in a predefined range. Furthermore, the controller is configured to evaluate a series of succeeding values of the control signal to derive a message generated by the transmitter by modulating its current consumption.
    Type: Grant
    Filed: March 14, 2011
    Date of Patent: April 29, 2014
    Assignee: Infineon Technologies AG
    Inventor: Dirk Hammerschmidt
  • METHODS FOR MANUFACTURING A SEMICONDUCTOR DEVICE
    Publication number: 20140113423
    Abstract: In various embodiments, a method for manufacturing a semiconductor device is provided. The method for manufacturing a semiconductor device may include forming a first source/drain region, forming a second source/drain region, forming an active region electrically coupled between the first source/drain region and the second source/drain region, forming a trench disposed between the second source/drain region and at least a portion of the active region, forming a first isolation layer disposed over the bottom and the sidewalls of the trench, forming electrically conductive material disposed over the isolation layer in the trench, forming a second isolation layer disposed over the active region, and forming a gate region disposed over the second isolation layer. The electrically conductive material may be coupled to an electrical contact.
    Type: Application
    Filed: December 24, 2013
    Publication date: April 24, 2014
    Applicant: Infineon Technologies AG
    Inventors: Mayank Shrivastava, Harald Gossner, Ramgopal Rao, Maryam Shojaei Baghini
  • Module Comprising a Semiconductor Chip
    Publication number: 20140110829
    Abstract: A module includes a semiconductor chip having at least a first terminal contact surface and a second terminal contact surface. A first bond element made of a material on the basis of Cu is attached to the first terminal contact surface, and a second bond element is attached to the second terminal contact surface. The second bond element is made of a material different from the material of the first bond element or is made of a type of bond element different from the type of the first bond element.
    Type: Application
    Filed: December 30, 2013
    Publication date: April 24, 2014
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Ralf Otremba, Xaver Schloegel, Khai Huat Jeffrey Low, Chee Soon Law
  • Semiconductor Packages with Integrated Antenna and Method of Forming Thereof
    Publication number: 20140110840
    Abstract: In one embodiment of the present invention, a semiconductor package includes a substrate having a first major surface and an opposite second major surface. A chip is disposed in the substrate. The chip includes a plurality of contact pads at the first major surface. A first antenna structure is disposed at the first major surface. A reflector is disposed at the second major surface.
    Type: Application
    Filed: January 8, 2013
    Publication date: April 24, 2014
    Applicant: Infineon Technologies AG
    Inventors: Maciej Wojnowski, Walter Hartner, Ottmar Geitner, Gottfried Beer, Klaus Pressel, Mehran Pour Mousavi
  • HIGH PERFORMANCE VERTICAL INTERCONNECTION
    Publication number: 20140111951
    Abstract: Representative implementations of devices and techniques provide improved electrical performance of components, such as chip dice, for example, disposed on different layers of a multi-layer printed circuit board (PCB). In an example, the components may be embedded within layers of the PCB. An insulating layer located between two component layers or sets of layers includes a conductive portion that may be strategically located to provide electrical connectivity between the components. The conductive portion may also be arranged to improve thermal conductivity between points of the PCB.
    Type: Application
    Filed: October 18, 2012
    Publication date: April 24, 2014
    Applicant: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Martin STANDING, Andrew ROBERTS
  • HIGH EFFICIENCY EMBEDDING TECHNOLOGY
    Publication number: 20140111955
    Abstract: Representative implementations of devices and techniques provide improved electrical access to components, such as chip dice, for example, disposed within layers of a multi-layer printed circuit board (PCB). One or more insulating layers may be located on either side of a spacer layer containing the components. The insulating layers may have apertures strategically located to provide electrical connectivity between the components and conductive layers of the PCB.
    Type: Application
    Filed: October 18, 2012
    Publication date: April 24, 2014
    Applicant: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventor: Martin STANDING
  • Die, Chip, Method for Driving a Die or a Chip and Method for Manufacturing a Die or a Chip
    Publication number: 20140111234
    Abstract: In various embodiments, a die is provided. The die may include a physical unclonable function circuit configured to provide an output signal, wherein the output signal is dependent on at least one physical characteristic specific to the die; and a self-test circuit integrated with the physical unclonable function circuit on the die, wherein the self-test circuit is configured to provide at least one test input signal to the physical unclonable function circuit and to determine as to whether the output signal provided in response to the at least one test input signal fulfills a predefined criterion.
    Type: Application
    Filed: October 22, 2012
    Publication date: April 24, 2014
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Peter Laackmann, Marcus Janke
  • Apparatus, Storage Device, Switch and Methods, Which Include Microstructures Extending from a Support
    Publication number: 20140112067
    Abstract: An apparatus has a support and a plurality of bendable and conductive microstructures extending from the support. Two adjacent microstructures of the plurality of microstructures define a detectable first state if they are not bent such that end portions thereof, which are distal with respect to the support, do not touch each other, and the two adjacent microstructures of the plurality of microstructures define a detectable second state if they are bent such that the end portions thereof, which are distal with respect to the support, touch each other and are fixed to each other.
    Type: Application
    Filed: October 19, 2012
    Publication date: April 24, 2014
    Applicant: Infineon Technologies Dresden GmbH
    Inventors: Marko Lemke, Stefan Tegen
  • Backing Plate for a Sputter Target, Sputter Target, and Sputter Device
    Publication number: 20140110254
    Abstract: A backing plate for a sputter target includes a target receiving part for receiving a target to be sputtered, and a structure for exposing the target receiving part through the backing plate.
    Type: Application
    Filed: October 19, 2012
    Publication date: April 24, 2014
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Markus Fischer, Wolfram Karcher, Barbara Jeansannetas