Abstract: A circuit is disclosed for a receiver front-end for a Personal Handy Phone. The circuit consists of a high frequency mixer consisting of a cascade downmixer, tapped at the center, and followed by a common source intermediate (IF) amplifier. The combination of downmixer and IF amplifier provides a high third order intermodulation suppression and a robust conversion gain. The proposed circuit can also be applied to other FET technologies and other uses.

Abstract: A photodetector circuit that operates a reduced power levels is provided. The photodetector circuit preferably includes a control circuit that alternates between an active mode and a standby mode. During an active mode, information regarding the relative strength of a light signal is acquired and reported. However, during a standby mode, portions of the photodetector are disabled or turned off so that no information regarding a light signal is acquired or reported and overall power consumption is reduced.

Abstract: A substrate assembly and method of forming the substrate assembly having a very thin form factor and a large amount of manufacturing flexibility. A flexible tape has a number of device blocks. Devices, passive or active, are joined to the device blocks forming a flexible tape assembly and the flexible tape assembly is electrically tested. Substrates are formed having cavities matching the device blocks. The flexible tape assembly is then joined to the substrate such that the devices fit into the cavities, thereby forming a substrate assembly having a very thin form factor. The flexible tape can be stored on a reel and the substrates can be formed in an array and cut to the desired size providing manufacturing flexibility.

Abstract: The present invention is directed to a method for the lamination of metals, and especially copper, to the surfaces of fluoropolymers at temperatures substantially below the sintering temperatures or melting temperatures of the fluoropolymers. More specifically, the invention is directed to a method for surface modification of fluoropolymers by thermal graft copolymerization with concurrent lamination of a metal (e.g. copper) in the presence of a functional monomer. The process can be carried out under atmospheric conditions and in the complete absence of an added polymerization initiator. The so-laminated fluoropolymer-metal interfaces exhibit T-peel strengths of no less than 8 N/cm and delaminate via cohesive failure inside the fluoropolymer.

Abstract: The present invention is a motion sensor apparatus for use as a general mechanical amplifier, a gyroscope, or other resonant sensor such as an accelerometer. In accordance with the invention, the motion sensor apparatus includes a primary mass and a primary flexure structure. The primary flexure structure supports the primary mass to experience driven motion against a bias of the primary flexure structure. The apparatus further includes a secondary mass which is less massive than the primary mass. A secondary flexure structure interconnects the secondary mass with the primary mass, and supports the secondary mass to experience sensing motion relative to the primary mass against a bias of the secondary flexure structure. The stiffness ratio between the primary and secondary flexure structures is equal to the mass ratio between the primary and secondary masses.

Abstract: Disclosed are liquid epoxy encapsulants comprising a basic bisphenol-type epoxy resin with epoxy groups at each end having an epoxy equivalent of 170-300, and an amine curing agent such as 4,4′-Methylene dianiline with the content of 15-30 wt % with respect to epoxy resins and other additives such as coloring agents, flame retardants, and catalysts. Alphatic and cycloaliphatic epoxy resins and polyamide curing agents can optionally be added to mix with the bisphenol epoxy resin to modify the properties of the liquid epoxy encapsulants, i.e., to decrease their viscosities and to increase their toughness. The liquid epoxy encapsulants of this invention have characteristics of suitable viscosity, fast curing, high adhesion to polyimides and high reliability in the application of flip-chip-on-board (FCOB) encapsulation as underfill materials.

Abstract: A pressure sensor fabricated onto a substrate using conventional CMOS fabrication processes. The pressure sensor is built on a substrate having a first conductivity type and has defined in it a well of an opposite conductivity type. This well defines a membrane. Resistors are diffused into the well. Source/drain regions are provided for leadouts for the resistors. An n-cap is provided for the resistors. Metalization contacts may be provided to connect the membrane to a positive bias during a membrane etching process. A cavity is provided on the underside of the substrate through which pressure is applied to the membrane. Signal conditioning circuitry, such as an operational amplifier, may also be fabricated on the same substrate preferably using the same IC processes.

Abstract: Under the first embodiment of the invention, a three layer composite layer of insulation is deposited. The trench is etched into this composite layer of insulation followed by a hard bake. The via etch is performed, completing the formation of the dual damascene profile. The created dual damascene profile is transferred into the underlying substrate; the layer of photoresist is removed. Under the second embodiment of the invention, a two layer composite layer of insulation is deposited over a semiconductor surface. The trench is etched into this composite layer of insulation. A layer of positive photoresist is deposited over the second layer of cross-linked negative resist and masked for the via etch. The via etch is performed, the created dual damascene profile is transferred into the underlying substrate. The removal of the layers of patterned photoresist completes the formation of the dual damascene structure.

Abstract: A digital cellular telephone using a scalable channel coding scheme includes a memory arranged as a three-dimensional code book. The three-dimensional code book may receive the following three input variables: 1. The number of bit classes; 2. The number of bits per frame to be coded; and 3. The available size of the output codeword based on available channel capacity. For each of these input variables, the three-dimensional code book may output the following scalable coding parameters: 1. The number of bits per frame are partitioned into each of the coding classes; and 2. The puncture code per class. The invention provides the scalable coding parameters in real-time. It does this, however, without calculating the parameters in real-time. The memory may be arranged in the following manner. A number of information bits to be coded is determined by a mode of the transmission signal.

Abstract: A pressure sensor and method of forming the pressure sensor are described. The pressure sensor is formed by etching a number of trenches in a silicon substrate. Dielectric spacers are formed on the sidewalls of the trenches. The bottoms of the trenches are then etched using isotropic etching to undercut the sidewalls of the trenches and form a number of silicon bridges with a limited gap between the underside of the bridges and the bulk silicon substrate. A filler dielectric is then deposited to fill the gaps between the sidewalls of the trenches thereby forming a flexible membrane. Piezoresistors are formed in the silicon bridges or, alternatively, on the flexible membrane. Pressure changes deflect the flexible membrane causing resistance changes in the piezoresistors which can be monitored and related to pressure. The limited gap between the underside of the bridges and the bulk silicon substrate provides overpressure protection for the sensor.

Abstract: A multiwavelength imaging and spectroscopic photoemission microscope system (100) which simultaneously provides images in a broad range of the electromagnetic spectrum, such as between 200 nm-1000 nm (optical or visible light) and 1000 nm-500 nm (infrared light). The multiwavelength imaging and spectroscopic photoemission microscope system comprises a microscope (102), a spectrometer (106), a beam splitter (108), a first spectrum focal plane array (110) including an appropriate photodiode (114A), a second spectrum focal plane array (120) including an appropriate photodiode (114B), and a cryogenic vessel (160) to maintain relevant portions of the system at a very low temperature. The invention may be used in failure analysis of integrated circuits and in semiconductor and low temperature physics.

Abstract: Methods and structures are disclosed which realize high Q inductors to provide on-chip noise matching of microwave monolithic integrated circuits, such as low noise amplifiers and output matching networks for power amplifiers. High Q inductors, of typically 6nH, are devised by using the inductance of package leads, bondwires, electronic board trace wires and transmission lines and other components in various configurations. These and other components are serially connected starting from a chip pad, representing a circuit node, to a circuit input on a that electronic board.

Abstract: A method of facilitating wafer level burn-in testing. The method may utilize a rerouting process to connect input and output connections of each chip on the wafer to a bus network. The bus network may be used to conduct wafer level burn-in testing and does not change the AC/DC operating characteristics of the chips.

Abstract: A differential phase splitter circuit for producing opposite phase signals from an input AC signal is provided. A first and second transistor is provided. The source of these transistors are connected to a common first node. Further, these transistors act as a differential amplifier. The gate of the first transistor receives an input AC signal. The drain of the first transistor produces a first output AC signal. Similarly, the drain of the second transistor produces a second output AC signal that is 180 degrees out of phase with the first output AC signal. A source resistor is provided, connected in series to the common first node and ground. Lastly, an LCR feedback circuit is provided. This feedback circuit is connected between the drain of the first transistor and the gate of the second transistor. The LCR feedback circuit couples at least a fraction of the amplitude of the first output AC signal to the gate of the second transistor for amplitude balancing and phase balancing.

Abstract: A microscope for detecting a portion of the electromagnetic spectrum of a sample image and producing an output signal in response thereto. The output signal may be stored for later reference or an image related to the output signal may be displayed by an image capture and storage system. The microscope may be provided with both an infrared and a visible spectra detector. A rotatable image director having a reflecting surface directs the sample image to an image detector. The microscope may have image detectors such as a CCD camera and a spectrometer. The image detectors of the microscope share a common optical path up to the image director.

Abstract: A bias stabilization circuit for biasing the DC gate bias of a stabilized transistor is disclosed. The bias stabilization circuit may be comprised of a bias transistor that is fabricated concurrent with, and on the same chip as, the stabilized transistor. Preferably, the bias transistor and the stabilized transistor are fabricated physically close to each other and during the same process so that the electrical characteristics of the transistors are closely related. In a preferred embodiment, a drain of the bias transistor is connected to a load comprising a first resistor, a second resistor, and a third resistor. The drain of the bias transistor is connected through the third resistor to a junction between the first and second resistors. The first and second resistors are connected in series between a first supply potential and a reference potential. The gate and source of the bias transistor are connected together through a fourth resistor.

Abstract: A substrate assembly and method of forming the substrate assembly having a very thin form factor and a large amount of manufacturing flexibility. A flexible tape has a number of device blocks. Devices, passive or active, are joined to the device blocks forming a flexible tape assembly and the flexible tape assembly is electrically tested. Substrates are formed having cavities matching the device blocks. The flexible tape assembly is then joined to the substrate such that the devices fit into the cavities, thereby forming a substrate assembly having a very thin form factor. The flexible tape can be stored on a reel and the substrates can be formed in an array and cut to the desired size providing manufacturing flexibility.

Abstract: An interconnect line on an IMD layer on a semiconductor device is formed in an interconnect hole in the IMD layer. The interconnect hole has walls and a bottom in the IMD layer. A diffusion barrier is formed on the walls and the bottom of the hole. Fill the interconnect hole with a copper metal line. Perform a CMP step to planarize the device and to remove copper above the IMD layer. Deposit a passivating metal layer on the surface of the copper metal line encapsulating the copper metal line at the top of the hole. Alternatively, a blanket deposit of a copper metal line layer covers the diffusion layer and fills the interconnect hole with a copper metal line. Perform a CMP process to planarize the device to remove copper above the IMD layer. Deposit a passivating metal layer on the surface of the copper metal line encapsulating the copper metal line at the top of the hole in a self-aligned deposition process.

Abstract: This invention relates to the new reversed flash memory device which has improved electrical performance, yield and reliability because of better control of the dielectric interfaces resulting from first making the poly 2 control gate within the silicon substrate. The reverse structure is novel, as are the described process methods for forming the reverse stacking order.Shallow trenched isolation (STI) is first formed in the p-silicon substrate and encompasses the poly 2 control gate region; then the interpoly dielectric is grown/deposited on that single crystal silicon substrate. The floating poly 1 is formed on top of this uniform interpoly dielectric that has well-controlled surface smoothness. The tunnel oxide layer is formed on the floating poly 1 layer, and the source/drain is implanted on a straddling additional poly layer. There are fewer edges and associated stress weaknesses in the dielectric breakdown of both the reversed interpoly dielectric and the floating tunnel oxide.

Abstract: A low current differential fuse circuit for adjusting the operating characteristics of semiconductor circuits. A switching circuit is connected between a first and a second fuse. The first and second fuses are respectively connected to a supply potential (e.g., 5.0 volts) and a reference potential (e.g., 0.0 volts). Additionally, each fuse is connected to a circuit for blowing the fuse. The switching circuit is also connected to a bias circuit that biases the switching components (e.g., a PMOS transistor and an NMOS transistor) to ensure that the switching circuit correctly switches in response to a selected fuse (e.g., either the first fuse or the second fuse) being blown (e.g., opened). An inverter circuit may also be provided between a switching node and an output node to provide a desired output potential.