Patents Assigned to Integrated Device Technology
  • Patent number: 10923273
    Abstract: In some embodiments, a transmit coil configuration is provided. A coil configuration for a wireless transmitter according to some embodiments can include a plurality of turns coupled between a first tap coupled to an innermost turn and a second tap coupled to an outermost turn; and at least one adjustment tap coupled to at least one turn of the transmitter coil between the innermost turn and the outermost turn. The transmission coil can include an MST coil coupled to the second tap of the transmission coil. In some embodiments, the MST coil can include a plurality of turns arranged in one of a circle, an oval, an egg shape, or a square shape.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: February 16, 2021
    Assignee: Integrated Device Technology, Inc.
    Inventors: Gustavo J. Mehas, Tao Qi
  • Patent number: 10879623
    Abstract: An apparatus includes a plurality of transmitter channels and a plurality of feedback networks. Each of the plurality of transmitter channels may be coupled to a respective antenna element in a respective group of antenna elements of a phased array antenna. Each of the transmitter channels generally comprises a power amplifier circuit configured to drive the respective antenna element in the respective group of antenna elements to produce and steer a radio-frequency beam. Each of the plurality of feedback networks may be coupled between an output and an input of a respective power amplifier circuit of a respective transmitter channel. Each of the feedback networks generally comprises a resistor and a capacitor connected in series. The respective power amplifier circuit with the feedback network generally maintains a power matching condition with load variation associated with performing beam steering of the radio-frequency beam using the antenna elements of the phased array antenna.
    Type: Grant
    Filed: January 30, 2020
    Date of Patent: December 29, 2020
    Assignee: Integrated Device Technology, Inc.
    Inventors: Samet Zihir, Tumay Kanar
  • Patent number: 10872054
    Abstract: An apparatus includes an interface and a plurality of impedance branches. The interface may be configured to receive a data signal and a plurality of selection signals. The plurality of impedance branches may comprise a group of branches and a separated branch. The plurality of impedance branches may be configured to adjust an impedance value and a gain of a data path for the data signal in response to the selection signals. The group of branches may be controlled in response to the selection signals to select the impedance value and a first gain value in a first mode. The separated branch may replace one of the plurality of impedance branches in the group of branches in response to the selection signals to select a second gain value in a second mode.
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: December 22, 2020
    Assignee: Integrated Device Technology, Inc.
    Inventors: Yi Xie, Yue Yu, Yuan Zhang, Yu Min Zhang
  • Patent number: 10840741
    Abstract: A wireless power circuit is presented that includes a transmit coil coupled to a first node; a receive coil coupled to the first node; a switch circuit coupled to the transmit coil and the receive coil opposite the first node, the switch switching the transmit coil to a second node in a transmit mode and switching the receive coil to the second node in a receive mode; a controller coupled to the first node and the second node, the controller coupled to provide signals to the switch circuit; and a self-start circuit coupled to the receive coil (or Tx coil) that automatically selects one of the coils to be used, the self-start circuit providing power to the switch circuit to hold the switch circuit in the receive mode (or predefined coil to be selected by default).
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: November 17, 2020
    Assignee: Integrated Device Technology, Inc.
    Inventors: Nicholaus Wayne Smith, Tao Qi, Jiangjian Huang, Chan Young Jeong, Gustavo James Mehas
  • Patent number: 10837848
    Abstract: The invention discloses an inductive torque sensor and a combined inductive torque and angle sensor for position sensing. The object of the invention to propose a torque sensor as well as a combined torque and angle sensor which does not require a shielding of the sensor PCB and which can provide a plausibility check of the torque sensor when using only three sensors will be solved by an inductive torque sensor for detection of torque movements comprising a stationary printed circuit board (PCB) with sensing coils, a primary target and a secondary target, whereas the primary target and secondary target each comprise of different metallic patterns, whereas each target covers 50% of the sensing coils and the combined coverage of both targets varies between 50% and 100% depending on the relative position between the two targets.
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: November 17, 2020
    Assignee: Integrated Device Technology, Inc.
    Inventors: Josef Janisch, Andreas Buchinger
  • Patent number: 10826315
    Abstract: In some embodiments, a wireless power charging circuit includes a wireless power receiver configured to receive wireless power from a receive coil and to produce a first voltage; an open loop capacitor divider coupled to receive the first voltage from the wireless power receiver and configured to provide a second voltage, the second voltage being reduced from the first voltage; and a linear battery charger coupled to receive the second voltage from the open loop capacitor and configured to provide a charging voltage to provide to a battery coupled to the system.
    Type: Grant
    Filed: October 30, 2018
    Date of Patent: November 3, 2020
    Assignee: Integrated Device Technology, Inc.
    Inventors: Rui Liu, Lijie Zhao
  • Patent number: 10826506
    Abstract: An apparatus includes a plurality of latches and a plurality of logic gates. Each latch may be setable and resettable. The logic gates may be connected to the latches to form a multi-modulus divider that generates an output clock signal by dividing an input clock signal in response to a command signal. Each latch may be commanded into a corresponding initial state while the command signal is in an initialization state. Each latch is generally free to change states while the command signal is in a run state. A modulus division operation of the multi-modulus divider may start upon an initial edge of the input clock signal after the command signal changes from the initialization state to the run state.
    Type: Grant
    Filed: December 5, 2017
    Date of Patent: November 3, 2020
    Assignee: Integrated Device Technology, Inc.
    Inventor: Chengming He
  • Patent number: 10804858
    Abstract: An apparatus comprises an amplifier circuit and a bias circuit. The bias circuit is generally configured to dynamically adjust a bias voltage reference at a bias node connected to one or more input transistors of the amplifier circuit to maintain a low baseband impedance.
    Type: Grant
    Filed: January 25, 2019
    Date of Patent: October 13, 2020
    Assignee: Integrated Device Technology, Inc.
    Inventors: Samet Zihir, Himanshu Khatri, Tumay Kanar
  • Patent number: 10804750
    Abstract: A method of measuring a Q-factor in a wireless power transmitter includes charging a capacitor in a LC tank circuit that includes a transmission coil to a voltage; starting a Q-factor determining by coupling the LC tank circuit to ground to form a free-oscillating circuit; monitoring the voltage across the capacitor as a function of time as the LC tank circuit oscillates; and determining the resonant frequency and the Q-factor from monitoring the voltage.
    Type: Grant
    Filed: August 16, 2018
    Date of Patent: October 13, 2020
    Assignee: Integrated Device Technology, Inc.
    Inventors: Rui Liu, Zhitong Guo, Haiwen Jiang
  • Patent number: 10797535
    Abstract: In accordance with some embodiments of the present invention, a method of determining a Q-factor in a transmit circuit with a resonant circuit includes setting a system voltage; performing a coarse scan to determine a course resonant frequency; performing a fine scan based on the course scan to determine a resonant frequency; performing a final measurement at the resonant frequency to determine an average system voltage and an average peak voltage of the resonant circuit; calculating a Q parameter from the average system voltage and the average peak voltage; and calculating the Q-factor from the Q parameter.
    Type: Grant
    Filed: October 8, 2018
    Date of Patent: October 6, 2020
    Assignee: Integrated Device Technology, Inc.
    Inventors: Nicholaus Smith, Stefan Maireanu, Haiwen Jiang, David Wilson
  • Patent number: 10790594
    Abstract: An apparatus includes a first circuit and a plurality of second circuits. The first circuit may be configured to generate a pair of quadrature signals from a radio-frequency signal. The second circuits may each comprise a plurality of cascode amplifiers. The cascode amplifiers may be connected in parallel. The cascode amplifiers may be configured to generate a plurality of intermediate signals by modulating the quadrature signals in response to a first control signal and a second control signal. The first control signal generally switches a contribution of the cascode amplifiers in the generation of the intermediate signal. The second control signal may adjusts a total current passing through all of the cascode amplifiers.
    Type: Grant
    Filed: September 14, 2018
    Date of Patent: September 29, 2020
    Assignee: Integrated Device Technology, Inc.
    Inventors: Tumay Kanar, Samet Zihir, Naveen Krishna Yanduru
  • Patent number: 10784044
    Abstract: In accordance with embodiments of the present invention, a coil design for the transmission of wireless power. In some embodiments, the coil can include a winding with one or more turns of conductive traces mounted on a substrate, wherein the one or more turns include characteristics that enhance operation of the coil. In some embodiments, the winding includes a transmit coil and a receive coil, each coupled to terminals that provide for a transmit functionality and a receive functionality. In some embodiments, the traces are varied in width and/or thickness in order to optimize the inductance and the coil resistance. In some embodiments, parameters of a control circuit coupled to the coil to affect a transmit functionality or a receive functionality can be optimized.
    Type: Grant
    Filed: April 5, 2019
    Date of Patent: September 22, 2020
    Assignee: Integrated Device Technology, Inc.
    Inventors: Tao Qi, Gustavo Mehas, Chan Young Jeong, Xinyun Gu, Nicholaus Wayne Smith, Amit D. Bavisi, Daryl Jay Sugasawara, Aihua Lee, Tianze Kan
  • Patent number: 10776293
    Abstract: An apparatus including a host interface and a registered clock driver interface. The host interface may be configured to receive an enable command from a host. The registered clock driver interface may be configured to perform power management for a dual in-line memory module, generate data for the dual in-line memory module, communicate the data, receive a clock signal and communicate an interrupt signal. The registered clock driver interface may be disabled at power on. The registered clock driver interface may be enabled by in response to the enable command. The apparatus may be implemented as a component on the dual in-line memory module.
    Type: Grant
    Filed: May 1, 2018
    Date of Patent: September 15, 2020
    Assignee: Integrated Device Technology, Inc.
    Inventors: Shwetal Arvind Patel, Andy Zhang, Wen Jie Meng, Chenxiao Ren, Alejandro F. Gonzalez
  • Patent number: 10769082
    Abstract: An apparatus including a host interface and a power management interface. The host interface may be configured to receive control words from a host. The power management interface may be configured to (i) enable the host to read/write data from/to a power management circuit of a dual in-line memory module, (ii) communicate the data, (iii) generate a clock signal and (iv) communicate an interrupt signal. The power management interface is disabled at power on. The apparatus is configured to (i) decode the control words, (ii) enable the power management interface when the control words provide an enable command and (iii) perform a response to the interrupt signal. The clock signal may operate independently from a host clock.
    Type: Grant
    Filed: May 1, 2018
    Date of Patent: September 8, 2020
    Assignee: Integrated Device Technology, Inc.
    Inventors: Shwetal Arvind Patel, Andy Zhang, Wen Jie Meng, Chenxiao Ren, Alejandro F. Gonzalez
  • Patent number: 10763913
    Abstract: An apparatus includes a log amplifier and a calibration circuit. The log amplifier may be configured to generate an output signal in response to an offset between a first voltage and a second voltage. The calibration circuit may be configured to disconnect an input power and perform a cancellation of the offset when the input power is not present. The first voltage may be generated by the apparatus in response to a power detection. The second voltage may be received from a reference circuit. The cancellation of the offset may extend a working range of the apparatus. The output may provide a linear-in-dB power detection.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: September 1, 2020
    Assignee: Integrated Device Technology, Inc.
    Inventors: Himanshu Khatri, Samet Zihir, Tumay Kanar
  • Patent number: 10756558
    Abstract: In accordance with aspects of the present invention, a first wireless power enabled device includes a transceiver and control logic. The transceiver includes a plurality of switches coupled in a full-bridge configuration with a resonant tank circuit. The control logic is configured to detect a presence of a second wireless power enabled device, establish a trusted relationship with the second wireless power enabled device, determine an operating mode of the first wireless power enabled device selected from a transmit mode or a receive mode, and drive the plurality of switches to operate the resonant tank circuit in the determined operating mode. The first wireless power enabled device may further include a memory that stores a copy of a first key associated with the first wireless power enabled device and a copy of a second key associated with the second wireless power enabled device.
    Type: Grant
    Filed: May 24, 2017
    Date of Patent: August 25, 2020
    Assignee: Integrated Device Technology, Inc.
    Inventors: Manjit Singh, Jianbin Hao, Zhuyan Shao, Christopher Stephens
  • Patent number: 10756442
    Abstract: An apparatus includes a package and a beam former circuit. The package may be configured to be mounted on an antenna array at a center of four antenna elements. The beam former circuit may (i) be disposed in the package, (ii) have a plurality of ports, (iii) be configured to generate a plurality of radio-frequency signals in the ports while in a transmit mode and (iv) be configured to receive the radio-frequency signals at the ports while in a receive mode. A plurality of ground bumps may be disposed between the beam former circuit and the package. The ground bumps may be positioned to bracket each port. Each ground bump may be electrically connected to a signal ground to create a radio-frequency shielding between neighboring ports.
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: August 25, 2020
    Assignee: Integrated Device Technology, Inc.
    Inventors: Tumay Kanar, Chih-Hsiang Ko, Samet Zihir
  • Patent number: 10749350
    Abstract: A system and method of wireless power transfer using a power converter with a bypass mode includes a power converter. The power converter includes a pulsed switch, a capacitor configured to supply a drive voltage to the pulsed switch, a first circuit configured to charge the capacitor when the power converter operates in a switched mode of operation, and, a second circuit configured to charge the capacitor when the power converter operates in a bypass mode of operation.
    Type: Grant
    Filed: April 2, 2018
    Date of Patent: August 18, 2020
    Assignee: Integrated Device Technology, Inc.
    Inventors: Rosario Pagano, Christopher Joseph Daffron, Angel Maria Gomez Arguello, Siamak Abedinpour
  • Patent number: 10750377
    Abstract: An apparatus comprises a plurality of transceiver circuits, a memory, and an interface circuit. The memory generally embodies a table associating a plurality of index values with corresponding gain and phase values for each channel of each of the transceiver circuits. In a first mode, the interface circuit may be configured to receive the corresponding gain and phase values associated with each of the plurality of index values and store the corresponding gain and phase values in the table. In a second mode, the interface circuit, in response to receiving one of the index values, configures each channel of each of the transceiver circuits with the corresponding gain and phase values from the table.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: August 18, 2020
    Assignee: Integrated Device Technology, Inc.
    Inventors: Samet Zihir, Kevin Sheng, Mark Cuezon, Himanshu Khatri
  • Patent number: 10749501
    Abstract: An apparatus comprises a first RF port, a second RF port, a first resonator circuit and at least one second resonator circuit. The first resonator circuit and the second resonator circuit may be connected between the first RF port and the second RF port. The first resonator circuit may comprise a first inductor, a first capacitor, and a first stacked switch device. The second resonator circuit may comprise a second inductor, a second capacitor, and a second stacked switch device. The first capacitor and the first stacked switch device may be coupled in series across the first inductor. The second capacitor, the second inductor, and the second stacked switch device may be connected in parallel.
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: August 18, 2020
    Assignee: Integrated Device Technology, Inc.
    Inventors: Hojung Ju, Roberto Aparicio Joo