Abstract: In accordance with an embodiment of the present invention, a bandgap voltage reference circuit includes a plurality of circuit branches, a plurality of resistors and a plurality of switches. The plurality of switches are used to selectively change over time which of the resistors are connected to be within a first one of the circuit branches and which of the resistors are connected to be within a second one of the circuit branches, to thereby reduce the effects that long term drift of the resistors have on a bandgap voltage output (VGO) of the bandgap voltage reference circuit.

Abstract: A device having a detector includes a sensor package. The sensor package includes a light sensor, at least one filter located over the light sensor and at least one bond pad. The light sensor is formed on a semiconductor device that provides sensor information related to light incident upon the light sensor. A perimeter of each bond pad is covered by a protective layer forming a sidewall seal. The sensor package also includes a package that encases the light sensor, filter(s) and bond pad(s). Additionally, at least one package pin is communicatively coupled to the bond pad(s). The device also includes a functional circuit that is coupled to the sensor package and receives the sensor information from the light sensor. The device can be an ambient light sensor, camera, backlit mirror, handheld electronic device, filter device, light-to-digital output sensor, gain selection device, proximity sensor, or light-to-voltage non-linear converter.

Abstract: A system and method for automatically calibrating a Time-of-Flight (TOF) transceiver system for proximity/motion detection, is provided. Moreover, the system comprises a component that senses a signal (e.g., current or voltage) at an light emitting diode (LED), an attenuator, a signal injector at a sensor and a switching circuit that toggles between a normal mode (e.g., when signal from the sensor is input to the sensor front end) and a calibration mode (e.g., when signal from the attenuator is input to the sensor front end). During the calibration mode, the sensor front end identifies the phase delay error within the signal path, including board and/or package parasitic, and accounts for the phase delay error during proximity/motion detection in the normal mode.

Abstract: A method of forming a semiconductor structure is provided. One method comprises forming a device region between a substrate and a bond pad. Patterning a conductor between the bond pad and the device region with gaps. Filling the gaps with insulation material that is harder than the conductor to form pillars of relatively hard material that extend through the conductor and forming an insulation layer of the insulation material between the conductor and the bond pad.

Abstract: An embodiment of a charger may include an input, at least one switch having a first node coupled to a reference voltage, a current sensor coupled between the input and a second node of the at least one switch, an output coupled to a third node of the at least one switch, and a charge controller coupled to the input to determine an input voltage, to the current sensor to determine an input current and to control inputs of the at least one switch. The at least one switch may be responsive to control signals supplied by the charge controller to the control inputs thereof to control voltage and current at the output of the charger. The charge controller may be responsive to the input voltage and the input current to produce the control signals in a manner that maximizes electrical power drawn at the input.

Abstract: A buck regulator comprises an upper switching transistor connected between a voltage input node and a phase node. A lower switching transistor is connected between the phase node and a ground node. An inductor is connected between the phase node and an output voltage node. Circuitry generates control signals to the upper switching transistor and the lower switching transistor responsive to the output voltage and a reference voltage. The control signals to the lower switching transistor selectively turn off the lower switching transistor responsive to a current direction through the lower switching transistor and an indication of whether a voltage error signal has been clamped at a selected level.

Abstract: A “tabbed” MOS device provides radiation hardness while supporting reduced gate width requirements. The “tabbed” MOS device also utilizes a body tie ring, which reduces field threshold leakage. In one implementation the “tabbed” MOS device is designed such that a width of the tab is based on at least a channel length of the MOS device such that a radiation-induced parasitic conduction path between the source and drain region of the device has a resistance that is higher than the device channel resistance.

Abstract: A multi-channel time interleaved ADC (TIADC) provides for offset estimation and correction. The correction is accomplished through analog adjustment of offset rather than by digital correction of their outputs. In certain aspects, polarity reversal circuits may be used to further improve performance.

Abstract: A method and system for compressing coefficients of a digital filter is provided. In one approach, the method comprises providing a digital filter having a plurality of consecutive filter coefficients including a first filter coefficient, determining consecutive difference values between each of the consecutive filter coefficients, and storing the first filter coefficient and the consecutive difference values in a memory. The consecutive filter coefficients are generated by retrieving the first filter coefficient, and adding a first difference value to the first filter coefficient to generate a consecutive second filter coefficient. The first difference value corresponds to a difference between the first filter coefficient and the second filter coefficient. A consecutive next difference value is then added to the second filter coefficient to generate a consecutive next filter coefficient.

Abstract: A voltage regulator generates a regulated output voltage responsive to an input voltage and drive control signals. An error amplifier generates an error voltage signal responsive to the regulated output voltage and a reference voltage. A PWM modulator generates a PWM control signal responsive to the error voltage signal, a ramp voltage and an inverse of the reference voltage. Control circuitry within the PWM modulator maintains the error voltage signal applied to the PWM modulator at substantially a same DC voltage level over the reference voltage operating range and maintains the error voltage signal above a minimum value of the ramp voltage. Driver circuitry generates the drive control signals responsive to the PWM control signal.

Abstract: A buck/boost voltage regulator generates a regulated output voltage responsive to an input voltage and a plurality of control signals. The buck/boost voltage regulator includes a plurality of switching transistors responsive to the plurality of control signals. Control circuitry monitors the regulated output voltage and generates the plurality of control signals responsive thereto. The control circuitry controls the operation of the plurality of switching transistors to enable a charging phase in a first mode of operation, a pass through phase in a second mode of operation and a discharge phase in a third mode of operation within the buck/boost voltage regulator to eliminate occurrence of a four switch switching condition.

Abstract: A current sense amplifier includes a high-side current sense amplifier and a low-side current sense amplifier. The high-side current sense amplifier provides a current sense voltage signal for use with a voltage regulator and generates the current sense voltage signal responsive to a first current sensed through a high-side switching transistor in a first mode when the high-side switching transistor is turned on and the low-side switching transistor is turned off. The high-side current sense amplifier generates the current sense voltage signal responsive to a second current through the low-side switching transistor in a second mode when the low-side switching transistor is turned on and the high-side switching transistor is turned off. The low-side current sense amplifier senses the second current through the low-side switching transistor and generates a current control signal to the high-side current sense amplifier in the second mode.

Abstract: A regulator controller which controls conversion of an input voltage to an output voltage, including a switching regulator, a low dropout (LDO) regulator, and a mode controller. The switching regulator develops a pulse control signal to regulate the output voltage when enabled. The LDO regulator also regulates the output voltage when enabled. The mode controller enables or disables the switching regulator and the LDO regulator based on a load condition. The switching regulator is enabled and the LDO regulator is disabled during normal operation. The LDO regulator is enabled when the low load condition is detected, such as a skipped pulse on the pulse control signal. The switching regulator is disabled when the pulse control signal reaches a minimum level. The LDO regulator is disabled and the switching regulator is re-enabled based on threshold conditions of the current output of the LDO regulator.

Abstract: Provided herein are optical sensor systems that can be used for ambient light detection, proximity detection and motion detection, as well as to larger systems that include such an optical sensor system, and to related methods. In an embodiment, the optical sensor system includes a front end, an ambient light channel, a proximity channel and a motion channel. In an embodiment, offset and gain of the proximity channel is adjusted based on motion detected by the motion channel.

Abstract: A controller for a switch mode regulator with discontinuous conduction mode (DCM) correction which includes a correction network and a modulator. The correction network detects a low load condition indicative of regulation error during DCM and asserts an adjust value indicative thereof. The modulator receives the adjust value and adjusts operation accordingly to improve regulation during DCM. The correction network receives or determines a regulation metric, such as periods between successive pulses of a pulse control signal, or a current sense signal indicative of load current, and compares the regulation metric with one or more thresholds for determining the level of adjustment. Adjustment may be made using one or more methods, such as adjusting pulse on-time, adjusting pulse off-time, adjusting frequency of operation, etc.

Abstract: A system and method for adaptive analog infrared subtraction during ambient light sensing is provided. The system employs a current mirror circuit to perform an analog subtraction of currents (IIR and IIR+AB) obtained from photodiodes. An ADC is employed to digitize the output signal from the current mirror and, the digitized signal is amplitude modulated at a chop frequency utilized by the current mirror. Further, a digital filer is employed to generate an adjustment signal by filtering the modulated signal and the gain of the current mirror is calibrated by employing the adjustment signal. Moreover, as the adjustment signal converges to a value indicative of the mismatch error of the current mirror, the output signal of the current mirror provides an accurate value of ambient light incident on the photodiode.

Abstract: A structure and method for a semiconductor device includes a silicon device layer and a gallium nitride (GaN) device layer. In an embodiment, the silicon device layer and the GaN device layer have upper surfaces which are coplanar with each other. In another embodiment, the GaN device layer does not directly underlie the silicon device layer, and the silicon device layer does not directly underlie the GaN device layer. The semiconductor device can further include a silicon-based semiconductor device formed on and/or within the silicon device layer, and a nitride-based semiconductor device formed on and/or within the GaN device layer. The GaN device layer can include a plurality of layers which can be formed as conformal blanket layers and then planarized, or which can be selectively formed then planarized.

Abstract: Embodiments disclosed herein provide for a voltage regulator having one or more Zener diodes coupled in series between an output voltage and system ground. The one or more Zener diodes are in a reverse biased configuration. A transistor is coupled in series with the one or more Zener diodes between the one or more Zener diodes and system ground. A control circuit is coupled to the transistor and configured to adjust the transistor to control a voltage level of the output voltage. The control circuit is configured such that transistor is adjusted substantially independent of values of the one or more Zener diodes.

Abstract: A circuit comprises a plurality of segments and a clamp circuit. Each of the plurality of segments comprises a bond pad coupled to a multi-bonded pin via a respective bond wire and a conductor coupling the bond pad to a respective internal connection. The bond pad from each of the plurality of segments is coupled to the same multi-bonded pin. The clamp circuit comprises a plurality of input pins and a plurality of clamp transistors. Each input pin is coupled to the bond pad of a respective one of the plurality of segments via the respective conductor. Each clamp transistor is coupled to a respective one of the input pins, wherein each of the plurality of clamp transistors is configured to prevent a voltage on the respective conductor from exceeding a respective voltage limit.

Abstract: A Device-to-Device Communication Bus protocol may facilitate transmission of a two to four byte packet by any device sharing the bus. All devices on the bus may monitor the bus, receiving all packets transmitted by other devices and recognizing when they may initiate transmission. The first byte of the packet may be an Address byte uniquely identifying the sender and allowing hardware arbitration to uniquely select one of any number of senders who may wish to transmit and begin transmission simultaneously. Arbitration may take place during transmission of the Address byte, with the transmitting device monitoring a bus bit value as it is transmitting the Address byte. If the data value observed by the transmitting device doesn't match the transmitting device's desired transmit value, the transmitting device may recognize loss of arbitration and suspend transmission to retry once the packet is complete. The receive function in every device may accept the packet as a normal received packet.