Patents Assigned to Intersil
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Patent number: 6791304Abstract: An electronic device may include a circuit board, at least one load circuit carried by the circuit board, and a power distribution conductor carried by the circuit board and connected to the at least one load circuit. The electronic device may also include a multiphase switching regulator including a plurality of output stages connected to the power distribution conductor, and a controller for controlling the output stages based upon respective phase currents. The respective phase currents may be derived from corresponding voltage drops across the power distribution conductor and a matrix of resistivity values.Type: GrantFiled: January 24, 2003Date of Patent: September 14, 2004Assignee: Intersil Americas Inc.Inventors: Lawrence G. Pearce, Nicolaas W. Van Vonno
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Publication number: 20040174205Abstract: A voltage margin circuit has an input that receives a control voltage for programming an output reference voltage. The control voltage is coupled through an input resistor to an operational amplifier, referenced to a voltage midway between the voltage range of the input voltage and having its output coupled to a pair of transistors, whose current flow paths are coupled to inputs of a first pair of current mirrors. Outputs of the first current mirrors pair are cross-coupled to inputs of a second current mirrors pair. Outputs of the second current mirror pair are coupled through an output resistor to a prescribed voltage. The output reference voltage is the sum of the prescribed voltage and an offset as the product of the output resistor and an output current supplied by one of the third and fourth current mirrors.Type: ApplicationFiled: March 4, 2003Publication date: September 9, 2004Applicant: Intersil Americas Inc.Inventor: Harold Allen Wittlinger
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Patent number: 6788229Abstract: A voltage margin setting interface circuit has a single input pin, and is configured to program the slew rate and polarity direction of variation of the operation of a digital-to-analog converter, such as may be used to set a reference voltage level, for application to an error amplifier of a voltage regulator circuit of the power supply of a personal computer. A DAC clocking control circuit is coupled to an output port, and to respective DAC increment and decrement ports, and is operative to control the magnitude of output current, and to assert an output signal at one of the increment and decrement ports, in accordance with a prescribed relationship between the voltage and upper and lower ranges of the input voltage relative to its middle value.Type: GrantFiled: March 14, 2003Date of Patent: September 7, 2004Assignee: Intersil Americas Inc.Inventor: Harold Allen Wittlinger
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Patent number: 6785324Abstract: A full-duplex radio transceiver includes a transmitter and a receiver. A duplexer is connected to an output of the transmitter and an input of the receiver. The receiver includes a low noise amplifier having a nonlinear portion capable of generating undesired cross-modulation signals based upon a portion of the transmit signal coupled thereto from the duplexer and a signal from another adjacent transmitter. A bandpass filter is connected to an output of the low noise amplifier, and at least one downconverter stage is connected to an output of the bandpass filter. A reactive termination circuit is connected between the low noise amplifier and the bandpass filter for changing an impedance presented to the output of the low noise amplifier with respect to signals from the colocated transmitter to thereby reduce undesired cross-modulation signals.Type: GrantFiled: October 26, 1999Date of Patent: August 31, 2004Assignee: Intersil CorporationInventors: Richard Douglas Schultz, Raphael Leite B. Matarazzo
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Publication number: 20040164836Abstract: The present invention relates to inductors with improved inductance and quality factor. In one embodiment, a magnetic thin film inductor is disclosed. In this embodiment, magnetic thin film inductor includes a plurality of elongated conducting regions and magnetic material. The plurality of elongated conducting regions are positioned parallel with each other and at a predetermined spaced distance apart from each other. The magnetic material encases the plurality of conducting regions, wherein when currents are applied to the conductors, current paths in each of the conductors cause the currents to generally flow in the same direction thereby enhancing mutual inductance.Type: ApplicationFiled: February 26, 2004Publication date: August 26, 2004Applicant: Intersil Americas Inc.Inventors: Xingwu Wang, Chungsheng Yang
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Publication number: 20040164781Abstract: A clock signal generator, which requires no clock selection pin includes a multiplexer to which external and internal clocks are applied. The external clock is further coupled directly and via an inverting delay to a logic circuit, the output of which controls a switching device connected across a capacitor. The capacitor is coupled to a current source and to a comparator that is coupled to a reference voltage. The comparator output serves as the select control for the multiplexer. The switching device repeatedly discharges the capacitor in response to the external clock signal, but otherwise allows the capacitor to be charged by the current source. The external clock signal is coupled to the output of the multiplexer, as long as the capacitor is repeatedly discharged by the external clock signal at a frequency sufficient to maintain the voltage across the capacitor less than the reference voltage.Type: ApplicationFiled: August 5, 2003Publication date: August 26, 2004Applicant: Intersil Americas Inc.Inventor: Brent Raymond Doyle
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Publication number: 20040160194Abstract: An electroluminescent driver circuit with improved power consumption efficiency. In one embodiment, an electroluminescent driver circuit comprises a load to provide illumination, an inductor, a transistor and a plurality of switches. The inductor has a first side coupled to a positive terminal of a power supply and a second side selectively coupled to the load. The transistor is coupled to selectively conduct current from the second side of the inductor to a ground terminal of the power supply in response to a digital signal. The plurality of switches are coupled to the load to selectively charge and discharge the load. Moreover, the switches selectively provide a discharge path for positive charge on the load to be discharged to the positive terminal of the power supply.Type: ApplicationFiled: February 12, 2004Publication date: August 19, 2004Applicant: Intersil Americas Inc.Inventor: Grady M. Wood
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Publication number: 20040159912Abstract: An integrated circuit including a bipolar transistor with improved forward second breakdown is disclosed. In one embodiment, the bipolar transistor includes a base, a collector, a plurality of emitter sections coupled to a common emitter and a ballast emitter for each emitter section. Each ballast resistor is coupled between the common emitter and an associated emitter section. The size of each ballast resistor is selected so that the size of the ballast resistors vary across a two dimensional direction in relation to a lateral surface of the bipolar transistor.Type: ApplicationFiled: February 13, 2003Publication date: August 19, 2004Applicant: INTERSIL AMERICAS INC.Inventor: James D. Beasom
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Publication number: 20040161905Abstract: Integrated circuits, semiconductor devices and methods for making the same are described. Each embodiment shows a diffused, doped backside layer in a device wafer that is oxide bonded to a handle wafer. The diffused layer may originate in the device handle, in the handle wafer, in the bond oxide or in an additional semiconductor layer of polysilicon or epitaxial silicon. The methods use a thermal bond oxide or a combination of a thermal and deposited oxide.Type: ApplicationFiled: February 12, 2004Publication date: August 19, 2004Applicant: Intersil Americas Inc.Inventors: Joseph A. Czagas, Dustin A. Woodbury, James D. Beasom
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Patent number: 6775807Abstract: A method of determining electrical parameters of inductive elements includes a novel technique of inverting an impedance matrix representative of said inductive circuit element. The method reduces model simulation time by a factor of 3000. In one embodiment, simulation time of a device model was reduced from 1 hour to less than 3 seconds. The method is suitable for use with circuit element modeling tools, circuit simulation environments, and antenna modeling systems. The method may be applied to inductors, transformers, antennas, etc.Type: GrantFiled: August 19, 2002Date of Patent: August 10, 2004Assignee: Intersil Americas Inc.Inventors: Rex Lowther, Yiqun Lin
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Publication number: 20040150439Abstract: A feed forward pulse width modulator compares a ramp signal with a control voltage to control respective states of a pulse width modulation signal. A respective cycle of the ramp signal is generated by charging a capacitor with a charging current that is proportional to input voltage until the voltage across the capacitor reaches a peak threshold that is also proportional to the input voltage. The capacitor is thereupon discharged with a discharging current proportional to the input voltage until the voltage across the capacitor reaches a (non-zero) valley threshold.Type: ApplicationFiled: February 3, 2003Publication date: August 5, 2004Applicant: Intersil Americas Inc.Inventor: Fred F. Greenfeld
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Publication number: 20040145360Abstract: An electronic device may include a circuit board, at least one load circuit carried by the circuit board, and a power distribution conductor carried by the circuit board and connected to the at least one load circuit. The electronic device may also include a multiphase switching regulator including a plurality of output stages connected to the power distribution conductor, and a controller for controlling the output stages based upon respective phase currents. The respective phase currents may be derived from corresponding voltage drops across the power distribution conductor and a matrix of resistivity values.Type: ApplicationFiled: January 24, 2003Publication date: July 29, 2004Applicant: Intersil Americas Inc.Inventors: Lawrence G. Pearce, Nicolaas W. Van Vonno
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Publication number: 20040146101Abstract: A digitally-implemented pulse width modulation (PWM) signal generator forms the PWM pulse width as a rational number based on full cycles of a PWM reference clock, and offers a very high effective resolution of the PWM pulse signal that is compatible with multiphase DC-DC converters. Being totally digital allows digital error accumulation and correction to occur at the point of origin of the PWM signal, well upstream of the relatively slow voltage control feedback loop. Quantization errors are corrected before they can accumulate in the converter's DC output voltage.Type: ApplicationFiled: January 24, 2003Publication date: July 29, 2004Applicant: Intersil Americas Inc.Inventor: Lawrence G. Pearce
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Publication number: 20040140719Abstract: A power supply switching circuit arrangement is configured to provide a relatively smooth (low noise) power supply switch-over during the transition between active and quiescent modes. Complementary inputs of an operational amplifier are selective coupled to feedback paths to the amplifier and the power supply switching circuit arrangement, so as to bias a switching transistor during system active mode at a value that is just slightly below the turn-on voltage of the transistor. This means that turning on the switching transistor for the purpose of providing quiescent mode powering of the utility device requires only a small transition in control voltage from an active mode ‘almost turned-on’ level.Type: ApplicationFiled: January 17, 2003Publication date: July 22, 2004Applicant: Intersil Americas Inc.Inventors: Salomon Vulih, Raymond Louis Giordano
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Patent number: 6765372Abstract: A current-sensing and correction circuit having programmable temperature compensation circuitry that is incorporated into a pulse width modulation controller of a buck mode DC—DC converter. The front end of the controller contains a sense amplifier, having an input coupled via a current feedback resistor to a common output node of the converter. The impedance of a MOSFET, the current through which is sampled by a sample and hold circuit is controlled by the sense amplifier unit. A sensed current correction circuit is coupled between the sample and hold circuit and the controller, and is operative to supply to the controller a correction current having a deterministic temperature-compensating relationship to the sensed current. The ratio of correction current to sensed current equals a value of one at a predetermined temperature, and has other values at temperatures other than at that temperature.Type: GrantFiled: November 26, 2002Date of Patent: July 20, 2004Assignee: Intersil Americas Inc.Inventor: Robert Haynes Isham
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Patent number: 6765290Abstract: A diode coupling-based arrangement back-biases each of the semiconductor substrates of a plurality of integrated circuits at the maximum (e.g., most negative) DC voltage applied to any individual circuit, irrespective of a potential variation in applied DC voltages. Each semiconductor chip/substrate includes an auxiliary terminal to which each DC voltage terminal for that chip is diode-coupled. The auxiliary voltage terminal is connected to the underside biasing and thermal dissipation pad of the substrate. When multiple packages are mounted and conductively joined to a shared metallic dissipation region of a support substrate, all auxiliary voltage terminals will be connected in common, so as to back-bias each semiconductor substrate to the most maximum (e.g., most negative) of all applied DC voltages.Type: GrantFiled: April 2, 2002Date of Patent: July 20, 2004Assignee: Intersil Americas Inc.Inventors: Leonel E. Enriquez, Douglas L. Youngblood
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Patent number: 6765247Abstract: An integrated circuit having a MOS structure with reduced parasitic bipolar transistor action. In one embodiment, a MOS integrated circuit device comprises a substrate having a working surface, at least one body region and for each body region a source and a layer of narrow band gap material. Each body region is formed in the substrate proximate the working surface of the substrate. Each layer of narrow band gap material is positioned in a portion of its associated body region and proximate the working surface of the substrate. Each layer of narrow band gap material has a band gap that is narrower than the band gap of the substrate in which each of the body regions are formed. Each source region is formed in an associated body region. At least a portion of each source region is also formed in an associated layer of narrow band gap material.Type: GrantFiled: October 12, 2001Date of Patent: July 20, 2004Assignee: Intersil Americas, Inc.Inventor: James D. Beasom
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Publication number: 20040135566Abstract: A controller for a multiphase converter including an error amplifier, a gain resistor, a current sense circuit and a gain adjust amplifier. The error amplifier generates an error signal based on an error voltage developed across a feedback resistance. The current sense circuit converts each of multiple sensed load currents into corresponding proportional voltages. The gain adjust amplifier circuit receives the proportional voltages and operates to apply at least one gain adjust voltage to the gain resistor to develop a gain adjust current that is applied through the feedback resistance to adjust gain. In one embodiment, the proportional voltages are time multiplexed or averaged to provide the gain adjust voltage(s). An IC integrating the multiphase converter need only include a single gain pin for coupling to a gain resistor to set gain for each phase.Type: ApplicationFiled: November 5, 2003Publication date: July 15, 2004Applicant: Intersil Americas Inc.Inventor: Robert H. Isham
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Publication number: 20040136286Abstract: If adequate setup time or hold time cannot be provided between a recording clock signal and modulated signal during the use of a laser control integrated circuit for generating a recording strategy from the recording clock signal and modulated signal to drive a laser diode, the disk recording information becomes erroneous. To solve this problem, the present invention provides the laser control integrated circuit input stage for the recording clock signal and modulated signal with variable delay devices that can vary the phases of these signals. The variable delay devices control the delay amounts of the variable delay devices in accordance with disk recording information error and optimize the phase relationship between the recording clock signal and modulated signal.Type: ApplicationFiled: July 30, 2003Publication date: July 15, 2004Applicants: Hitachi, Ltd., Intersil Corporation, Hitachi-LG Data Storage, Inc.Inventors: Koichiro Nishimura, Toshimitsu Kaku
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Patent number: 6763228Abstract: An automatic gain control (AGC) amplifier including a high gain transimpedance amplifier, a resistive feedback network and multiple transconductance stages coupled in the feedback path of the AGC amplifier. The feedback network receives an input signal and is coupled to the output of the high gain amplifier and has multiple intermediate nodes. Each transconductance stage has an input coupled to an intermediate node of the feedback network and an output coupled to the input of the high gain amplifier. Each transconductance stage is independently controllable to position a virtual ground within the feedback network to control closed loop gain. Each transconductance stage may have a bias current input coupled to a bias current control circuit. The control circuit controls each bias current to vary the gain of the AGC amplifier. The bias currents may be linearly controlled employing a ramp function to achieve a linear in dB gain response.Type: GrantFiled: December 21, 2001Date of Patent: July 13, 2004Assignee: Intersil Americas, Inc.Inventors: John S. Prentice, Patrick J. Landy