Abstract: An optical waveguide to fiber coupler comprises a substrate, a first waveguide and a second waveguide. The first and second waveguides are formed on the substrate and intersect at a right angle. A diffraction grating structure is formed at the intersection of the first and second waveguides, such that, when the coupler is physically abutted with a single mode optical fiber, in operation, a polarization split is obtained that couples orthogonal modes from the single-mode optical fiber into single identical modes in the first and second waveguides. Also, employing the coupler in optical polarization diverse applications provides for implementing a polarization insensitive photonic integrated circuit using such diffraction grating structures, such as, for example, photonic crystals.

Abstract: Alternative laser structures, which have potentially the same tuning performance as (S)SG-DBR and GCSR lasers, and a fabrication process which is similar to that of the (S)SG-DBR laser, are presented. The advantage of these structures is that the output power does not pass through a long passive region.

Abstract: Method for the production of airgaps in a semiconductor device, the semiconductor device comprising a stack of layers, the stack of layers comprising at least one iteration of a sub-stack of layers.

Abstract: An insulating barrier extending between a first conductive region and a second conductive region is disclosed. The insulating barrier is provided for tunnelling charge carriers from the first to the second region, the insulating barrier comprising a first portion contacting the first region and a second portion contacting the first portion and extending towards the second region, the first portion being substantially thinner than the second portion, the first portion being constructed in a first dielectric and the second portion being constructed in a second dielectric different from the first dielectric, the first dielectric having a lower dielectric constant than the second dielectric.

Abstract: Dielectric material compositions comprising HfO2 and a second compound are disclosed. The compositions are characterized by at least a part of the compositions being in a cubic crystallographic phase. Further, semiconductor based devices comprising such dielectric material compound and method for forming such compounds are disclosed.

Abstract: A tuneable film bulk acoustic resonator (FBAR) device. The FBAR device includes a bottom electrode, a top electrode and a piezoelectric layer in between the bottom electrode and the top electrode. The piezoelectric layer has a first overlap with the bottom electrode, where the first overlap is defined by a projection of the piezoelectric layer onto the bottom electrode in a direction substantially perpendicular to a plane of the bottom electrode. The FBAR device also includes a first dielectric layer in between the piezoelectric layer and the bottom electrode and a mechanism for reversibly varying an internal impedance of the device, so as to tune a resonant frequency of the FBAR device.

Abstract: In accordance with an embodiment of the invention, a FinFET device is disclosed which comprises a strained silicon channel layer formed on, at least, the sidewalls of a strain-relaxed silicon-germanium body.

Abstract: Method for the production of airgaps in a semiconductor device, the semiconductor device comprising a stack of layers, the stack of layers comprising at least one iteration of a sub-stack of layers.

Abstract: A method for the production of airgaps in a semiconductor device and device produced therefrom. The formation of airgaps is accomplished, in part, by chemically and/or mechanically changing the properties of a first dielectric layer locally, such that at least part of said first dielectric layer is converted locally and becomes etchable by a first etching substance. The local conversion of the dielectric material may be achieved during anisotropic etching of the material in oxygen containing plasma or ex-situ by performing an oxidizing step (e.g., a UV/ozone treatment or supercritical carbon dioxide with addition of an oxidizer). Formation of airgaps is achieved after creation of conductive lines and, alternatively, a barrier layer by a first etching substance. The airgaps are formed in a dual damascene structure, near the vias and/or the trenches of the damascene structure.

Abstract: A charge pump circuit and method for supplying power. The charge pump circuit includes a first circuit receiving at least one low voltage signal and generating an output voltage signal. The charge pump circuit also includes a second circuit receiving a clock signal and the output voltage signal. The second circuit sends a request signal based on a comparison of the output voltage signal with two reference voltage signals, where the two reference voltage signals are derived from two supply voltage signals having a substantially constant potential difference. The charge pump circuit further includes a high voltage generator receiving the request signal and sending the two supply voltage signals to the first circuit and the second circuit. The high voltage generator adjusts the voltage potentials of the two supply voltage signals such that the voltage potential of the output voltage signal falls between the voltage potentials of the two reference voltage signals.

Abstract: A multiple gate semiconductor device. The device includes at least two gates. The dopant distribution in the semiconductor body of the device varies from a low value near the surface of the body towards a higher value inside the body of the device.

Abstract: A method and apparatus for dispensing a liquid on the surface of a localized zone of a substrate, for example for cleaning of etching purposes. Along with the liquid, a gaseous tensio-active substance is supplied, which is miscible with said liquid and when mixed with the liquid, reduces the surface tension of said liquid, thus containing the liquid in a local zone of the substrate surface.

Abstract: An electrostatic discharge (ESD) protection circuit for the protection of an electronic circuit from an ESD event. The electronic circuit, in operation, is provided with a supply voltage and a reference voltage (typically electrical ground) via voltage terminals and/or power supply buses. The protection circuit includes two bipolar transistors in series, where the transistors are coupled between the supply voltage terminal/bus and the reference voltage terminal/bus. The bases of the transistors are coupled via a connection including two resistors in series, where the connection point between the two resistors is coupled with the connection point between the two transistors.

Abstract: A method for determining the presence of defects in a covering layer overlying an underlying layer in accordance with an embodiment of the invention comprises providing a substrate comprising the covering layer, where the covering layer is at least partially exposed. The covering layer is subjected to a first substance, such as a solvent, and then subjected to a light beam. An optical property of the covering layer is determined and compared with a threshold value. The presence of defects in the covering layer is determined by the difference of the optical property from the threshold value, where the optical property indicates a level of penetration of the first substance through the covering layer.

Abstract: A method for programming a single bit nonvolatile memory cell integrated on a metal-dielectric-semiconductor technology chip. The memory cell comprises a semiconductor substrate including a source, a drain, and a channel in-between the source and the drain. The memory cell further comprises a control gate that comprises a gate electrode and a dielectric stack. The gate electrode is separated from the channel by the dielectric stack. Further, the dielectric stack comprises at least one charge storage dielectric layer. The method for programming the memory cell comprises applying electrical ground to the source, applying a first voltage having a first polarity to the drain, applying a second voltage of the first polarity to the control gate; and applying a third voltage having a second polarity opposite to the first polarity to the semiconductor substrate.

Abstract: A method for detecting breakdown in a dielectric layer. The method includes applying a signal to the dielectric layer, measuring a plurality of sets of readings having values, which are in relation to the signal, searching and identifying outlier readings in each of the sets, the outlier readings being defined by the fact that they have values which are significantly higher or lower than the majority of the values of the set, selecting from each of the sets, one reading which is not one of the outlier readings, and comparing the value of the one selected reading to a reference value, so that the exceeding of the value leads to the conclusion that a predefined probability is present for having a breakdown state in the layer.

Abstract: A loop transformation step, to be performed on code and improving data transfer and storage, while executing said transformed code on a parallel processor, is disclosed. Improval of the data locality and regularity of the algorithm, described by said code, is aimed at. Said loop transformation step works globally and is feasible for realistic code sizes.

Abstract: An exemplary method for depositing a layer on a surface of a dielectric layer where the dielectric layer contains an organic material comprises exposing the surface of the dielectric layer to a substance, such as a substance containing nitrogen. This exposure modifies, at least, the exposed surface of the dielectric layer. The method further includes depositing a layer, such as a barrier layer, using an atomic layer deposition process on the exposed surface of the dielectric layer. In certain embodiments, exposure of the wafer to the substance containing nitrogen result in a first region of the dielectric having a first concentration of nitrogen incorporated and a second region having a second amount of nitrogen incorporated in the dielectric layer, the second concentration being higher greater than the first concentration.

Abstract: Structures and methods are disclosed to produce mechanical strength in Micro Electro Mechanical Systems by increasing the moment of inertia of some of the composing elements. In one aspect, a thermal sensor with improved mechanical strength, thermal insulation and time constant is achieved. Moreover, the current method and apparatus is advantageous in terms of process time and process cost, particularly in the area of lithographic patterning.

Abstract: Dielectric material compositions comprising HfO2 and a second compound are disclosed. The compositions are characterized by at least a part of the compositions being in a cubic crystallographic phase. Further, semiconductor based devices comprising such dielectric material compound and method for forming such compounds are disclosed.