Patents Assigned to Interuniversitair Microelektronica Centrum
  • Publication number: 20100096618
    Abstract: A catalyst particle for use in growth of elongated nanostructures, such as e.g. nanowires, is provided. The catalyst particle comprises a catalyst compound for catalyzing growth of an elongated nanostructure comprising a nanostructure material without substantially dissolving in the nanostructure material and at least one dopant element for doping the elongated nanostructure during growth by substantially completely dissolving in the nanostructure material. A method for forming an elongated nanostructure, e.g. nanowire, on a substrate using the catalyst particle is also provided. The method allows controlling dopant concentration in the elongated nanostructures, e.g. nanowires, and allows elongated nanostructures with a low dopant concentration of lower than 1017 atoms/cm3 to be obtained.
    Type: Application
    Filed: December 19, 2007
    Publication date: April 22, 2010
    Applicant: Interuniversitair Microelektronica Centrum (IMEC)
    Inventors: Francesca Iacopi, Philippe M. Vereecken
  • Publication number: 20100090192
    Abstract: For improved scalability of resistive switching memories, a cross-point resistive switching structure is disclosed wherein the plug itself is used to store the resistive switching material and where the top electrode layer is self-aligned to the plug using, for example, chemical-mechanical-polishing (CMP) or simply mechanical-polishing.
    Type: Application
    Filed: August 31, 2007
    Publication date: April 15, 2010
    Applicants: NXP, B.V., INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM (IMEC)
    Inventors: Ludovic Goux, Dirk Wouters
  • Publication number: 20100090251
    Abstract: In the preferred embodiments, a method to reduce gate leakage and dispersion of group III-nitride field effect devices covered with a thin in-situ SiN layer is provided. This can be obtained by introducing a second passivation layer on top of the in-situ SiN-layer, in combination with cleaning of the in-situ SiN before gate deposition and before deposition of the second passivation layer.
    Type: Application
    Filed: November 20, 2007
    Publication date: April 15, 2010
    Applicants: INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM (IMEC), KATHOLIEKE UNIVERSITEIT LEUVEN, K.U. LEUVEN R&D
    Inventors: Anne Lorenz, Joff Derluyn, Joachim John
  • Publication number: 20100084632
    Abstract: A novel nanostructure device operating in Junction Field Effect Transistor (JFET) mode is provided that avoids the majority of the carriers that interact with the interface (e.g. surface roughness, high-k scattering).
    Type: Application
    Filed: October 6, 2008
    Publication date: April 8, 2010
    Applicant: Interuniversitair Microelektronica Centrum vzw (IMEC)
    Inventors: Bart Soree, Wim Magnus
  • Publication number: 20100062224
    Abstract: The present invention provides a method for manufacturing micromachined devices on a substrate (10) comprising electrical circuitry, the micromachined devices comprising at least one micromachined structure, without affecting the underlying electrical circuitry. The method comprises providing a protection layer (15) on the substrate (10); providing on the protection layer (15) a plurality of patterned layers for forming the at least one micromachined structure, the plurality of patterned layers comprising at least one sacrificial layer (18); and thereafter removing at least a portion of the sacrificial layer (18) to release the at least one micromachined structure. The method furthermore comprises, before providing the protection layer (15), annealing the substrate (10) at a temperature higher than a highest temperature used during manufacturing of the micromachined device, annealing being for preventing gas formation underneath the protection layer (15) during subsequent manufacturing steps.
    Type: Application
    Filed: October 31, 2007
    Publication date: March 11, 2010
    Applicants: INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM, ASML NETHERLANDS BV
    Inventors: Ann Witvrouw, Luc Haspeslagh
  • Patent number: 7671768
    Abstract: The invention relates to an N-bit digital-to-analogue converter (DAC) system, comprising—a DAC unit comprising an N-bit master DAC and a slave DAC, yielding a master DAC unit output signal and a slave DAC unit output signal, respectively, said N-bit master DAC having an output step size,—an adder unit combining the master DAC unit output signal and the slave DAC unit output signal, and—a means for storing correction values for at least the master DAC, said correction values being used by the slave DAC, whereby the DAC system is arranged for master DAC output corrections with a size in absolute value higher than half of the output step size.
    Type: Grant
    Filed: May 2, 2005
    Date of Patent: March 2, 2010
    Assignees: Interuniversitair Microelektronica Centrum (IMEC), Universiteit Hasselt
    Inventor: Ward De Ceuninck
  • Publication number: 20100032812
    Abstract: A method is provided for controlling the average stress and the strain gradient in structural silicon germanium layers as used in micromachined devices. The method comprises depositing a single silicon germanium layer on a substrate and annealing a predetermined part of the deposited silicon germanium layer. The process parameters of the depositing and/or annealing steps are selected such that a predetermined average stress and a predetermined strain gradient are obtained in the predetermined part of the silicon germanium layer. Preferably a plasma assisted deposition technique is used for depositing the silicon germanium layer, and a pulsed excimer laser is used for local annealing, with a limited thermal penetration depth. Structural silicon germanium layers for surface micromachined structures can be formed at temperatures substantially below 400° C., which offers the possibility of post-processing micromachined structures on top of a substrate comprising electronic circuitry such as CMOS circuitry.
    Type: Application
    Filed: December 21, 2006
    Publication date: February 11, 2010
    Applicants: INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM (IMEC), AMERICAN UNIVERSITY CAIRO
    Inventors: Sherif Sedky, Ann Witvrouw
  • Publication number: 20100012977
    Abstract: A semiconductor device is disclosed. In one aspect, the device has a first and second active layer on a substrate, the second active layer having a higher bandgap than the first active layer, being substantially Ga-free and including at least Al?. The device has a gate insulating layer on a part of the second active layer formed by thermal oxidation of a part of the second active layer. The device has a gate electrode on at least a part of the gate insulating layer and a source electrode and drain electrode on the second active layer. The device has, when in operation and when the gate and source electrode are at the same voltage, a two-dimensional electron gas layer between the first and second active layer only outside the location of the gate electrode and not at the location of the gate electrode.
    Type: Application
    Filed: July 14, 2009
    Publication date: January 21, 2010
    Applicant: Interuniversitair Microelektronica Centrum vzw (IMEC)
    Inventors: Joff Derluyn, Farid Medjdoub, Marianne Germain
  • Patent number: 7649722
    Abstract: A method for designing an ESD protected analog circuit is described. The method includes creating an analog circuit design comprising a plurality of interconnected functional components and circuit-level ESD protection components with predetermined electric properties for achieving a predetermined analog performance during normal operation of the circuit as well as a predetermined ESD robustness during an ESD event on the circuit. At least one ESD event is simulated on the analog circuit design to identify at least one weak spot in the circuit. Component-level ESD protection components are added into the analog circuit design around each identified weak spot to reduce failure of the weak spot during an ESD event.
    Type: Grant
    Filed: September 14, 2006
    Date of Patent: January 19, 2010
    Assignee: Interuniversitair Microelektronica Centrum (IMEC)
    Inventors: Steven Thijs, Natarajan Mahadeva Iyer, Dimitri Linten
  • Patent number: 7646138
    Abstract: A thickness shear mode (TSM) resonator is described, comprising a diamond layer. The diamond layer is preferably a high quality diamond layer with at least 90% sp3 bonding or diamond bonding. A method for manufacturing such a resonator is also described. The thickness shear mode resonator according to embodiments described herein may advantageously be used in biosensor application and in electrochemistry applications.
    Type: Grant
    Filed: November 21, 2007
    Date of Patent: January 12, 2010
    Assignees: Interuniversitair Microelektronica Centrum (IMEC), Universiteit Hasselt
    Inventor: Oliver Williams
  • Publication number: 20100002236
    Abstract: A method is disclosed for determining the inactive doping concentration of a semiconductor region using a PMOR method. In one aspect, the method includes providing two semiconductor regions having substantially the same known as-implanted concentration but known varying junction depths. The method includes determining on one of these semiconductor regions the as-implanted concentration. The semiconductor regions are then partially activated. PMOR measures are then performed on the partially activated semiconductor regions to measure (a) the signed amplitude of the reflected probe signal as function of junction depth and (b) the DC probe reflectivity as function of junction depth. The method includes extracting from these measurements the active doping concentration and then calculating the inactive doping concentration using the determined total as-implanted concentration and active doping concentration.
    Type: Application
    Filed: June 25, 2009
    Publication date: January 7, 2010
    Applicants: Interuniversitair Microelektronica Centrum vzw (IMEC), Katholieke Universiteit Leuven
    Inventor: Janusz Bogdanowicz
  • Patent number: 7643709
    Abstract: A slanted grating coupler for coupling a radiation beam between a waveguide lying substantially in a plane on a substrate and an optical element outside that plane is provided, whereby the slanted grating coupler has a good coupling efficiency for medium or low index contrast material systems. Furthermore, a method for manufacturing the slanted grating coupler is provided. The slanted grating coupler comprises a plurality of slanted slots extending through the waveguide core and being arranged successively in the propagation direction of the waveguide. In at least part of the coupling region, the size of the slanted slots in a lateral direction, being a direction within the waveguide plane and perpendicular to the propagation direction of the waveguide, is smaller than the lateral size of the waveguide core. Successive slots are displaced with respect to each other in the lateral direction.
    Type: Grant
    Filed: May 8, 2007
    Date of Patent: January 5, 2010
    Assignees: Interuniversitair Microelektronica Centrum (IMEC), Universiteit Gent
    Inventors: Frederik Van Laere, Roeland Baets, Dries Van Thourhout, Dirk Taillaert
  • Publication number: 20090325424
    Abstract: In the present disclosure a device for sensing and/or actuation purposes is presented in which microstructures (20) comprising shafts (2) with different functionality and dimensions can be inserted in a modular way. That way, out-of-plane connectivity, mechanical clamping between the microstructures (20) and a substrate (1) of the device, and electrical connection between electrodes (5) on the microstructures (20) and the substrate (1) can be realized. Connections to external circuitry can be realised. Microfluidic channels (10) in the microstructures (20) can be connected to external equipment. A method to fabricate and assemble the device is provided.
    Type: Application
    Filed: April 28, 2008
    Publication date: December 31, 2009
    Applicants: INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM (IMEC), KATHOLIEKE UNIVERSITEIT LEUVEN, Albert-Ludwigs-Universitat Freiburg Fahnenbergplatz
    Inventors: Arno Aarts, Hercules Pereira Neves, Chris Van Hoof, Eric Beyne, Patrick Ruther, Robert Puers
  • Patent number: 7638922
    Abstract: The present invention relates to a device and corresponding method for ultrafast controlling of the magnetization of a magnetic element. A device (100) includes a surface acoustic wave generating means (102), a transport layer (104), which is typically functionally and partially structurally comprised in said SAW generating means (102), and at least one ferromagnetic element (106). A surface acoustic wave is generated and propagates in a transport layer (104) which typically consists of a piezo-electric material. Thus, strain is induced in the transport layer (104) and in the ferromagnetic element (106) in contact with this transport layer (104). Due to magneto elastic coupling this generates an effective magnetic field in the ferromagnetic element (106). If the surface acoustic wave has a frequency substantially close to the ferromagnetic resonance (FMR) frequency ?FMR the ferromagnetic element (106) is absorbed well and the magnetization state of the element can be controlled with this FMR frequency.
    Type: Grant
    Filed: December 24, 2004
    Date of Patent: December 29, 2009
    Assignee: Interuniversitair Microelektronica Centrum (IM
    Inventors: Wouter Eyckmans, Liesbet Lagae
  • Publication number: 20090317639
    Abstract: A method for manufacturing a stretchable electronic device is disclosed. In one aspect, the device comprises at least one electrically conductive channel connecting at least two components of the device. The method comprises forming the channel by laser-cutting a flexible substrate into a predetermined geometric shape.
    Type: Application
    Filed: June 24, 2008
    Publication date: December 24, 2009
    Applicants: Interuniversitair Microelektronica Centrum vzw (IMEC), Universiteit Gent
    Inventors: Fabrice Axisa, Jan Vanfleteren, Thomas Vervust
  • Publication number: 20090313730
    Abstract: An atomic force microscopy probe configuration and a method for manufacturing the same are disclosed. In one aspect, the probe configuration includes a cantilever, and a planar tip attached to the cantilever. The cantilever only partially overlaps the planar tip, and extends along a longitudinal direction thereof. The planar tip is of a two-dimensional geometry having at least one corner remote from the cantilever, which corner during use contacts a surface to be scanned.
    Type: Application
    Filed: June 11, 2009
    Publication date: December 17, 2009
    Applicant: Interuniversitair Microelektronica Centrum vzw (IMEC)
    Inventors: Thomas Hantschel, Wilfried Vandervorst, Kai Arstila
  • Publication number: 20090308456
    Abstract: The present disclosure relates to the field of organic optoelectronics. More particularly, the present disclosure relates to photovoltaic structures and to methods to produce the same. One aspect of the disclosure is a photovoltaic structure comprising: an electron acceptor material, and an electron donor material, wherein the electron donor material comprises: a host material, and a guest material, wherein the energy of the lowest excited singlet state of the guest is smaller than the energy of lowest excited singlet state of the host, wherein the fluorescence emission spectrum of the host overlaps with at least part of the absorption spectrum of the guest and wherein the energy of the lowest excited triplet state of the guest is larger than the energy of the lowest excited triplet state of the host.
    Type: Application
    Filed: November 14, 2008
    Publication date: December 17, 2009
    Applicant: Interuniversitair Microelektronica Centrum (IMEC)
    Inventors: Barry Rand, Jan Genoe, Paul Heremans
  • Publication number: 20090301557
    Abstract: A method for the production of a photovoltaic device, for instance a solar cell, is disclosed. In one aspect, the method comprises providing a substrate having a front main surface and a rear surface. The method further comprises depositing a dielectric layer on the rear surface, wherein the dielectric layer has a thickness larger than about 100 nm. The method further comprises depositing a passivation layer comprising hydrogenated SiN on top of the dielectric layer and forming back contacts through the dielectric layer and the passivation layer. In another aspect, corresponding photovoltaic devices, for instance solar cell devices, are also disclosed.
    Type: Application
    Filed: September 14, 2007
    Publication date: December 10, 2009
    Applicant: Interuniversitair Microelektronica Centrum (IMEC) vzw
    Inventors: Guido Agostinelli, Guy Beaucarne, Patrick Choulat
  • Patent number: 7626226
    Abstract: Non-volatile memory devices are disclosed. In a first example non-volatile memory device, programming and erasing of the memory device is performed through the same insulating barrier without the use of a complex symmetrical structure. In the example device, programming is accomplished by tunneling negative charge carriers from a charge supply region to a charge storage region. Further in the example device, erasing is accomplished by tunneling positive carriers from the charge supply region to the charge storage region. In a second example non-volatile memory device, a charge storage region with spatially distributed charge storage region is included. Such a charge storage region may be implemented in the first example memory device or may be implemented in other memory devices. In the second example device, programming is accomplished by tunneling negative charge carriers from a charge supply region to the charge storage region.
    Type: Grant
    Filed: October 29, 2007
    Date of Patent: December 1, 2009
    Assignee: Interuniversitair Microelektronica Centrum (IMEC)
    Inventor: Bogdan Govoreanu
  • Publication number: 20090283756
    Abstract: A quantum well device and a method for manufacturing the same are disclosed. In one aspect, the device includes a quantum well region overlying a substrate, a gate region overlying a portion of the quantum well region, a source and drain region adjacent to the gate region. The quantum well region includes a buffer structure overlying the substrate and including semiconductor material having a first band gap, a channel structure overlying the buffer structure including a semiconductor material having a second band gap, and a barrier layer overlying the channel structure and including an un-doped semiconductor material having a third band gap. The first and third band gap are wider than the second band gap. Each of the source and drain region is self-aligned to the gate region and includes a semiconductor material having a doped region and a fourth band gap wider than the second band gap.
    Type: Application
    Filed: May 8, 2009
    Publication date: November 19, 2009
    Applicants: Interuniversitair Microelektronica Centrum vzw (IMEC), Katholieke Universiteit Leuven
    Inventors: Geert Hellings, Geert Eneman, Marc Meuris