Abstract: An instrument housing comprises an upper housing portion and a lower housing portion together enclosing instrumentation circuitry. An outer surface of one of the lower housing portion is formed, circumferentially, with a series of gasket locking elements. A gasket injection molded on the series of dovetail-shaped gasket locking elements forms a seal between the upper and lower housing portions. Mechanical locking between the gasket and dovetail-shaped elements retains the gaskeet in place between the housing portions so that the gasket tends not to dislodge from the instrument even if it is dropped.

Abstract: A coherent direct digital waveform synthesizer, capable of generating a waveform in response to a decimally or other non-binary related reference frequency while obtaining the advantages of the use of a binary radix phase accumulator generating binary addresses for a waveform memory. The interface between these elements include a frequency converter including a voltage controlled oscillator and a further binary radix phase accumulator in the feedback path of a phase locked loop. A binary radix related digital waveform synthesizer may be thus made to produce non-binary related frequency waveforms coherent with a non-binary radix reference frequency source, and of decimal or other non-binary radix related resolution.

Abstract: A modular electronic instrument system having automated calibration capability comprises a system controller and a plurality of calibration instruments for calibrating a target instrument. The instruments, if remotely controllable, may be interconnected by a common interface bus. The calibration instruments have associated therewith a characteristics file including resource capability information, and an instrument to be calibrated has associated therewith a characteristics file including calibration information. The system controller automatically derives calibration requirements from the calibration information and matches the requirements with resource capabilities of the calibration instruments. All of the characteristics files may be provided in a standardized format so that a system may be configured without regard to instrument-specific model numbers or manufacturers.

Abstract: A bipolar analog voltage is converted into a digital signal by sensing the polarity of the voltage and selectively supplying a bias voltage to an analog-to-digital converter, which can preferably be a charge balanced voltage to frequency converter, as a function of the sensed polarity. The voltage to frequency converter has a double valued variable frequency output with a discontinuity at zero volt such that the converter derives a maximum output frequency for a maximum positive voltage and also for a negative value slightly displaced from zero; the voltage to the frequency converter minimum output frequency is derived from positive voltages slightly greater than zero and for maximum negative voltages. The converter output frequency and the sensed polarity are supplied to a frequency to digital converter which derives an output signal having a bit representing the polarity of the analog voltage and additional bits indicative of the magnitude of the analog voltage.

Abstract: A flexible stand permits an instrument housing or holster to which it is attached to be supported on a horizontal surface at any of a number of different viewing angles, to be hooked to a pipe or conduit, or to be suspended from a nail or the like. The stand comprises a skeletal member that is formed of a pair of annealed cartridge brass wires separated from each other and maintained parallel by a pair of plastic bridge members. The skeletal member is coated with thermoplastic polyester material, to form an assembly that is flexible, is non-brittle and exhibits substantially no mechanical memory so that it retains the shape to which the stand is manually formed by the user. One end of the stand is pivotally attached to the meter housing or holster, and an abutment member on the stand contacts a portion of the housing or holster to prevent further pivoting when the stand is pivoted to a particular angle.

Abstract: A frequency response stabilized amplitude modulation circuit includes a variable gain amplitude modulator producing an output signal having an amplitude proportional to a product of amplitudes of input carrier, modulating and gain control signals. An envelope detector generates a signal having an amplitude responsive to the modulation envelope of the output signal. A first difference amplifier produces the modulating signal input to the amplitude modulator in proportion to a difference between amplitudes of the envelope detection signal and an audio input signal. The modulating signal incorporates negative feedback to ensure the envelope amplitude of the modulated output signal tracks the audio input. A second difference amplifier provides the gain control signal input for the amplitude modulator in accordance with a difference between amplitudes of the modulating signal, scaled by a constant factor, and the envelope detection signal.

Abstract: Calibrating errors of a variable gain amplifier used in an AC calibrator or a meter for measuring AC are determined for a gamut of frequencies. The gain of the variable gain amplifier is varied by adjusting the value of a variable resistor in discrete steps. A variable amplitude signal is applied to the amplifier while the resistor is adjusted in discrete steps so the amplifier derives a gamut of variable amplitude signals that are supposed to have predetermined values. The amplitudes of the gamut of variable amplitude signals derived by the amplifier are detected and compared with the values that the signals are supposed to have to derive a calibrating error signal of the amplifier for each variable resistor value. A gamut of variable frequency, constant amplitude signals is applied to the amplifier while the amplifier gain is constant. The amplifier has a tendency to derive an AC output signal having a different amplitude in response to different ones of the frequencies.

Abstract: Apparatus for aligning a raster scanned display uses a microprocessor to control timing for horizontal and vertical synchronizing signals. An additional delay device may be provided to improve alignment resolution. When the aligning apparatus is used with a touch panel, an alignment screen is displayed, including aligning touchkeys. By depressing the touch panel at the displayed touchkeys, a user provides image position information to the microprocessor. The microprocessor corrects image alignment to the touch panel by varying timing interval counts stored in registers of a video controller for front and back porch intervals of horizontal and vertical signals. Where resolution is to be improved, delay parameter settings are provided to the additional delay device. Alternatively, the counts in the registers may be fixed and alignment may be controlled completely by the delay.

Abstract: This invention relates to a proces of manufacturing and adjusting a compound resistor. The compound resistor is formed of a resistive material forming a predominant portion of the resistance and having a small negative temperature coefficient of resistance coupled with an adjustment material having an extremely low resistance and a very high positive temperature coefficient of resistance. After forming the resistive and adjustment portions, a portion of the adjustment material is removed to adjust the composite TCR of the compound resistor substantially to zero without significantly affecting resistance.

Abstract: There is provided according to the invention a method and apparatus for eliminating or minimizing the error due to amplifier offset or drift error in an integrating dual slope analog-to-digital converter. The converter is provided with a switching and control arrangement whereby the integrating capacitor is charged for one-half of the predetermined charging time as a function of the sum of the levels of the unknown signal and the error signal. The integrating capacitor is charged for the remaining half of the predetermined time period as a function of the difference of the levels of the unknown signal and the error signal so that the capacitor reaches a level of charge which is a function of the level of the unknown signal substantially unaffected by the level of the error signal.

Abstract: A digital keypad input device comprises a controller for driving a plurality of I/O signal lines selectively in input, output, and high impedance states. Each line operated in the output state presents an output logic signal that is detected, via a corresponding switch when closed, by another I/O line operated in the input state. Other lines are operated in the high impedance state. The method of the invention enables the number of manual switches to exceed the number of I/O lines.

Abstract: A high resolution analog to digital (A/D) converter amplifies and filters a magnitude difference between a pulse width modulated offset voltage and an input voltage to produce an amplified filtered difference voltage, the duty cycle of offset voltage modulation being adjusted such that the magnitude of the difference voltage is within a narrow input voltage range of a recirculating remainder A/D converter. The amplified, filtered difference voltage is converted to representative digital data by the recirculating remainder A/D converter. A microprocessor, which controls the offset voltage, combines the result with the magnitude of the offset voltage to produce a comparatively high resolution digital representation of the input voltage.

Abstract: A resistive network formed on a substrate includes film resistors formed of resistive elements, each element having a plurality of portions symmetrically disposed relative to two axes of symmetry. The biaxially symmetric arrangement provides uniform resistance characteristics for the various film resistors, thus improving stability of resistance ratios among resistors of the network. TCR tracking for the film resistors, i.e., the TCR of a ratio of the resistors, is similarly improved. Where the elements of different resistors of the network are interleaved, the temperature of the different resistors is also made more uniform.

Abstract: A flat panel visual display system having orthogonally disposed display electrodes which are provided by display command signals from a computer to cause activation of portions of the display is provided with additional electrodes. The additional electrodes are orthogonally disposed in a plane parallel to the display electrodes and are interconnected so that an operator touching the additional electrodes will shunt at least a portion of the display command signals to ground or back to the computer. The computer is provided with sensor circuitry for sensing the shunting and providing an indication of the location of the simultaneous occurrence of the display command signals and the operator's touch.

Abstract: A digital phase/frequency detector circuit in a phase locked loop comprises a logic gate interconnected with a pair of bistable devices clocked respectively by input and reference digital signals to generate a square wave having a duty ratio corresponding to the phase/frequency difference between the two signals. The duty ratio of the square wave sweeps repetitively between minimum and maximum values as the phase/frequency difference changes monotonically. The square wave is integrated to obtain a repetitive sawtooth. To increase the range, circuitry is provided to provide a constant level signal when the peak of a sawtooth is approached and to reset the bistable devices to provide a multiple of the earlier range.

Abstract: A digital phase/frequency detector circuit in a phase locked loop comprises multiple bistable devices which are clocked up and down respectively by input and references digital signals to generate square waves. The duty ratio corresponds to the phase/frequency difference and sweeps repetitively between minimum and maximum values as the phase/frequency difference changes monotonically. The square waves are combined logically and additively in the output. The output is integrated to obtain an ever increasing output over many cycles of the phase/frequency difference until the maximum is reached depending on the number of bistable devices which are used. Added circuitry is used to avoid coincidence problems in the clocking input and reference digital signals, to minimize resultant irregularities, and hold the bistable devices at maximum or minimum, as appropriate, until the direction of phase/frequency difference reverses.

Abstract: A semiconductor memory such as a read only memory (ROM) is tested and faults are diagnosed and identified by examining data stored therein for patterns that could not exist if the memory is faulty, proving the memory to be functional by counterexample. Diagnosis is carried out using probabilistic algorithms that terminate quickly if the memory is not faulty, with any pathological contents of the memory masked to minimize the likelihood of misdiagnosis. Faults diagnosed in accordance with the invention include stuck or tied data or address lines.

Abstract: A method of and system of high-speed, high-accuracy functional testing of memories in microprocessor-based units or boards under test includes a test system that is effectively permanently coupled to the unit under test bus structure during test execution and operates at the unit under test's clock rate. The test program may be stored in the unit under test's own memory, or may be electrically transferred from the test system's memory to the memory under test using a memory overlay technique.Memory testing speed may be further incresed by taking advantage of block move and compare features of newer microprocessors. An algorithm which exploits the block move and compare features is provided.