Abstract: An image test system includes a test assembly and an image capture card. The test assembly is provided for obtaining a test signal from a test object, and includes an interface conversion circuit for converting signal transmission form of the test signal. The image capture card is provided for obtaining the test signal from the test assembly, and obtaining an image data from the test signal. The image test system further includes a test signal clock generation circuit for obtaining a test signal clock from the test signal, or the image capture card further includes a pair of clock input pins for obtaining the test signal clock directly from the test object.

Abstract: A semiconductor component burn-in test module includes a burn-in board and an external power transmission component. The burn-in board includes a plurality of burn-in seats, wherein a plurality of chips are disposed on the burn-in seats. The external power transmission component is arranged at opposite two sides of the burn-in board, where the external power transmission component includes a plurality of conductive members and a plurality of terminal seats. The burn-in board is provided with a plurality of wirings corresponding to the external power transmission component. As such, electric power can be conveyed to the plural burn-in seats of the burn-in board, through the plural terminal seats and the plural conductive strips. This decreases the length and the number of copper foil wirings in the burn-in boards for power transmission, so as to lower the cost of the burn-in boards.

Abstract: An image test system includes a test assembly and an image capture card. The test assembly is provided for capturing test signals from test objects, and incudes a first transmission interface, a second transmission interface, and an interface conversion circuit. The interface conversion circuit is connected with the first transmission interface, and converts signal transmission forms of the test signals. The second transmission interface is connected with the interface conversion circuit. Besides, the image capture card is provided for connecting with the second transmission interface, and captures image data from the test signals.

Abstract: A titration module of biochip includes a base, a plurality of titration units, a plurality of pipelines, a transfer unit, and a control unit. The plural titration units and the plural pipelines are arranged above the base, and that the titration units each is provided, at its lower end, a needle element and a reservoir which are communicated with each other. The transfer unit is arranged on the base, and includes at least one driving device for driving, selectively, the plural titration units and the plural pipelines in a lateral direction (leftward and rightward), a longitudinal direction (frontward and rearward) and a vertical direction (upward and downward), respectively. The control unit is electrically connected with the transfer unit, and controls the same for switching, selectively, the plural titration units and the plural pipelines.

Abstract: A comparison device for comparing test pattern files of a wafer tester includes a storage unit and a processing unit. The comparison device stores a first to-be-compared file and a second to-be-compared file into the storage unit. The processing unit reads the first to-be-compared file and the second to-be-compared file from the storage unit to process and executes comparison operation, so as to generate a comparison result. The comparison operation compares the words in a first section of the first to-be-compared file with the words in a second section of the second to-be-compared file in a one-to-one manner, wherein, if the first section ending point is not the end of the first to-be-compared file or the second section ending point is not the end of the second to-be-compared file, the processing unit resets the first section and the second section, and executes comparison operation again.

Abstract: A built-in self-test structure for a pressure tester and a method thereof are provided. The built-in self-test structure includes a substrate, a plurality of membrane layers, a fixing portion, an electrical heating unit and a sensing circuit unit. The membrane layers are formed on the substrate. The fixing portion is configured on the membrane layers and includes a notch. The notch and the membrane layers define a cavity. The electrical heating unit is configured on one membrane layer, and the sensing circuit unit is configured on another membrane layer. The electrical heating unit heats up to increase the pressure in the cavity according to an input voltage, so that the membrane layers have a small deformation. The sensing circuit unit outputs a test signal according to the small deformation.

Abstract: A method for determining disposition of via hole on printed circuit board (PCB) includes the steps of: providing a PCB on which is disposed with a geometric layout and a via hole; providing a line on the PCB for intersecting the geometric layout to form a plurality of points of intersection; defining line segments by segmenting the line at each of the points of intersection to form a plurality of line segments; deleting some of the line segments having one end not being point of intersection for the geometric layout to form a plurality of segmented regions; searching a closed region by repeatedly searching region from any one of the points in the plurality of segmented regions; determining whether a closed region is a smallest closed region; determining whether a via hole is located within the smallest closed region.

Abstract: A built-in self-test structure for a pressure tester and a method thereof are provided. The built-in self-test structure includes a substrate, a plurality of membrane layers, a fixing portion, an electrical heating unit and a sensing circuit unit. The membrane layers are formed on the substrate. The fixing portion is configured on the membrane layers and includes a notch. The notch and the membrane layers define a cavity. The electrical heating unit is configured on one membrane layer, and the sensing circuit unit is configured on another membrane layer. The electrical heating unit heats up to increase the pressure in the cavity according to an input voltage, so that the membrane layers have a small deformation. The sensing circuit unit outputs a test signal according to the small deformation.

Abstract: A semiconductor test system with self-inspection of an electrical channel is disclosed, which includes a tester head, a plurality of parameter detection units and a self-inspection controller. The tester head includes a plurality of pin electronics cards inserted therein, in which the plurality of pin electronics cards contain a plurality of power channels, a plurality of I/O channels and a plurality of drive channels. The self-inspection controller outputs different inspection signals respectively to each power channel, each I/O channel and each drive channel. Then, the plurality of parameter detection units detect response signals respectively produced by each power channel, each I/O channel and each drive channel in response to the inspection signals respectively received thereby, and the response signals are judged by the self-inspection controller.

Abstract: A semiconductor element testing system having an air filter includes a testing apparatus, a first hollow frame, a fan assembly, a second hollow frame, and an air filter. The testing apparatus includes a housing having an opening. The first hollow frame is arranged on the housing and includes a flange, a bottom surface, and a side portion, wherein a plurality of hooks are fixedly arranged on the side portion. The fan assembly is fixed on the first hollow frame such that a forced airflow can be supplied toward inside of the housing. The second hollow frame includes an outer side portion fixedly arranged with a plurality of loop fasteners corresponding to the plural hooks. The air filter covers on the opening of the housing. Thereby, floating particles of the testing system can be reduced so as to lower the possibility of contamination for chips.

Abstract: The present invention relates to a hard and wear-resisting probe and manufacturing method thereof, and particularly relates to a hard and wear-resisting probe comprising tungsten steel (WC) and manufacturing method thereof. This hard and wear-resisting probe is substantially made of a tungsten steel with high hardness and wear resistance so that the probe is difficult to be worn and the lifetime of the probe is longer. Furthermore, the frequencies for changing the probe and the cost of testing are reduced, and the testing efficiency can be improved.

Abstract: A ZIF connector and a semiconductor testing device using the ZIF connectors are provided. The ZIF connector comprises a body portion and a clamping portion. The body portion is a print circuit board provided with circuit patterns, and further comprises a plurality of signal holes disposed on an upper part of the body portion for electrically connecting a plurality of corresponding signal cables, and a plurality of electrical terminals disposed on a lower part of the body portion and arranged on two lateral sides of the body portion for electrically connecting a plurality of corresponding electrical pads of a substrate. The circuit patterns are provided in the body portion to connect to the electrical terminals through the signal holes accordingly. The clamping portion is horizontally extended on one lateral side of the body portion for securing the ZIF connector in a connector board.

Abstract: An improved structure of a burn-in oven includes a housing, a loading support, a cooling-fan assembly, and a motor-fan assembly. A circuit-board-space and an exhaust channel are defined inside of the housing, wherein the exhaust channel is provided with a plurality of venting holes such that the circuit-board-space and the exhaust channel are communicated with each other through the venting holes. The loading support is disposed in the circuit-board-space for loading a plurality of circuit boards. The cooling-fan assembly is arranged at one side of the loading support and beside the exhaust channel. The motor-fan assembly is arranged at the exhaust channel. Thereby, a phenomenon of heat accumulation locally at a back panel side of the oven can be improved so as to enhance cooling effect of the oven, let alone the number of fans installed on the oven can be decreased.

Abstract: A comparison device for comparing test pattern files of a wafer tester includes a storage unit and a processing unit. The comparison device stores a first to-be-compared file and a second to-be-compared file into the storage unit. The first to-be-compared file and the second to-be-compared file are text files respectively. The processing unit reads the first to-be-compared file and the second to-be-compared file from the storage unit to process and executes comparison operation, so as to generate a comparison result. The comparison operation is to compare the words in a first section of the first to-be-compared file with the words in a second section of the second to-be-compared file in a one-to-one manner.

Abstract: A method and apparatus for improving yield ratio of testing are disclosed. The method includes the following steps. First of all, devices are tested and electromagnetic interference is measured. Next, the test results are examined for whether the devices pass the test or not. Then, electromagnetic interference data are examined for whether the electromagnetic interference data are over a predetermined standard if the devices fail the test. The above-mentioned steps are performed again if the electromagnetic interference data are over a predetermined standard. The test is terminated if the devices still fail the test and the values of electromagnetic interference are still over a predetermined standard.

Abstract: A wafer inspection system for inspecting a wafer comprises a platform, a probe card, a illuminator, a test server, at least one image processing device, a control circuit board, at least a test circuit board, a load board connected to the control circuit board and the at least a test circuit board, at least an image card, and at least a relay board. The probe card includes an opening hole and a plurality of probes for contacting the wafer to transmit and receive electrical signals. The illuminator illuminates on the wafer through the opening hole. The test server is controlled to execute test procedure and data process. The test circuit board transmits test signals and performs a determination on the received result signals. The relay board is connected to the probe card and the load board for switching the direction of data flow.

Abstract: A burn-in oven having an inverter fan and a heat regulator includes a housing, a frame, a heater, a temperature sensor, an inverter fan, and a control unit. The housing includes an air-in port and an air-out port. The frame is fixedly arranged inside the housing, and is divided into a variety of partitions. In addition, the heater and the temperature sensor are also fixedly arranged inside the housing. The inverter fan is provided for supplying a forced air-flow toward inside of the housing. The control unit is electrically connected with the temperature sensor, the heater, and the inverter fan. The control unit is provided for controlling the temperature inside the housing not to exceed a predetermined value. Thereby, the present invention saves energy and shortens effectively the time required for burn-in temperature rising and lowering, and saves working hours and manpower as well.

Abstract: A method for determining disposition of via hole on printed circuit board (PCB), said method comprising the steps of: providing a PCB on which is disposed with a geometric layout and a via hole; providing a line on said PCB for intersecting said geometric layout to form a plurality of points of intersection; defining line segments by segmenting said line at each of said points of intersection to form a plurality of line segments; deleting some of said line segments having one end not being point of intersection for said geometric layout to form a plurality of segmented regions; searching a closed region by repeatedly searching region from any one of the points in said plurality of segmented regions; determining whether a closed region is a smallest closed region; determining whether a via hole is located within said smallest closed region.

Abstract: An RF chip test method is disclosed. The RF chip test method includes disposing an RF chip within a chip socket, with the RF chip having at least one RF pin and at least one non-RF pin, the chip socket having conductive elements, and the conductive elements contacting the RF pin and the non-RF pin; connecting the non-RF pin to a ground end and connecting the RF pin to an RF measuring instrument; measuring a S11 parameter of the RF pin using the RF measuring instrument; and comparing the S11 parameter with an allowable range so as to judge the contact condition between the RF pin and the conductive element.

Abstract: An apparatus for segregating electronic components that engages and stops each of a plurality of electronic packages passing down a singulation tube is disclosed. In addition, the segregating apparatus is cable of segregating the electronic packages even though some of them had been linked together during the sealing process. The segregating apparatus includes a first swing arm to clip a electronic component, a second swing arm to clip another electronic component, and a third swing arm to depart the two electronic components, where all of components of the segregating apparatus are driven by a single driving force, reducing the size of the apparatus and the time needed for the segregating process.