Abstract: Systems and circuits are described for transmitting data over physical channels to provide a fault tolerant, high speed, low latency interface such as between a memory controller and memory devices. Communications signals are communicated over interconnection groups comprised of multiple wires, with the described encoding and decoding permitting continued communication in the presence of a wire failure within an interconnection group. An efficient distributable voltage regulator to provide communications driver power is also disclosed.

Abstract: A phase control circuit comprising a differential current generator having a differential output node configured to provide a differential drive current and a current conversion circuit connected to the differential output node configured to receive the differential drive current through saturated input Field-Effect Transistors (FETs), the saturated input FETs connected to triode mirroring FETs, the triode mirroring FETs configured to generate linearized current drive signals through first and second output drive nodes to drive a phase interpolator circuit.

Abstract: An electromagnetic stirring device of melted metallic materials inside a cooling chamber of a casting machine having a retaining body of induction coils that is a body composed of at least two reciprocally different portions.

Abstract: A stand-alone computer-camera system capable of extracting car-plate information. This is achieved by using an on-board computer in order to analyze the video stream recorded by the camera sensor, and can be used with any type of camera sensor. The system features specific characteristics making it extremely fast and able to catch plates of cars moving at high-speed. The special algorithms incorporated in this system, are specially implemented, in order to be able to be ported on an embedded computer system, which has usually lower capabilities in terms of processing power and memory than a general-purpose computer.

Abstract: Transmission line driver systems are described which are comprised of multiple paralleled driver elements. The paralleled structure allows efficient generation of multiple output signal levels with adjustable output amplitude, optionally including Finite Impulse Response signal shaping and skew pre-compensation.

Abstract: A memory circuit, such as an embedded DRAM array, stores information as groups of bits or data using information coding in storage and retrieval data, instead of each bit being stored separately. Write data words can be mapped to storage format words that are stored and defined by a Hadamard matrix. The storage format word is stored as charge levels in an addressable memory location. For retrieving stored data, charge levels are read from the storage cells and interpreted to a valid storage format word. Hadamard code maximal likelihood decoding can be used to derive a read data word corresponding to a previously written write data word. The write data word is then output as the result of a read of the selected addressable location, or a portion thereof. The mapping can be two or more Hadamard matrix mappings concatenated for each of a plurality of storage format words.

Abstract: The present invention relates to the use of a casein hydrolysate as an antiviral agent for the treatment of opportunistic virus infections, especially herpesvirus and human papillomavirus. This casein hydrolysate has an application in both the therapeutic treatment of established symptoms and the prevention of the infection or the reactivation of a latent infection by an opportunistic virus. The casein hydrolysate of the present invention is effective for the prevention of opportunistic virus infections in individuals with weakened immune system.

Abstract: A communication system particularly for managing voice, video and data services between the station of an operator and the station of a user, the system including at least one device controlled by the operator to receive telephone calls forwarded by a call routing center and at least one unit that is controlled by the user and provided with elements for entering and displaying information and generating telephone calls. The device further includes elements for disabling the audio component of a telephone call generated by the at least one unit and elements for establishing with the unit a video call associated with the telephone call.

Abstract: Methods are described allowing a vector signaling code to encode multi-level data without the significant alphabet size increase known to cause symbol dynamic range compression and thus increased noise susceptibility. By intentionally restricting the number of codewords used, good pin efficiency may be maintained along with improved system signal-to-noise ratio.

Abstract: In the event that a moving body (e.g. a person, a car, etc.) is outfitted with a video camera or with a camera-equipped device (e.g. a tablet or a mobile phone), the system described in one aspect is able to understand the motion of the moving by analyzing the video frame sequence captured by the camera. This means that the system can categorize the motion of the body-carrying camera to one of several types (e.g., is this a person walking? is this a person running? etc.), understand the nature of the moving body holding the camera-equipped device (e.g. Is this a car?, Is this a person? etc.) and even to identify the moving body (which car?, which person? etc.).

Abstract: The invention relates to a mattress (110) made of elastic foam or rubber material and comprising individually controllable air chambers (120, 120a) that are inserted in the transverse direction and are equipped with at least one pressure measurement sensor, the pressure in the air chambers (120, 120a) being adjustable based on an algorithm which is used by a control device and which correlates with sleep quality calculations also made by the control device and/or which follows the principle of the changing pressure sensed. The invention also relates to a corresponding method.

Abstract: Methods and apparatuses are described to determine subsets of vector signaling codes capable of detection by smaller sets of comparators than required to detect the full code. The resulting lower receiver complexity allows systems utilizing such subset codes to be less complex and require less power.

Abstract: An alternative type of vector signaling codes having increased pin-efficiency normal vector signaling codes is described. Receivers for these Permutation Modulation codes of Type II use comparators requiring at most one fixed reference voltage. The resulting systems can allow for a better immunity to ISI-noise than those using conventional multilevel signaling such as PAM-X. These codes are also particularly advantageous for storage and recovery of information in memory, as in a DRAM.

Abstract: Orthogonal differential vector signaling codes are described which support encoded sub-channels allowing transport of distinct but temporally aligned data and clocking signals over the same transport medium. Embodiments providing enhanced LPDDR interfaces are described which are suitable for implementation in both conventional high-speed CMOS and DRAM integrated circuit processes.

Abstract: In a detection circuit, inputs correspond to received indications of vector signaling code words received by a first integrated circuit from a second integrated circuit. With four inputs, the circuit compares a first pair to obtain a first difference result and compares a second pair, disjoint from the first pair, to obtain a second difference result. The first and second difference results are then summed to form an output function. A system might use a plurality of such detection circuits to arrive at an input word. The circuit can include amplification, equalization, and input selection with efficient code word detection. The vector signaling code can be a Hadamard matrix code encoding for three input bits. The circuit might also have frequency-dependent gain, a selection function that directs one of the summation function result or the first difference result to the output function, variable gain, and/or a slicer.

Abstract: Vector signaling code communications systems rely on group transmission of code symbols using multiple signaling channels that must be actively monitored and adjusted to minimize differential signal characteristics. Information obtained during receive detection may be analyzed to identify channel operational characteristics during normal operation and perform non-disruptive channel adjustments. Initialization or start-up adjustment may also be performed using intentionally transmitted patterns.

Abstract: Multi-drop communications channels can have significantly deep notches in their frequency response causing a corresponding limitation of the effective data transmission rate. A special time-ordered coding method is described which results in the emitted spectrum of the data stream transmitted into the channel having a notch at the same frequency as the notch in the channel frequency response, permitting channel receivers to successfully decode the transmitted data stream. The described coding method may be applied at various multiples of the channel notch frequency to support different throughput rates, and may be combined with other coding techniques such as group or vector signaling codes.

Abstract: Properties and the construction method of Orthogonal Differential Vector Signaling Codes are disclosed which are tolerant of order-reversal, as may occur when physical routing of communications channel wires causes the bus signal order to be reversed. Operation using the described codes with such bus-reversed signals can avoid complete logical or physical re-ordering of received signals or other significant duplication of receiver resources.

Abstract: A storage device stores data in groups of memory cells using vectors corresponding to voltage code codewords, each codeword having k entries. Entries have values selected from a set of at least three entry values and 2n distinct inputs can be encoded into k-entry codewords for some n>k. A vector storage element comprising k cells can store an k electrical quantities (voltage, current, etc.) corresponding to a codeword. The voltage code is such that, for at least one position of a vector, there are at least three vectors having distinct entry values at that position and, for at least a subset of the possible codewords, the sum of the entry values over the positions of each vector is constant from vector to vector in that subset. The storage device might be an integrated circuit device, a discrete memory device, or a device having embedded memory.

Abstract: Circuits providing low noise amplification with continuous time linear equalization are described. An exemplary circuit includes four amplification elements, such as MOS transistors. The amplification elements are arranged in differential pairs, and the differential pairs are cross-coupled with a frequency-dependent coupling, such as a capacitive coupling, to enhance high-frequency gain. The outputs of the amplification elements are combined to provide an output representing inverted and un-inverted sums of differences in the input signals.