Patents Assigned to Lab, S.A.
  • High speed communications system
    Patent number: 10116472
    Abstract: Transmission of baseband and carrier-modulated vector codewords, using a plurality of encoders, each encoder configured to receive information bits and to generate a set of baseband-encoded symbols representing a vector codeword; one or more modulation circuits, each modulation circuit configured to operate on a corresponding set of baseband-encoded symbols, and using a respective unique carrier frequency, to generate a set of carrier-modulated encoded symbols; and, a summation circuit configured to generate a set of wire-specific outputs, each wire-specific output representing a sum of respective symbols of the carrier-modulated encoded symbols and at least one set of baseband-encoded symbols.
    Type: Grant
    Filed: November 27, 2017
    Date of Patent: October 30, 2018
    Assignee: KANDOU LABS, S.A.
    Inventors: Ali Hormati, Armin Tajalli, Amin Shokrollahi
  • MATERIAL, USE THEREOF AND METHOD TO MANUFACTURE SAID MATERIAL
    Publication number: 20180282220
    Abstract: Material, use thereof and method to manufacture said material; wherein the material is porous and has: a total porosity ranging from 50% to 80%, in particular from 60% to 70%; interconnected pores; at least a part made of a hydrophilic material, in particular at least a part of the inner surfaces of the pores is made of a hydrophilic material; a permeability coefficient (k) greater than 10˜6 m/sec; and wherein, in a given volume of the material (1), the total volume of pores with a diameter ranging from 0.1??? to approximately 0.3 nm is at least greater than 15% of the total volume of the pores, preferably it ranges from 15 to 36%.
    Type: Application
    Filed: September 9, 2016
    Publication date: October 4, 2018
    Applicant: SIGNA LABS S.R.L.
    Inventor: Patrizio Signanini
  • Multilevel driver for high speed chip-to-chip communications
    Patent number: 10091033
    Abstract: Transmission line driver systems are described which are comprised of multiple paralleled driver elements. The paralleled structure allows efficient generation of multiple output signal levels with adjustable output amplitude, optionally including Finite Impulse Response signal shaping and skew pre-compensation.
    Type: Grant
    Filed: March 12, 2018
    Date of Patent: October 2, 2018
    Assignee: KANDOU LABS, S.A.
    Inventor: Roger Ulrich
  • Methods and systems for high bandwidth communications interface
    Patent number: 10091035
    Abstract: Systems and methods are described for transmitting data over physical channels to provide a high bandwidth, low latency interface between a transmitting device and a receiving device operating at high speed with low power utilization. Communication is performed using group signaling over sets of four wires using a vector signaling code, where each wire of a set carries a low-swing signal that may take on one of four signal values. Topologies and designs of wire sets are disclosed with preferred characteristics for group signaling communications.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: October 2, 2018
    Assignee: KANDOU LABS, S.A.
    Inventors: John Fox, Brian Holden, Ali Hormati, Peter Hunt, John D. Keay, Amin Shokrollahi, Richard Simpson, Anant Singh, Andrew Kevin John Stewart, Giuseppe Surace, Roger Ulrich
  • Apparatus and procedure for the immission of electric energy
    Patent number: 10069305
    Abstract: An apparatus and a procedure for the immission of electric energy supplied by a device supplying electric energy in a preexisting electric circuit, connected to a source of electric energy, in which one or more electric users may be connected to the electric circuit. The apparatus includes an adjusting device that makes the electric circuit autonomous so as to avoid that the source of electric energy has to supply electric energy to the same electric circuit.
    Type: Grant
    Filed: April 24, 2014
    Date of Patent: September 4, 2018
    Assignee: FUTURE LABS S.R.L.
    Inventors: Dario Tagliaro, Francesco Ulian
  • High performance phase locked loop
    Patent number: 10057049
    Abstract: Methods and systems are described for receiving N phases of a local clock signal and M phases of a reference signal, wherein M is an integer greater than or equal to 1 and N is an integer greater than or equal to 2, generating a plurality of partial phase error signals, each partial phase error signal formed at least in part by comparing (i) a respective phase of the M phases of the reference signal to (ii) a respective phase of the N phases of the local clock signal, and generating a composite phase error signal by summing the plurality of partial phase error signals, and responsively adjusting a fixed phase of a local oscillator using the composite phase error signal.
    Type: Grant
    Filed: April 21, 2017
    Date of Patent: August 21, 2018
    Assignee: KANDOU LABS, S.A.
    Inventor: Armin Tajalli
  • Low power multilevel driver
    Patent number: 10056903
    Abstract: A driver for transmitting multi-level signals on a multi-wire bus is described that includes at least one current source connected to a transmission line, each current source selectively enabled to source current to the transmission line to drive a line voltage above a termination voltage of a termination voltage source connected to the transmission line via a termination impedance element, wherein each of the at least one current sources has an output impedance different than a characteristic impedance of the transmission line, and at least one current sink connected to the transmission line, each current sink selectively enabled to sink current from the transmission line to drive a line voltage below the termination voltage, each of the at least one current sinks having an output impedance different than the characteristic impedance of the transmission line.
    Type: Grant
    Filed: April 28, 2017
    Date of Patent: August 21, 2018
    Assignee: KANDOU LABS, S.A.
    Inventors: Omid Talebi Amiri, Richard Simpson
  • Orthogonal differential vector signaling codes with embedded clock
    Patent number: 10055372
    Abstract: Orthogonal differential vector signaling codes are described which support encoded sub-channels allowing transport of distinct data and clocking signals over the same transport medium. Embodiments are described which are suitable for implementation in both conventional high-speed CMOS and DRAM integrated circuit processes.
    Type: Grant
    Filed: November 25, 2015
    Date of Patent: August 21, 2018
    Assignee: KANDOU LABS, S.A.
    Inventor: Amin Shokrollahi
  • Methods and systems for skew tolerance in and advanced detectors for vector signaling codes for chip-to-chip communication
    Patent number: 10044452
    Abstract: Advanced detectors for vector signaling codes are disclosed which utilize multi-input comparators, generalized on-level slicing, reference generation based on maximum swing, and reference generation based on recent values. Vector signaling codes communicate information as groups of symbols which, when transmitted over multiple communications channels, may be received as mixed sets of symbols from different transmission groups due to propagation time variations between channels. Systems and methods are disclosed which compensate receivers and transmitters for these effects and/or utilize codes having increased immunity to such variations, and circuits are described that efficiently implement their component functions.
    Type: Grant
    Filed: November 17, 2017
    Date of Patent: August 7, 2018
    Assignee: KANDOU LABS, S.A.
    Inventors: Brian Holden, Amin Shokrollahi, Anant Singh
  • Vector signaling codes with high pin-efficiency for chip-to-chip communication and storage
    Patent number: 10020966
    Abstract: An alternative type of vector signaling codes having increased pin-efficiency normal vector signaling codes is described. Receivers for these Permutation Modulation codes of Type II use comparators requiring at most one fixed reference voltage. The resulting systems can allow for a better immunity to ISI-noise than those using conventional multilevel signaling such as PAM-X. These codes are also particularly advantageous for storage and recovery of information in memory, as in a DRAM.
    Type: Grant
    Filed: December 23, 2016
    Date of Patent: July 10, 2018
    Assignee: KANDOU LABS, S.A.
    Inventor: Amin Shokrollahi
  • Sampler with low input kickback
    Patent number: 10003454
    Abstract: Methods and systems are described for receiving a signal to be sampled and responsively generating, at a pair of common nodes, a differential current representative of the received signal, receiving a plurality of sampling interval signals, each sampling interval signal received at a corresponding sampling phase of a plurality of sampling phases, for each sampling phase, pre-charging a corresponding pair of output nodes using a pre-charging FET pair receiving the sampling interval signal, forming a differential output voltage by discharging the corresponding pair of output nodes via a discharging FET pair connected to the pair of common nodes, the FET pair receiving the sampling interval signal and selectively enabling the differential current to discharge the corresponding pair of output nodes, and latching the differential output voltage.
    Type: Grant
    Filed: April 21, 2017
    Date of Patent: June 19, 2018
    Assignee: KANDOU LABS, S.A.
    Inventor: Armin Tajalli
  • Bus reversible orthogonal differential vector signaling codes
    Patent number: 10003424
    Abstract: Properties and the construction method of Orthogonal Differential Vector Signaling Codes are disclosed which are tolerant of order-reversal, as may occur when physical routing of communications channel wires causes the bus signal order to be reversed. Operation using the described codes with such bus-reversed signals can avoid complete logical or physical reordering of received signals or other significant duplication of receiver resources.
    Type: Grant
    Filed: August 30, 2016
    Date of Patent: June 19, 2018
    Assignee: KANDOU LABS, S.A.
    Inventors: Roger Ulrich, Amin Shokrollahi
  • Voltage sampler driver with enhanced high-frequency gain
    Patent number: 10003315
    Abstract: Methods and systems are described for receiving, at an input differential branch pair, a set of input signals, and responsively generating a first differential current, receiving, at an input of an offset voltage branch pair, an offset voltage control signal, and responsively generating a second differential current, supplementing a high-frequency component of the second differential current by injecting a high-pass filtered version of the set of input signals into the input of the offset voltage branch pair using a high-pass filter, and generating an output differential current based on the first and second differential currents using an amplifier stage connected to the input differential branch pair and the offset voltage branch pair.
    Type: Grant
    Filed: January 25, 2017
    Date of Patent: June 19, 2018
    Assignee: KANDOU LABS S.A.
    Inventor: Armin Tajalli
  • Data-driven voltage regulator
    Patent number: 9985634
    Abstract: An efficient regulated power supply for a communications interface is disclosed using a data-dependent charge pump design. Data patterns known to produce increased power supply load concurrently raise power supply source current, leading to significant overall power savings for the combined communications driver and regulator over known switched and linear regulator solutions.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: May 29, 2018
    Assignee: KANDOU LABS, S.A.
    Inventor: Roger Ulrich
  • Vector signaling with reduced receiver complexity
    Patent number: 9985745
    Abstract: Methods and apparatuses are described to determine subsets of vector signaling codes capable of detection by smaller sets of comparators than required to detect the full code. The resulting lower receiver complexity allows systems utilizing such subset codes to be less complex and require less power.
    Type: Grant
    Filed: June 27, 2017
    Date of Patent: May 29, 2018
    Assignee: KANDOU LABS, S.A.
    Inventor: Amin Shokrollahi
  • Multilevel driver for high speed chip-to-chip communications
    Patent number: 9917711
    Abstract: Transmission line driver systems are described which are comprised of multiple paralleled driver elements. The paralleled structure allows efficient generation of multiple output signal levels with adjustable output amplitude, optionally including Finite Impulse Response signal shaping and skew pre-compensation.
    Type: Grant
    Filed: January 9, 2017
    Date of Patent: March 13, 2018
    Assignee: KANDOU LABS, S.A.
    Inventor: Roger Ulrich
  • Lock detector for phase lock loop
    Patent number: 9906358
    Abstract: Methods and systems are described for generating, using a voltage-controlled oscillator (VCO), a plurality of phases of a local clock signal, generating a phase-error signal using a phase comparator receive a phase of the local clock signal and a reference clock signal, and configured to output the phase-error signal, generating a frequency-lock assist (FLA) signal using a FLA circuit receiving one or more phases of the local clock signal and the reference clock signal, the FLA signal indicative of a magnitude of a frequency error between the reference clock signal and the local clock signal, and generating a VCO control signal using an error accumulator circuit receiving the phase-error signal and the FLA signal, and responsively providing the VCO control signal to the VCO to lock the local clock signal to the reference clock signal.
    Type: Grant
    Filed: August 31, 2016
    Date of Patent: February 27, 2018
    Assignee: KANDOU LABS, S.A.
    Inventor: Armin Tajalli
  • Vector signaling codes with increased signal to noise characteristics
    Patent number: 9900186
    Abstract: Vector signaling codes are synergistically combined with multi-level signaling, the increased alphabet size provided by the multi-level signaling enabling a larger codeword space for a given number of symbols, at the cost of reduced receiver detection margin for each of the multiple signal levels. Vector signaling code construction methods are disclosed in which code construction and selection of multi-level signal levels are coordinated with the design of an associated receive comparator network, wherein modified signal levels encoded and emitted by the transmitter result in increased detection margin at the receive comparators.
    Type: Grant
    Filed: July 10, 2015
    Date of Patent: February 20, 2018
    Assignee: KANDOU LABS, S.A.
    Inventors: Amin Shokrollahi, Roger Ulrich
  • Multidrop data transfer
    Patent number: 9893911
    Abstract: Multi-drop communications channels can have significantly deep notches in their frequency response causing a corresponding limitation of the effective data transmission rate. A special time-ordered coding method is described which results in the emitted spectrum of the data stream transmitted into the channel having a notch at the same frequency as the notch in the channel frequency response, permitting channel receivers to successfully decode the transmitted data stream. The described coding method may be applied at various multiples of the channel notch frequency to support different throughput rates, and may be combined with other coding techniques such as group or vector signaling codes.
    Type: Grant
    Filed: September 13, 2016
    Date of Patent: February 13, 2018
    Assignee: KANDOU LABS, S.A.
    Inventors: Ali Hormati, Amin Shokrollahi
  • System for generating a test pattern to detect and isolate stuck faults for an interface using transition coding
    Patent number: 9852806
    Abstract: Conventional methods using signal test patterns to identify wiring errors are difficult to apply to interfaces encoding information as signal state transitions rather than directly as signal states. A system utilizing excitation of wires with selected transition coded patterns and evaluation of received results is described to identify failed wire connections. This approach may be advantageously used to provide fault detection and redundant path selection in systems incorporating stacked chip interconnections using Through Silicon Vias.
    Type: Grant
    Filed: June 22, 2015
    Date of Patent: December 26, 2017
    Assignee: KANDOU LABS, S.A.
    Inventors: David R. Stauffer, Andrew Kevin John Stewart, John D. Keay