Abstract: Systems and methods are described for transmitting data over physical channels to provide a high speed, low latency interface such as between a memory controller and memory devices. Controller-side and memory-side embodiments of such channel interfaces are disclosed which require a low pin count and have low power utilization. In some embodiments of the invention, different voltage, current, etc. levels are used for signaling and more than two levels may be used, such as a vector signaling code wherein each wire signal may take on one of four signal values.

Abstract: Methods and apparatuses are described to determine subsets of vector signaling codes capable of detection by smaller sets of comparators than required to detect the full code. The resulting lower receiver complexity allows systems utilizing such subset codes to be less complex and require less power.

Abstract: A device for sliding door leaves with co-planar closure, particularly for furniture, includes a bracket system for connection with each one of the door leaves. A first pair of wheels is associated with the bracket system in a downward region. The device includes elements adapted to force the closure arrangement of at least one of the door leaves.

Abstract: Circuits providing low noise amplification with continuous time linear equalization are described. An exemplary circuit includes four amplification elements, such as MOS transistors. The amplification elements are arranged in differential pairs, and the differential pairs are cross-coupled with a frequency-dependent coupling, such as a capacitive coupling, to enhance high-frequency gain. The outputs of the amplification elements are combined to provide an output representing inverted and un-inverted sums of differences in the input signals.

Abstract: Systems and methods are described for transmitting data over physical channels to provide a high speed, low latency interface such as between a memory controller and memory devices with significantly reduced or eliminated Simultaneous Switching Output noise. Controller-side and memory-side embodiments of such channel interfaces are disclosed which do not require additional pin count or data transfer cycles, have low power utilization, and introduce minimal additional latency. In some embodiments of the invention, three or more voltage levels are used for signaling.

Abstract: Continuous-time linear equalization of received signals on multiple wire channels while maintaining accurate common mode signal values. Multiwire group signaling using vector signaling codes simultaneously transmits encoded values on multiple wires, requiring multiple receive signals to be sampled simultaneously to retrieve the full transmitted code word. By misaligning transitions on multiple wires, skew introduces a transient common mode signal component that is preserved by using frequency-selective common mode feedback at the receiver to obtain accurate sampling results.

Abstract: Systems and methods are described for transmitting data over physical channels to provide a high bandwidth, low latency interface between integrated circuit chips with low power utilization. Communication is performed using group signaling over multiple wires using a vector signaling code, where each wire carries a low-swing signal that may take on more than two signal values.

Abstract: A sorting decoder captures the rank-order of a set of input analog signals in the digital domain using simple logic components such as self-timed first state elements, without requiring conventional analog-to-digital signal converters. The analog signals are each compared against a monotonic dynamic reference and the resulting comparisons are snapshot by a self-timed first state element for each input signal, or the last member of a sorted collection of input signals, at the time when it reaches the reference signal, so that a different snapshot representing the signal value ranking relative to the other signal values is produced for each input signal. The resulting rank-order estimation snapshots are binary signals that can then be further processed by a simple sorting logic circuit based on elementary logic components.

Abstract: An efficient communications apparatus is described for a vector signaling code to transport data and optionally a clocking signal between integrated circuit devices. Methods of designing such apparatus and their associated codes based on a new metric herein called the “ISI Ratio” are described which permit higher communications speed, lower system power consumption, and reduced implementation complexity.

Abstract: Decision Feedback Equalization techniques are difficult to apply in high speed communications systems, as the decoding process for a received symbol may not be completed in time to allow adaptive detection of the following symbol. Advantage may be taken of certain novel aspects of vector signaling codes to provide decision feedback to an adaptive data receiver concurrent with symbol decoding, rather than being delayed to symbol decode completion. Methods and systems are described that error correct an initial non-adaptive decoding, based on differences between the actual received signals and simulated received signals derived from the initial decoding and historical received data. Additional methods and systems are described using bounding functions to estimate an error rate with reduced computation.

Abstract: Methods and systems are described for communication of data over a communications bus at high speed and high pin efficiency, with good resilience to common mode and other noise. Pin efficiencies of 100% may be achieved even for bus widths of four or fewer wires. Information to be transmitted is encoded as words of a vector signaling code, each word comprising multiple values transmitted as a group over the communications bus. Subsets of the vector signaling code have distinct group characteristics, which are discernable on transmission and are used to facilitate decoding on reception.

Abstract: Systems and methods are described for transmitting data over physical channels to provide a high bandwidth, low latency interface between integrated circuit chips with low power utilization. Communication is performed using group signaling over multiple wires using a vector signaling code, where each wire carries a low-swing signal that may take on more than two signal values.

Abstract: Fixed capacitive circuits are described which perform arithmetical summation operations over sets of scaled analog values, where the constant parameters of the summations and scaling multiplications are formed as ratios of circuit element values. The passive nature of the design can enable efficient integrated circuit implementation.

Abstract: Vector signaling code communications systems rely on group transmission of code symbols using multiple signaling channels that may have differing propagation characteristics, resulting in differing received signal levels, waveforms, and symbol arrival times, and thus that should be actively monitored and adjusted to minimize differential signal characteristics. Information obtained during symbol decode may be analyzed to identify channel operational characteristics during normal operation and perform non-disruptive channel adjustments, including per-channel adjustment of sample-and-hold timing to realign code symbol groups. Initialization or start-up adjustment may also be performed using intentionally-transmitted training patterns.

Abstract: A device to be applied at least between a side wall of the internal space of a piece of furniture and an adjacent door thereof, in order to render it laterally retracting during the opening of the internal space, comprising a pivoting upright interposed along the side of the door that is to be rendered laterally retracting of a piece of furniture, and provided with longitudinal guides for the vertical sliding of one of the two ends of a pair of rockers, each rocker being able to oscillate on a respective pivot, which is integrally pivoted to the same shoulder of a compartment, and is formed by a pair of arms which converge and are mutually integral.

Abstract: A stand-alone computer-camera system capable of extracting car-plate information. This is achieved by using an on-board computer in order to analyze the video stream recorded by the camera sensor, and can be used with any type of camera sensor. The system features specific characteristics making it extremely fast and able to catch plates of cars moving at high-speed. The special algorithms incorporated in this system, are specially implemented, in order to be able to be ported on an embedded computer system, which has usually lower capabilities in terms of processing power and memory than a general-purpose computer.

Abstract: A system for remotizing a user service is provided. The system includes elements of audiovisual communication between a station of a user and a video assistance station belonging to an operator that is selected automatically—at the time of the service request by the user—from a plurality of operators. The elements are adapted to enable the acquisition of personal information of the user by the selected operator. A scanning device acquires an identification document of the user. A control system is configured to enable the user to use the service following the activation performed by the operator.

Abstract: Digital information is communicated between stacked integrated circuit devices by inductive coupling between arrays of inductors formed from integrated circuit wiring layers. This can be done using a combination of push-pull drivers, common inductor return legs, and balanced sparse ternary encoding. Embodiments result in low power utilization and high pin efficiency.

Abstract: For digital data transmitted using a vector signaling encoding, a rank-order equalizer cancels various channel noise such as inter-symbol interference. Further, rank-order units may be cascaded to achieve improved equalization over successive sample vector signals in a rank-order equalizer. Multiple rank-order equalizers further operate in parallel in a feed forward mode or in series in a feedback mode to provide a continuous vector signaling stream equalization.

Abstract: The present invention relates to a system and method for measuring a wavelength-resolved state of polarization, for calculating differential group delay of an optical signal under analysis (1) by means of taking multiple measurements of the spectrum of the signal under analysis (1) with spectral filtering means (3) with an optical output the power of which depends on the polarization of the input. The polarization at the input of the spectral filtering means (3) is modified by means of a polarization transformer (2) which sequentially selects a plurality of output states of polarization. The spectral filtering means (3) can comprise a filter based on stimulated Brillouin scattering amplification (10) simultaneously combining wavelength discrimination and polarization discrimination.