Patents Assigned to Lapis Semiconductor Co., Ltd.
  • Publication number: 20220114982
    Abstract: A display device and data driver are provided. The display device includes a plurality of data drivers provided for a predetermined number of data lines in a plurality of data lines. The plurality of data drivers receive the serialized video data signal from the display controller, generate a modulated data timing signal whose period changes within the one frame period, and supply a gradation voltage signal to each of the predetermined number of data lines for each of data periods based on a data timing of the modulated data timing signal, each of data periods corresponding to the data timing of the modulated data timing signal.
    Type: Application
    Filed: December 22, 2021
    Publication date: April 14, 2022
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventors: Hiroshi TSUCHI, Koji Higuchi
  • Publication number: 20220102338
    Abstract: A high-density source region is formed along a surface of a semiconductor substrate and is connected to either one of a power source line and ground line. A low-density source region has an exposed surface at a surface of the semiconductor substrate and is in contact with the high-density source region. A high-density drain region is formed along the surface of the semiconductor substrate and is connected to the other one of the power source line and the ground line. A low-density drain region has an exposed surface at the surface of the semiconductor substrate, is in contact with the high-density drain region, and extends to a deeper region from the surface of the semiconductor substrate than does the low-density source region. A gate electrode is connected to either one of the power source line and the ground line.
    Type: Application
    Filed: September 17, 2021
    Publication date: March 31, 2022
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventors: Masahiko HIGASHI, Marie MOCHIZUKI
  • Publication number: 20220102300
    Abstract: The semiconductor device according to the present invention comprises; a semiconductor element having one surface with a plurality of electrode pads; an electrode structure including a plurality of metal terminals and a sealing resin. The plurality of metal terminals being disposed in a region along a circumference of the one surface. The sealing resin holding the plurality of metal terminals and being disposed on the one surface of the semiconductor element. The electrode structure includes a first surface opposed to the one surface of the semiconductor element, a second surface positioned in an opposite side of the first surface, and a third surface positioned between the first surface and the second surface. Each of the plurality of metal terminals is exposed from the sealing resin in at least a part of the second surface and at least a part of the third surface.
    Type: Application
    Filed: September 28, 2021
    Publication date: March 31, 2022
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventor: Takashi SHIMADA
  • Patent number: 11289744
    Abstract: A battery monitoring system prevents damage to a device utilizing stacked battery cells, reduces the time required for battery replacement, and increases the capacity and reduces the size of the battery monitoring system. A battery unit includes: two or more battery cells configured to generate a DC voltage; two or more measurement units configured to measure a voltage value of the two or more battery cells and obtain measurement signals representing a measurement result; two or more transmission loop antennas configured to generate an AC magnetic field corresponding to the measurement signals; a reception loop antenna configured to receive the AC magnetic fields and generate a reception signal corresponding to the AC magnetic fields; a receiver configured to demodulate the reception signal to generate information representing the measurement results; and a magnetic core that runs through the transmission loop antennas and the reception loop antenna.
    Type: Grant
    Filed: September 21, 2018
    Date of Patent: March 29, 2022
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Hiroji Akahori
  • Patent number: 11284004
    Abstract: An imaging device and a horizontal direction detection method capable of detecting a horizontal angle of a camera with high accuracy in a simple configuration are provided. The imaging device includes an imaging unit configured to obtain image data by photographing a predetermined subject, an image rotation unit configured to cause a display image based on the image data to be rotated on a display plane step by step, a count unit configured to count the number of pixels of a specific color included in the display image in a scanning line direction within the display plane and obtain a count value for each of rotated display images, and a determination unit configured to determine a horizontal direction of a photographing angle of the imaging unit based on the count value for each of the rotated display images.
    Type: Grant
    Filed: December 9, 2020
    Date of Patent: March 22, 2022
    Assignee: LAPIS Semiconductor Co., Ltd.
    Inventor: Yuki Imatoh
  • Patent number: 11283350
    Abstract: A power source switching device that includes: a switch connected to a signal input terminal via a first resistor element and configured to fix a potential of the signal input terminal at a predetermined potential by adopting an ON state in a case in which a selection signal is not input; and a switch control circuit configured to perform control to place the switch in an OFF state based on a state signal indicating an operational state of a circuit that operates when supplied with power from a power source selected according to the selection signal in a case in which a potential of the selection signal is different from the predetermined potential, and to perform control to place the switch in the ON state in a case in which the selection signal is not input.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: March 22, 2022
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Tetsuya Ono
  • Patent number: 11281034
    Abstract: An output circuit is provided. The disclosure includes: a positive polarity voltage signal supplying circuit configured to supply or block the supply of a positive polarity voltage signal having a voltage higher than a reference power source voltage to a first node; a negative polarity voltage signal supplying circuit configured to supply or block the supply of a negative polarity voltage signal having a voltage lower than the reference power source voltage to a second node; a first switch formed from a P channel transistor of which a source and a back gate are connected to the first node and a drain is connected to a first output terminal; a second switch formed from an N channel transistor of which a source and a back gate are connected to the second node and a drain is connected to the first output terminal; and third and fourth switches.
    Type: Grant
    Filed: January 13, 2021
    Date of Patent: March 22, 2022
    Assignee: LAPIS Semiconductor Co., Ltd.
    Inventor: Hiroshi Tsuchi
  • Publication number: 20220085818
    Abstract: A semiconductor device outputs, as an output signal synchronized to a phase-locked loop clock signal, a synchronized input signal that is synchronized to a reference clock signal of a phase-locked loop circuit. The semiconductor device includes the phase-locked loop circuit, a first flip-flop that receives the input signal in synchronization with the reference clock signal on the basis of a feedback signal inputted to a phase comparator of the phase-locked loop circuit 10, and a second flip-flop that receives an output from the first flip-flop on the basis of the phase-locked loop clock signal. The second flip-flop outputs the output from the first flip-flop as the output signal. A setup time to synchronize the input signal to the phase-locked loop clock signal is set to one half of a period of the reference clock signal.
    Type: Application
    Filed: November 29, 2021
    Publication date: March 17, 2022
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventors: Junya Ogawa, Katsuaki Matsui
  • Publication number: 20220068188
    Abstract: A display driver is provided. A designation of an output timing at each of first and kth output channels is received, and first and second delay pulse signals are generated at respective output timings of the first and the kth output channels. First to kth first direction delay shift signals where a first delay pulse signal is present after a delay increased for each output channel from the first toward the kth output channel are generated. First to kth second direction delay shift signals where a second delay pulse signal is present after the delay increased for each output channel from the kth toward the first output channel are generated. One whose timing at which a delay pulse signal is present is earlier is selected from each of the direction delay shift signals corresponding to the same output channel, and set as first to kth output timing signals.
    Type: Application
    Filed: August 17, 2021
    Publication date: March 3, 2022
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventor: Koji HIGUCHI
  • Publication number: 20220069140
    Abstract: A semiconductor device has a semiconductor substrate and a semiconductor film doped with impurities that is formed so as to cover an inner wall surface of a trench formed so as to extend from a first surface of the semiconductor substrate towards an interior thereof. The semiconductor film is formed so as to extend continuously from the inner wall surface to the first surface of the semiconductor substrate. The semiconductor device further has an opposite electrode having a first portion that is provided at a position opposing the semiconductor substrate while sandwiching the semiconductor film therebetween, and that extends on the first surface of the semiconductor substrate, and a second portion that is continuous with the first portion and extends so as to fill the trench. The semiconductor device further has an insulating film that insulates the semiconductor film from the opposite electrode.
    Type: Application
    Filed: August 13, 2021
    Publication date: March 3, 2022
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventor: Hiroshi SHIBATA
  • Patent number: 11264838
    Abstract: A semiconductor device formed in a single semiconductor integrated circuit, the semiconductor device including: a transmission signal circuit block; a reception signal circuit block; a signal processing circuit block; and at least one of a charging control circuit block or a monitoring circuit block.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: March 1, 2022
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Koji Morita
  • Publication number: 20220058082
    Abstract: The disclosure provides a semiconductor storage element which is provided with an error detection and correction circuit and, when an uncorrectable error occurs in the semiconductor storage element, capable of promptly transferring the occurrence to the outside, and provides a semiconductor storage device and a system-on-chip using the same. The semiconductor storage element includes a storage part storing data, an error detection and correction part detecting an error in the data stored in the storage part and correcting the error if possible, a monitoring part issuing an uncorrectable error signal when an uncorrectable error occurs in the error detection and correction part, and a terminal transmitting the uncorrectable error signal to the outside.
    Type: Application
    Filed: August 19, 2021
    Publication date: February 24, 2022
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventors: Kota AMA, Tetsuya TANABE
  • Publication number: 20220036801
    Abstract: A digital-to-analog conversion circuit, a data driver including the same, and a display device are provided. The circuit includes: a reference voltage generation part, generating a reference voltage group having different voltage values; a decoder, selecting and outputting multiple reference voltages with overlapping from the reference voltage group based on the digital data signal; an amplification circuit, where m (m being an integer of 1 or more and less than x) of first to xth input terminals respectively receive m of multiple reference voltages, and, as an output voltage, a voltage amplified by averaging the voltages respectively received by the first to xth input terminals with predetermined weighting ratios is output; and a selector, which, in a first selection state, supplies the output voltage to (x-m) input terminals among the first to xth input terminals, and in a second selection state, supplies the reference voltages to the (x-m) input terminals.
    Type: Application
    Filed: July 19, 2021
    Publication date: February 3, 2022
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventor: Hiroshi Tsuchi
  • Publication number: 20220028349
    Abstract: A display driver according to the present invention generates a plurality of driving voltages based on a video signal and applies the respective driving voltages to a plurality of source lines of a display panel. The display driver includes an overdrive part and an overdrive control circuit. The overdrive part executes an overdrive processing to increase amplitudes of the driving voltages. The overdrive control circuit detects an internal temperature of the display driver and stops the overdrive processing by the overdrive part when the temperature is higher than a predetermined temperature threshold.
    Type: Application
    Filed: July 22, 2021
    Publication date: January 27, 2022
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventor: Kenichi SHIGETA
  • Patent number: 11232762
    Abstract: In the present invention, a differential amplifier that includes a first output transistor and a second output transistor includes a boost circuit that includes a third output transistor and a fourth output transistor. The first output transistor delivers a current according to a first differential signal generated in a differential stage to an output terminal. The second output transistor extracts a current according to a second differential signal generated as a signal which is the same phase with a different potential of the first differential signal from the output terminal. The third output transistor delivers a current to the output terminal according to a level-shifting signal generated by level-shifting the first differential signal. The fourth output transistor extracts a current from the output terminal according to a level-shifting signal generated by level-shifting the second differential signal.
    Type: Grant
    Filed: March 26, 2020
    Date of Patent: January 25, 2022
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Hiroshi Tsuchi
  • Patent number: 11232764
    Abstract: A first latch retrieves a pixel data piece for each one horizontal scanning period of a video data signal and holds the pixel data piece as a first pixel data piece. A second latch retrieves the first pixel data piece from the first latch at a timing when the retrieval by the first latch is completed and holds the first pixel data piece as a second pixel data piece. An interpolation data generating unit obtains the first pixel data piece and the second pixel data piece and generates an interpolation data piece. A third latch alternately performs a retrieval of the second pixel data piece and a retrieval of the interpolation data piece, and sequentially outputs the retrieved data piece as a third pixel data piece. A gradation voltage output unit outputs the gradation voltage signal based on the third pixel data piece.
    Type: Grant
    Filed: October 6, 2020
    Date of Patent: January 25, 2022
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Hideki Masai
  • Patent number: 11226792
    Abstract: A trigonometric function calculating device includes: an address generator that generates an address signal that is formed from plural bit strings and corresponds to a phase; a trigonometric function table that stores first sines and first cosines that respectively correspond to phases expressed by upper bits of the address signals, and second sines and a second cosines that respectively correspond to phases expressed by lower bits of the address signals; a calculation circuit that outputs, as a calculated value, a sine that corresponds to the address signal by calculating processing using the first sine, the first cosine, the second sine and the second cosine that correspond to the address signal and have been extracted by referring to the trigonometric function table; and a correcting section that corrects the calculated value on the basis of a correction value corresponding to the address signal.
    Type: Grant
    Filed: June 29, 2020
    Date of Patent: January 18, 2022
    Assignees: LAPIS SEMICONDUCTOR CO., LTD., TAMAGAWA SEIKI CO., LTD.
    Inventors: Masato Yamazaki, Hirofumi Maruyama
  • Patent number: 11217196
    Abstract: A display device and data driver are provided. The display device includes a plurality of data drivers provided for a predetermined number of data lines in a plurality of data lines. The plurality of data drivers receive the serialized video data signal from the display controller, generate a modulated data timing signal whose period changes within the one frame period, and supply a gradation voltage signal to each of the predetermined number of data lines for each of data periods based on a data timing of the modulated data timing signal, each of data periods corresponding to the data timing of the modulated data timing signal.
    Type: Grant
    Filed: November 20, 2019
    Date of Patent: January 4, 2022
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventors: Hiroshi Tsuchi, Koji Higuchi
  • Publication number: 20210407945
    Abstract: A semiconductor device includes an SiC semiconductor substrate including a diffusion layer, a first electrode provided on the SiC semiconductor substrate, a second electrode provided on the first electrode, and a resin section that is substantially the same size in a plan view as the SiC semiconductor substrate, and that is configured to seal in the second electrode.
    Type: Application
    Filed: June 17, 2021
    Publication date: December 30, 2021
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventor: Taiichi OGUMI
  • Patent number: D945384
    Type: Grant
    Filed: March 25, 2020
    Date of Patent: March 8, 2022
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Shigeki Yamauchi