Patents Assigned to Lapis Semiconductor Co., Ltd.
  • Publication number: 20210398570
    Abstract: A semiconductor device including a FIFO circuit in which a data capacity can be increased while minimizing an increase in a circuit scale is provided. The semiconductor device includes a single-port type storage unit (11) which stores data, a flip-flop (12) which temporarily stores write data (FIFO input) or read data (FIFO output) of the storage unit (11), and a control unit (14, 40) which controls a write timing of a data signal, which is stored in the flip-flop (12), to the storage unit (11) or a read timing of the data signal from the storage unit to avoid an overlap between a write operation and a read operation in the storage unit (11).
    Type: Application
    Filed: August 31, 2021
    Publication date: December 23, 2021
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventor: KENJIRO MATOBA
  • Patent number: 11200864
    Abstract: A level voltage generation circuit, a data driver and a display are provided. The level voltage generation circuit generates, based on N different input voltages, M (M>N) level voltages. The level voltage generation circuit comprises N differential amplifiers having output ends, which receive the N input voltages respectively, amplify the N input voltages respectively and output amplified N input voltages, and a resistor ladder having N voltage supply points respectively connected to the output ends of the N differential amplifiers and M voltage output points for outputting the M level voltages. The resistor ladder comprises a first wiring, connected to the output end of one of the N differential amplifiers through one of the N voltage supply points; and a second wiring, connected between one of the M voltage output points and one of an input pair of one of the N differential amplifiers.
    Type: Grant
    Filed: March 28, 2021
    Date of Patent: December 14, 2021
    Assignee: LAPIS Semiconductor Co., Ltd.
    Inventors: Hiroshi Tsuchi, Manabu Nishimizu
  • Patent number: 11194369
    Abstract: The present invention is aiming at providing a communication apparatus that is lower in power consumption and that can detect a change in surrounding environment and send out information indicating the detection result, and a method to detect a change in surrounding environment. A communication apparatus of the present invention includes: a member containing a functional dye material that changes an optical property thereof in accordance with a change in surrounding environment and that maintains a post-change optical property; an optical sensor having a light-receiving portion and disposed such that the light-receiving portion receives light that has passed through the member, the optical sensor detecting a luminance of light that is received by the light-receiving portion; and a communication control unit that transmits information indicating the luminance detected by the optical sensor.
    Type: Grant
    Filed: March 19, 2019
    Date of Patent: December 7, 2021
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Daisuke Oda
  • Patent number: 11196106
    Abstract: A semiconductor device including: a voltage detection section that outputs a first voltage and a second voltage that is different from the first voltage, the first voltage and the second voltage being voltages of a connected battery; a correction section that, on the basis of potential differences between the first voltage and second voltage, derives second data from first data, the first data representing a relationship between remaining battery levels and open circuit voltages, and the second data representing a relationship between remaining battery levels and battery voltages; and a calculation section that calculates a remaining level of the battery on the basis of a remaining battery level corresponding to a minimum voltage in the second data and outputs the calculated remaining level of the battery.
    Type: Grant
    Filed: July 23, 2019
    Date of Patent: December 7, 2021
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Takahiro Shimizu
  • Patent number: 11190889
    Abstract: A semiconductor device is provided, the device including a first detection section having a removal section to remove DC offset components included in each of an input signal and an output signal output from an amplification section that amplifies the input signal, and a correction section configured to perform correction to match phases of the input signal and the output signal from which the DC offset components have been removed, and to match gains of the input signal and of the output signal, the first detection section comparing a waveform of the input signal to a waveform of the output signal, and a second detection section to detect a mismatch between the DC offset component included in the input signal that is input into the removal section and the DC offset component included in the output signal that is input into the removal section.
    Type: Grant
    Filed: January 22, 2020
    Date of Patent: November 30, 2021
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Takanori Hashimoto
  • Patent number: 11190193
    Abstract: A semiconductor device outputs, as an output signal synchronized to a phase-locked loop clock signal, a synchronized input signal that is synchronized to a reference clock signal of a phase-locked loop circuit. The semiconductor device includes the phase-locked loop circuit, a first flip-flop that receives the input signal in synchronization with the reference clock signal on the basis of a feedback signal inputted to a phase comparator of the phase-locked loop circuit 10, and a second flip-flop that receives an output from the first flip-flop on the basis of the phase-locked loop clock signal. The second flip-flop outputs the output from the first flip-flop as the output signal. A setup time to synchronize the input signal to the phase-locked loop clock signal is set to one half of a period of the reference clock signal.
    Type: Grant
    Filed: March 20, 2020
    Date of Patent: November 30, 2021
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventors: Junya Ogawa, Katsuaki Matsui
  • Patent number: 11190222
    Abstract: A data slicer for converting an envelope signal of an amplitude-modulated wave into a binary signal, comprises: an average level generation circuit configured to generate an average level of the envelope signal by averaging the envelope signal per time; a fixed voltage value generation circuit configured to generate a fixed voltage value; a reference level generation circuit configured to generate a reference level in accordance with the fixed voltage value and the average level of the envelope signal; and a comparison circuit configured to compare a signal level of the envelope signal with the reference level to output a result of the comparison as the binary signal.
    Type: Grant
    Filed: January 24, 2020
    Date of Patent: November 30, 2021
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Tetsuaki Yotsuji
  • Patent number: 11188802
    Abstract: An IC tag in which precision reduction is suppressed and which is compact and manufactured easily, and a manufacturing method of IC tag are provided. The IC tag has: antennas disposed on one surface of a substrate; a capacitor which includes a dielectric and first and second electrodes disposed on one surface of the substrate, and in which an electrostatic capacitance changes irreversibly corresponding to changes in ambient environment; and an IC chip which detects the electrostatic capacitance of the capacitor via a pair of external terminals to which the first and second electrodes are respectively connected, and wirelessly transmits information based on a detection result via the antennas.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: November 30, 2021
    Assignee: LAPIS Semiconductor Co., Ltd.
    Inventor: Daisuke Oda
  • Publication number: 20210366417
    Abstract: Provided is a display panel, a source driver that generates a gradation voltage signal based on an image data signal, a timing controller that supplies the image data signal to the source driver, and an illumination drive unit that controls an amount of light of a backlight that illuminates each of a plurality of areas formed by dividing a display screen in the display panel. The source driver or the timing controller calculates feature values of the image data signal corresponding to each of the plurality of areas of the display panel and supplies a dimming data signal representing the amount of light of the backlight according to the feature values of each area to the illumination drive unit. The illumination drive unit controls the amount of light of the backlight for each of the plurality of areas based on the dimming data signal.
    Type: Application
    Filed: May 12, 2021
    Publication date: November 25, 2021
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventors: Hiroaki ISHII, Shinichi FUKUZAKO
  • Patent number: 11177252
    Abstract: The semiconductor device and the method of fabricating the same includes, on a surface of a semiconductor substrate 1 of a first conductivity type which is P-type or N-type, a diode element using a PN junction including a high-concentration first conductivity type impurity region 6 of the first conductivity type, a high-concentration second conductivity type impurity region 5 of a second conductivity type that is a conductivity type opposite to the first conductivity type, and an element isolation region 2 sandwiched between the high-concentration first conductivity type impurity region and the high-concentration second conductivity type impurity region, and a floating layer 3 of the second conductivity type separated from the high-concentration second conductivity type impurity region below the high-concentration second conductivity type impurity region on the semiconductor substrate.
    Type: Grant
    Filed: March 25, 2020
    Date of Patent: November 16, 2021
    Assignee: LAPIS Semiconductor Co., Ltd.
    Inventors: Hiroyuki Tanaka, Masahiko Higashi
  • Patent number: 11164505
    Abstract: A display apparatus includes: a display panel; a gate driver that provides, to a plurality of scanning lines, scanning pulse signals for controlling pixel switches to be ON in a selection period corresponding to a pulse width thereof; a data driver that provides gradation voltage signals to a plurality of data lines; and a display controller that provides a modulated clock signal having a frequency that changes at a predetermined rate in one frame period. The gate driver sequentially provides the scanning pulse signals each having a pulse width reflecting to a clock cycle of the modulated clock signal in a predetermined order corresponding to distances from the data driver to the plurality of scanning lines. The data driver provides the gradation voltage signals in the order of providing the scanning pulse signals for every data period corresponding to the clock cycle of the modulated clock signal.
    Type: Grant
    Filed: January 9, 2020
    Date of Patent: November 2, 2021
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventors: Hiroshi Tsuchi, Katsunori Ito
  • Patent number: 11151059
    Abstract: A semiconductor device of a peripheral device control system includes one or more management blocks that are provided in association with a device to be controlled. The management blocks each include a plurality of registers that store information pertaining to each operation of the device to be controlled, and a first generation unit that performs a predetermined aggregation process on values of the plurality of registers included in the management block to generate an aggregation value that is a value formed by aggregating the values of the plurality of registers.
    Type: Grant
    Filed: December 30, 2019
    Date of Patent: October 19, 2021
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Yuki Imatoh
  • Patent number: 11146110
    Abstract: A power reception device has: a rectifier circuit that generates a direct current voltage by having applied thereto an alternating current voltage, and has first and second output terminals that output the direct current voltage; a transistor, the drain and source of which are connected to the first and second output terminals; a gate driver circuit that controls the gate voltage of the transistor according to the voltage between the first and second output terminals; and a capacitor that has a first end that is connected to the drain of the transistor and a second end that is connected to the gate of the transistor.
    Type: Grant
    Filed: March 20, 2020
    Date of Patent: October 12, 2021
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Takashi Taya
  • Patent number: 11139235
    Abstract: A semiconductor device has a semiconductor substrate, a first insulating film formed on a surface of the semiconductor substrate, a first recess formed in the first insulating film, a first barrier film formed on an inner surface of the first insulating film except a top peripheral region of the first trench, a first conductive film formed in the first trench, and a covering film formed on an upper surface and a top peripheral region of the first conductive film and an upper surface of the first barrier film. The first conductive film includes copper.
    Type: Grant
    Filed: April 8, 2019
    Date of Patent: October 5, 2021
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Kazuhide Abe
  • Publication number: 20210305360
    Abstract: A semiconductor device has: a semiconductor substrate; a trench that extends from a first surface of the semiconductor substrate towards an interior of the semiconductor substrate, and that has a recess/protrusion structure on a side wall surface thereof; a semiconductor film that is formed so as to cover the side wall surface of the trench, be continuous with the side wall surface, and extend onto the first surface of the semiconductor substrate; an opposite electrode having a first portion that is provided at a position opposing the semiconductor substrate while sandwiching the semiconductor film therebetween, and that extends on the first surface of the semiconductor substrate, and a second portion that is continuous with the first portion and extends so as to fill the trench; and an insulating film that insulates the semiconductor film from the opposite electrode.
    Type: Application
    Filed: March 18, 2021
    Publication date: September 30, 2021
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventor: Hiroshi SHIBATA
  • Publication number: 20210304372
    Abstract: An image distortion correction circuit according to the present invention comprises; a first distortion correction circuit that performs a mapping process on an input image signal to generate a distortion-corrected image signal; an inspection region defining circuit that defines an inspection image region in the one-frame image; an inspection region extraction circuit that extracts a part corresponding to the inspection image region from the distortion-corrected image signal and outputs the part of the distortion-corrected image signal as a first inspection image signal; a second distortion correction circuit that outputs a second inspection signal, the second inspection signal being generated by performing the mapping process on the part of the input image signal corresponding to the inspection image region; and a failure determination circuit that determines that a failure occurs and outputs a failure detection signal when the first inspection image signal and the second inspection image signal are mutually
    Type: Application
    Filed: March 30, 2021
    Publication date: September 30, 2021
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventor: Yuki IMATOH
  • Publication number: 20210307154
    Abstract: A shield case, joined to a circuit board on which electronic components are mounted and covering the electronic components, has a top plate portion covering the electronic components, and a plurality of terminal leg portions formed in a way of projecting in a direction intersecting with the top plate portion from a peripheral edge portion of the top plate portion. Each of the plurality of terminal leg portions has: a leg portion stretching from the top plate portion; a terminal portion which extends in a direction intersecting with the leg portion from a front-end of the leg portion and is joined to the circuit board; and an expansion terminal portion which is formed by bending a front-end portion of each of the terminal portions along an end surface of the circuit board and has a length exceeding a thickness of the circuit board.
    Type: Application
    Filed: March 24, 2021
    Publication date: September 30, 2021
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventor: Mitsuhiro NAKAMURA
  • Publication number: 20210303390
    Abstract: To provide a semiconductor device having a monitoring function with a higher degree of freedom. The semiconductor device includes: a function part that executes a predetermined process triggered according to an activation signal sent from an external device and outputs a completion signal after the predetermined process is completed; a first clocking part that monitors a first abnormality in the predetermined process based on the activation signal and the completion signal; and a branch part pair including a first branch part and a second branch part, wherein the first branch part branches the activation signal and then sends the branched activation signal to the function part and the first clocking part, and the second branch part branches the completion signal and then sends the branched completion signal to the first clocking part and the external device.
    Type: Application
    Filed: March 29, 2021
    Publication date: September 30, 2021
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventor: Hiroji AKAHORI
  • Publication number: 20210302724
    Abstract: An image distortion correction circuit performs a distortion correction process on an image signal on the basis of distortion correction data to generate a distortion-corrected image signal. The distortion correction data is for correcting coordinate positions of display data fragments corresponding to respective N coordinate positions in the display image to first to N-th distortion correction coordinate positions. The image distortion correction circuit determines a distortion correction coordinate position where abnormality occurs as an abnormal coordinate position among the first to N-th distortion correction coordinate positions on the basis of respective intervals between the adjacent first to N-th distortion correction coordinate positions indicated by the distortion correction data.
    Type: Application
    Filed: March 29, 2021
    Publication date: September 30, 2021
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventor: Yuki IMATOH
  • Publication number: 20210306021
    Abstract: A multilayer substrate includes a first dielectric layer, a first conductive layer, and a conductor portion. The first dielectric layer has a first region. The first conductive layer is laminated on the first dielectric layer, excluding the first region. The conductor portion has one or more auxiliary conductors disposed at a distance from the first conductive layer, and one or more connecting conductors that connect said one or more auxiliary conductors to the first conductive layer.
    Type: Application
    Filed: March 19, 2021
    Publication date: September 30, 2021
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventor: Shigeki YAMAUCHI