Abstract: A converter coupled to a DC voltage input and connectable to a load, includes a signal responsive switch coupled between a first circuit point and a second circuit point. In lieu of burst mode operation during low load conditions, the peak switch current is varied directly with load condition and a switch deactivation interval is varied inversely with load condition. The switch deactivation level is within a maximum level to avoid audio frequency band interference, while maintaining high efficiency operation throughout the load range.
Abstract: Output voltage overshoot of a switching regulator is controlled by deactivating switching operation when a signal proportional to the output voltage exceeds a variable threshold level, with the threshold level set as a function of regulator output current. In accordance with an embodiment, a difference signal is generated that corresponds to a difference between an output voltage feedback signal and a constant reference voltage. The generated difference signal is combined with a signal proportional to load current to obtain an adapted threshold level. The adapted threshold level is greater than the level of the constant reference voltage. A regulator switch is reset to an off state when the output voltage feedback signal exceeds the adapted threshold level.
Abstract: The slew rate of switching circuits, e.g. for DC to DC converters, is controlled without unduly sacrificing total switching time, by providing a weaker switching transistor in parallel with each stronger main switching transistor. Switching of the weaker transistor is controlled so as to have a slower slew rate in transitions between switch states than transitions of the main transistor. The main transistor switches at a fast rate for efficiency, but the slower transition by the weaker transistor provides a more gradual transition of the voltage at the desired switching node, so as to reduce EMI and/or input supply noise.
Abstract: Novel system and methodology for determining resistance of wires in a communication cable having at least two pairs of wires used for providing power from a power supply device to a powered device. A measuring mechanism may determine DC resistance of the wires before the power supply device applies power to the communication cable.
Abstract: System and methodology for providing classification of a load in a power supply system for providing power over a communication link. The power supply system has a classification engine for probing the load to determine a characteristic of the load. The classification engine supplies the load with multiple classification signals to determine multiple response signals presented by the load in response to the respective classification signals.
Abstract: The present disclosure relates to simulating inductors wound on a ferromagnetic core as the magnetic material saturates. In one application, the present disclosure is advantageously used to model the asymmetric minor hysteresis loops commonly traversed by the output inductor of a switch mode power supply. An advantage of the subject matter of the disclosure is that it allows practical nonlinear inductors to be modeled in a computationally lightweight manner without conventional non-physical behavior under asymmetric minor hysteresis loop traversals. The disclosure is also conveniently applicable to practical ferromagnetic core materials because, in one particular implementation, the input parameters to the model are the core's coercive force (Hc), remnant magnetization flux density (Br), and saturation flux density (Bs).
Abstract: An amplifier/comparator includes a multitude of output stages all sharing the same input stage. One or more of the output stages are amplification stages and have compensated output signals. A number of other output stages are not compensated and provide comparison signals. Each uncompensated output stage is adapted to switch to a first state if it detects a first input signal as being greater than a second signal, and further to switch to a second state if it detects the first input signal as being smaller than the second signal. By varying the channel-width (W) to channel-length (L) ratio (W/L) of the transistors disposed in the output stages, the trip points of the comparators and/or the electrical characteristics of the amplifiers are selectively varied.
Abstract: A integrated circuit (IC) implementation of a protection circuit detects and resolves a fault on a bus, such as a stuck-low condition on an I2C bus. The circuit includes logic that detects a fault condition caused by the slave device, e.g. when one or both lines are low for a period longer than a timeout value in the I2C example. Upon detecting the fault condition, the logic disconnects the slave device from the data line and the clock line, for example by activation of switches incorporated in the IC. This typically frees the bus for use by other devices. The logic may also send the slave device one or more clock signals to clear the fault and/or a stop bit when the fault clears to reset the data register in the slave device.
Type:
Grant
Filed:
April 8, 2005
Date of Patent:
January 13, 2009
Assignee:
Linear Technology Corporation
Inventors:
George P. Humphrey, William Edward Martin
Abstract: A regulator may include a load voltage sensing circuit configured to generate a feedback signal representative of output voltage from an isolated flyback converter. The regulator may include a pulse generator configured to controllably generate the pulses and to increase at least one off time and at least one period of the pulses after a load on the flyback converter decreases.
Abstract: A trimdac circuit for adjusting the output of a digital-to-analog converter (DAC) is provided. The trimdac may be used to adjust a plurality of resistor segments in the DAC. The trimdac may include a programmable Read Only Memory (ROM) or other suitable memory device. The ROM may include a plurality of multi-bit digital words. Each of the multi-bit digital words may control a plurality, and most preferably a pair of variable resistance circuits. Each of the pair of variable resistance circuits may adjust a resistor segment of the DAC.
Abstract: System and methodology for driving an inductive load using a pass device for providing hot swap connection to the load. A current limit circuit prevents current supplied to the load from exceeding a current threshold. A foldback circuit controls the current limit circuit to reduce the current threshold when a voltage across the pass device is above a prescribed value. A filter circuit is coupled to the foldback circuit for reducing oscillations when the inductive load is connected to the pass device.
Abstract: A switched regulator circuit provides step-up and step-down operation in which the level of the input voltage can be greater, equal to, or less than a preset controlled output voltage. A four switch arrangement or two switch arrangement provides buck, boost, and buck-boost regulation under variable frequency valley-peak current mode control. A single sense resistor may be utilized for sensing inductor current during each duty cycle.
Abstract: A regulator for an isolated flyback power supply using primary side sensing. The regulator may include an error circuit configured to generate an error signal representative of the difference between a target value and a measured value, a sample and hold circuit, and a controller circuit. The controller circuit may be configured to cause the sample and hold circuit to sample the value of a derived signal that is derived from a connection to the primary winding at a time when the primary winding is decoupled from the energy-supplying circuit and the diode is conducting current, and to hold the sampled value at least until the diode stops conducting current. The controller circuit may also be configured to cause the held value to be the measured value used by the error circuit.
Abstract: A folded cascode amplifier having improved slew comprises an input differential transistor pair circuit, a cascode branch circuit coupled to the differential pair circuit, and a boost circuit for increasing branch current when the amplifier is in a slew condition. The additional current increases slew of the amplifier without negatively affecting amplifier characteristics.
Abstract: A hysteretic regulator may be set to an active mode when voltage at an output falls to a first threshold level. In the active mode, charge is applied to an output node by a current having a set limit value. The regulator is set to an inactive mode when the voltage at the output node rises to a second threshold level. The current limit value is automatically adjusted as a function of average regulator current. An indication of average regulator current may be obtained by charging a sense capacitor during the active mode and discharging the sense capacitor during the inactive mode. The voltage of the sense capacitor, which is representative of the average regulator current, is used to generate an offset adjustment applied to a regulator controller.
Abstract: A system for supplying power to a load over a communication link has high-side current sensing circuitry for measuring a high-side current value, low-side current sensing circuitry for measuring a low-side current value, and control circuitry responsive to both the high-side current value and the low-side current value to detect a fault condition, detect information from the load, and/or transmit information to the load by creating a prescribed unbalance between the high-side current and the low-side current.
Type:
Grant
Filed:
November 7, 2005
Date of Patent:
September 16, 2008
Assignee:
Linear Technology Corporation
Inventors:
David McLean Dwelley, Jeffrey Lynn Heath
Abstract: A novel sampling system having a sampling device responsive to an analog input signal and a reference signal for providing corresponding charges. A switching circuit is provided to supply the input signal and the reference signal to the sampling device. The switching circuit is controlled to supply the input signal and the reference signal to the sampling device so as provide a substantially zero total charge taken by the sampling device from a source of the input signal. One application of the foregoing is in analog-to-digital conversion.
Abstract: A bandgap voltage reference circuit having temperature curvature correction, comprises a bandgap voltage source configured to generate an output voltage, and a novel curvature correction circuit. The correction circuit is responsive to the bandgap voltage source output voltage and connected to apply a curvature correction signal to the bandgap voltage source to compensate for output voltage temperature dependency of the bandgap voltage source.
Type:
Grant
Filed:
March 17, 2006
Date of Patent:
September 2, 2008
Assignee:
Linear Technology Corporation
Inventors:
Michael B. Anderson, Andrew J. Gardner, Robert Chiacchia
Abstract: A spread spectrum frequency modulated oscillator circuit usable as a clock comprises a reference component such as a resistor, a voltage controlled oscillator and a first circuit coupled to the reference component and voltage controlled oscillator and configured to supply a first control signal to the oscillator to cause the oscillator to oscillate at a frequency corresponding to a value of the reference component. A second circuit configured to supply a random signal to the oscillator causes the frequency of the oscillator to dither.
Abstract: Digital to analog converter circuits and methods are provided for producing an analog output voltage indicative of a digital input signal with at least partial insensitivity to error gradients. Described are split-core resistive elements, which include a plurality of one-dimensional or multi-dimensional resistive strings, that may be used to reduce or substantially eliminate the effects that error gradients have on the linearity of the analog output voltages of a resistive string or interpolating amplifier DACs. The resistor strings that make up the split-core resistive elements are configured in such a manner that combining respective output voltages from each of the resistor strings results in an analog output voltage that is at least partially insensitive to the effects of error gradients.