Abstract: A switching circuit for supplying current to a load has a switching element, an inductive element coupled to the switching element, and a load current extraction circuit responsive to current in the inductive element for producing a load current signal as a simulated current approximating current in the load.

Abstract: A single-pass method of trimming a network, and a network manufactured according to the method, uses the assumption that the peak INL value is minimized by trimming all the structures in the network to a same target value based upon the boundary conditions of the discretely adjustable elements that make up the structures. Using this assumption, the number of targets that need to be simulated, can be greatly reduced making estimation of peak INL possible in a reasonable amount of testing or manufacturing time. The trim algorithm produces results that are optimum or substantially close to optimum and is guaranteed not to deteriorate the Peak INL compared to the untrimmed Peak INL. An auto-calibration system using the trim method is also provided so that the method can be used in a product in real time if desired.

Abstract: A switch signal generator circuit that may form part of a digital to analog converter is provided. The switch signal generator circuit may include a first switch that controls a high reference gate voltage. The high reference gate voltage may provide the ON state voltage for a plurality of switches that control the coupling of a high reference voltage to the digital to analog converter. The switch signal generator circuit may include a second switch that controls a low reference gate voltage. The low reference gate voltage may provide the ON state voltage for a plurality of switches that control the coupling of a low reference voltage to the digital to analog converter. The switch signal generator circuit may also include a resistor. In one embodiment of the invention, a current conducted by the first switch and/or a current conducted by the second switch may each be proportional to a current conducted by the resistor. One of the switches in the switch generator circuit may be a P channel switch.

Abstract: A novel system and methodology for controlling an output of Power Sourcing Equipment in a Power over Ethernet system based on a current limit threshold. The PSE has an auto-zero circuit for comparing a monitored output current of the PSE with the current limit threshold to control the output of the PSE.

Abstract: System and methodology for controlling output current of switching circuitry having an input circuit and an output circuit electrically isolated from each other. A value of the output current may be determined based on input voltage, input current and reflected output voltage representing the voltage in the input circuit which corresponds to the output voltage. A switching element in the input circuit is controlled to produce the determined value of output current.

Abstract: A square cell comprises first and second bipolar transistors each having an emitter, collector and base, the bases of the transistors being connected for receiving an input voltage, and first and second resistors in series with the first and second bipolar transistors respectively and with a source of reference voltage. The collectors are commonly connected to an output node to supply an output current having a component proportional to the square of the input voltage. Enhanced square law conformance may be produced by adding further pairs of bipolar transistors to the cell, with offset voltage elements coupled between bases of successive transistors on each side of the cell.

Abstract: Various concepts and techniques are disclosed for measuring the voltage of a power source. An apparatus includes a voltage metering circuit and a transformer having a first winding coupled to the voltage metering circuit and a second winding for coupling to a power source.

Abstract: Novel circuitry and methodology for detecting a Powered Device (PD) in a system for providing power to the PD. PD detection circuitry detects the PD in a first mode by providing detection current to probe the PD, and in a second mode by providing detection voltage to probe the PD. A control circuit determines that the PD is a valid device if the PD is detected both in the first mode and in the second mode.

Abstract: A controlled endpoint sawtooth waveform generator and methodology is implemented by a circuit that uses charge sharing between capacitors to produce a sawtooth having one or both endpoints that are suspended between the power supply rail and ground. The circuit may comprise a timing capacitor to which a charging source is coupled, and a switched capacitor coupled to the timing capacitor through a first controlled switch and to a source of switched capacitor reference voltage through a second controlled switch. The first and second controlled switches are responsive to a control signal, that may be internally or externally provided, for mutually exclusive switch operation. An output sawtooth thereby is produced having one endpoint determined by a fixed voltage source and the other endpoint in accord with the capacitance ratio of the timing and switched capacitors.

Abstract: A voltage regulator provides a regulated output load voltage at either a positive level or an inverted level relative to an input supply voltage. A switching circuit and control circuit are formed on an integrated circuit having a single pin for coupling to regulator feedback signal. The feedback signal is applied directly to the feedback pin during both positive voltage level regulation and inverted voltage level regulation. The feedback signal may be produced by a feedback circuit comprising an impedance element formed in the integrated circuit.

Abstract: A novel system for providing power over the Ethernet includes a current limit circuit for preventing an output current from exceeding a current threshold set at a prescribed level, and a foldback circuit for reducing the current threshold when an output voltage is lower than a prescribed voltage value. The foldback circuit may be controlled to operate in a high-power mode to increase the current threshold above the prescribed level.

Abstract: A power management system including a battery-powered application, in which an input current is supplied by a source of current that may be a current-constrained source, such as a USB port, to a battery for charging the battery and to an application load. Battery charging current is supplied to the battery for a period of time based on magnitude of battery charging current, so that charging current of lesser magnitude is applied to the battery for a greater period of time. In accord with one implementation, battery charging current is determined by monitoring the difference between a programmed charging current, dependent on battery type, and magnitude of current used by the load. Change of battery charging current due to voltage mode charging, when charge current begins to drop as the battery approaches full charge, is detected, and in response, the charging period is set to a fixed charging period based on the battery.

Abstract: An operational amplifier circuit includes an input differential circuit and a trim circuit for sensing the operational amplifier's input common mode voltage and generating an offset correction voltage in response thereto. The trim circuit reduces the amplifier's offset voltage dependence on input common mode voltage, and hence improves the common mode rejection ratio of the operational amplifier circuit.

Abstract: Transition delays in a level shift circuit are equalized by generating a first signal related to the state of the input signal, a second signal inversely related to the state of the input signal, and a third signal that is reciprocal to the second signal. Upon transition of the input signal from a high state to a low state, the third signal is selected for controlling the output until the first signal attains a high state. The first signal is selected for controlling the output when it has reached a high state after the input signal transition. The first signal remains selected upon transition of the input signal from a high state to a low state. Thus, output delays are equalized and reduced to the shortest delay.

Abstract: System and methodology for supplying power to a load using a pass device for connecting the load. A current limit circuit prevents current supplied to the load from exceeding a current threshold. A foldback circuit modifies the current threshold in accordance with a prescribed condition. The foldback circuit is configured to vary the current threshold in accordance with an approximate safe operating area of the pass device.

Abstract: Bidirectional power conversion systems provide the ability to change power attributes to and from a component. Current bidirectional power conversion systems use a unidirectional power converter for each direction. The integration of the two normally independent power converters results in a bidirectional power converter with nearly half the size, weight, volume, cost and complexity. Described are embodiments of bidirectional power conversion systems that allow power transfer between two or more components without requiring the use of separate unidirectional power converters.

Abstract: A clamping circuit clamps a voltage received by an n-type semiconductor region without using a Schottky transistor. The clamping circuit includes a current mirror as well as first and second bipolar transistors. The current mirror receives a first current and supplies a second current in response. The first current is received by the first bipolar transistor, and the second current is received by the second bipolar transistor. The difference between the base-emitter junction voltages of the first and second bipolar transistors, in part, defines the voltage at which the n-type region is clamped. To start-up the circuit properly, current is withdrawn from the base/gate terminals of the transistors disposed in the current mirror. The circuit optionally includes a pair of cross-coupled transistors to reduce the output impedance and improve the power supply rejection ratio.

Abstract: A differential amplifier with a rail-to-rail input stage includes a feedback circuit that maintains the output common mode voltage of the amplifier within a narrow range of an externally supplied value. To reduce harmonic distortions and to further stabilize the output common mode voltage of the amplifier, current is controllably drawn from a biasing circuit coupled to an intermediate stage of the amplifier. Optionally, to reduce harmonic distortions and to further stabilize the output common mode voltage of the amplifier, current is controllably supplied to the intermediate stage of the amplifier.

Abstract: Digital to analog converter circuits and methods are provided for producing an analog output voltage indicative of a digital input signal with at least partial insensitivity to error gradients. Described are split-core resistive elements, which include a plurality of one-dimensional or multi-dimensional resistive strings, that may be used to reduce or substantially eliminate the effects that error gradients have on the linearity of the analog output voltages of a resistive string or interpolating amplifier DACs. The resistor strings that make up the split-core resistive elements are configured in such a manner that combining respective output voltages from each of the resistor strings results in an analog output voltage that is at least partially insensitive to the effects of error gradients.

Abstract: Switching regulator circuits and methods are provided for regulating output voltage that include an adjustable minimum peak inductor current level for Burst Mode in current-mode DC-DC regulators. Minimum peak inductor current level control is achieved during Burst Mode by allowing external control for adjusting the burst threshold level. A single pin can be used to distinguish between forced continuous and Burst Mode as well as set the burst threshold level during Burst Mode, or an alternate method of setting a variable burst threshold level can be implemented in which two pins are used, one for selecting the mode of operation and the other for setting the burst threshold level during Burst Mode. The above principles can be applied to both step-up and step-down regulator circuit configurations, as well as both synchronous switching regulators and non-synchronous switching regulators.