Abstract: A network interface unit with a base and cover having two layers of equipment with the upper layer being hinged to the base and the cover being hinged to an extension of the base. The hinged arrangement allows the cover and one of the layers of the equipment to be swung out to facilitate maintenance.
Abstract: In systems embodying the invention X clock signals having the same frequency, with each clock signal having a different phase, are supplied to the inputs of a multiplexer whose output is connected to the input of an "integer" frequency divider circuit; where X is an integer greater than 1. The mulitplexer is controlled to selectively supply different ones of the X clock signals to the frequency divider circuit for producing at the output of the frequency divider circuit a signal whose frequency is a function of the divider ratio of the frequency divider circuit and the sequencing of the clock signals supplied to the frequency divider circuit.
Abstract: Signal markers are placed in critical locations within the wireless network. Critical locations are locations where signals from base stations may be weak due to natural or man-made obstruction and locations where user demand for network resources may be particularly heavy. The signal markers collect data such as the signal strength or amplitude of signals from surrounding base stations, and the amount of user demand for access to the network. The signal markers then communicate this data to the mobile switching center. The mobile switching center analyzes the data and, if the data indicates unsatisfactory performance, determines new parameters for the base stations. The mobile switching center then communications the new parameters to each of the base stations where each of the base stations changes its performance in accordance with the new parameters.
Abstract: An integrated circuit includes a variable bit-depth successive approximation analog-to-digital converter. The variable bit-depth successive approximation analog-to-digital converter can select from at least two clock signals of different frequencies to drive the variable bit-depth successive approximation converter for each bit depth application. Within each bit-depth application, the converter may employ more than one clock frequency.
Abstract: The present invention provides an improved integrated circuit technique for increasing the reliability of wire-bonds in an integrated circuit by increasing the contact angle between certain pins and their respective wire-bonds, particularly those pins otherwise most susceptible to wire-bond failure, i.e., those pins conventionally located toward the corners of a conventional integrated circuit. By doing so, the overall length of the wire-bonds in a chip will be reduced, which in turn can result in further reduction of the probability of wire-bond failures. In a disclosed embodiment, a five or more sided integrated circuit shape is introduced wherein pads on up to four sides of an integrated circuit wafer chip are bonded to pins supported on eight edges of an integrated circuit package. An integrated circuit having at least five pin-supporting edges renders more robust wire-bond angles for any given integrated circuit package size.
Abstract: There is disclosed an integrated circuit including a successive approximation analog-to-digital converter. The successive approximation analog-to-digital converter can select which of at least two clock signals of different frequency drive the successive approximation converter for each bit determination. Each bit determination may employ a different clock frequency, or a particular clock frequency could be used for multiple bit determinations. The clock signals may be generated within the analog-to-digital converter, or the clock signal may be provided to the analog-to-digital converter.
Abstract: Secondary backplane boards are secured to a main backplane board to provide interconnection paths in a direction transverse to interconnection paths provided on the main backplane board, so that current manufacturing capabilities of multi-layer backplane boards are not exceeded.
Type:
Grant
Filed:
March 24, 1999
Date of Patent:
November 28, 2000
Assignee:
Lucent Technologies Inc.
Inventors:
Andrew C. Durston, Liang Hwang, Hector F. Rodriguez
Abstract: The invention provides improved computer network firewalls which include one or more features for increased processing efficiency. A firewall in accordance with the invention can support multiple security policies, multiple users or both, by applying any one of several distinct sets of access rules. The firewall can also be configured to utilize "stateful" packet filtering which involves caching rule processing results for one or more packets, and then utilizing the cached results to bypass rule processing for subsequent similar packets. To facilitate passage to a user, by a firewall, of a separate later transmission which is properly in response to an original transmission, a dependency mask can be set based on session data items such as source host address, destination host address, and type of service. The mask can be used to query a cache of active sessions being processed by the firewall, such that a rule can be selected based on the number of sessions that satisfy the query.
Type:
Grant
Filed:
September 12, 1997
Date of Patent:
November 28, 2000
Assignee:
Lucent Technologies Inc.
Inventors:
Michael John Coss, David L. Majette, Ronald L. Sharp
Abstract: Link performance is measured in a code division multiple access (CDMA) personal communication service (PCS) or cellular system, or other type of wireless system, using a test set-up which permits the simulation of various changes in system configuration. An illustrative embodiment includes a first attenuator arranged in a common portion of a receive path and a transmit path of a mobile station of the system, and a second attenuator arranged in either a receive-only portion of the receive path or a transmit-only portion of the transmit path. The amounts of attenuation provided by the first and second attenuators are decoupled such that a different amount of attenuation can be provided on the transmit path than on the receive path. Performance of forward and reverse links of the system are measured while varying a value of at least one of the first or second attenuators.
Type:
Grant
Filed:
January 16, 1998
Date of Patent:
November 28, 2000
Assignee:
Lucent Technologies Inc.
Inventors:
Terry Si-Fong Cheng, Asif Dawoodi Gandhi
Abstract: A feedforward linearizer for amplifying an input signal comprises a signal cancellation circuit which has a first branch and a second branch. A first amplifier provided in the first branch receives the input signal intended to be amplified and generates an output signal received by a signal cancellation vector modulator. A signal cancellation adder receives the signal generated by the signal cancellation vector modulator and the input signal via the second branch and provides an error signal. The feedforward linearizer also comprises an error cancellation circuit that has a first branch and a second branch. An error cancellation adder in the first branch receives the output signal provided by the first amplifier and generates the output signal of the linearizer. An error cancellation vector modulator in the second branch receives an error signal provided by the signal cancellation adder and provides an error adjusted signal to a second auxiliary amplifier.
Abstract: An apparatus, method and system are provided for automatic and distributed inventory processing for remote communication sites, such as remote cellular sites. A system embodiment includes a central site having a central processor, such as a mobile switching center, and a multitude of remote communication sites, with each remote communication site having a plurality of field replaceable units; and further having a remote processor and a remote memory. The remote processor includes instructions for obtaining an address and status from the memory of each field replaceable unit within the remote communication site and for querying each field replaceable unit having a status not out of service to obtain its vintage information and its physical location information. In the preferred embodiment, the physical location information includes frame, shelf and slot locations, and the vintage information includes hardware and firmware versions.
Type:
Grant
Filed:
April 27, 1998
Date of Patent:
November 28, 2000
Assignee:
Lucent Technologies Inc.
Inventors:
Wamiq Sattar, William Walter Demlow, Bindu Shrivastav
Abstract: An article comprising an alloy exhibiting high magnetostriction in relatively low applied magnetic fields is provided, the alloy capable of being formed in a relatively easy manner and having desirable physical properties. The Co--Fe alloy of the invention exhibits a magnetostriction of at least 100.times.10.sup.-6 in a magnetic field less than 400 Oe, advantageously in a magnetic field less than 100 Oe. The alloy is formed by plastically deforming the alloy, e.g., by cold rolling, to a reduction in cross-sectional area of at least 50%, and then heat treating the alloy to induce recrystallization. This combination of plastic deformation and recrystallization was found to provide desirable grain growth and microstructure. The resultant alloy is useful in a variety of device components, including transducers, frequency filters, signal delay lines, and optical fiber grating devices.
Type:
Grant
Filed:
March 3, 1999
Date of Patent:
November 28, 2000
Assignee:
Lucent Technologies
Inventors:
Li-Han Chen, Sungho Jin, Timothy J. Klemmer, Hareesh Mavoori
Abstract: A method of forming a passivation layer over features located on a top layer on a semiconductor device comprises depositing a first void-free layer of a dielectric over the top layer using high density plasma chemical vapor deposition. A second void-free layer can additionally be deposited over the first void-free layer. The first void-free layer can be formed from a silicon oxide, and the second void-free layer can be formed from a silicon nitride. The first void-free layer has a top surface that is disposed at a height higher than the features. The first void-free layer can be applied in two steps. First, the void-free layer is deposited at a D/S ratio between 3.0 and 4.0 to a depth of at least 40% of the feature's height, and then deposited at a D/S ratio of between 6.0 and 7.0.
Type:
Grant
Filed:
August 9, 1999
Date of Patent:
November 28, 2000
Assignee:
Lucent Technologies Inc.
Inventors:
Daniel P. Chesire, Edward P. Martin, Jr., Leonard J. Olmer, Barbara D. Kotzias, Rafael N. Barba
Abstract: A system for, and method of, displaying a sorted list on a display device and a computer incorporating the system or the method. In one embodiment, the system includes: (1) a sort-point identifier that scans a key field of a sorted list and determines sort-points in the key field and (2) a key field marker, associated with the sort-point identifier, that associates marks with the key field based on the sort-points and causes at least a portion of the sorted list and the associated marks to be displayed on the display device.
Abstract: In a cellular system, channels are assigned for new calls using a flexible channel allocation algorithm that is a hybrid of a measurement-based dynamic channel assignment (MBDCA) algorithm and a reuse-distance criterion algorithm, such as a cost-function-based DCA (CFBDCA). In one embodiment, the MBDCA algorithm is implemented at each cell site in the cellular system and generates a list of candidate channels for each new call. The list is transmitted to the mobile switching center (MSC), which implements the CFBDCA algorithm to select a particular channel from the list of candidate channels for the new call.
Type:
Grant
Filed:
March 5, 1998
Date of Patent:
November 28, 2000
Assignee:
Lucent Technologies Inc.
Inventors:
Simon C. Borst, Sudheer A. Grandhi, Joe Huang, Colin L. Kahn, Krishnan Kumaran, Bulin B. Zhang
Abstract: The present invention includes a voltage control circuit having at least one voltage-controlled oscillator and at least one voltage controller connected to the voltage controlled oscillator. The voltage controller has at least one voltage input for supplying an input voltage to the voltage controller, a control signal input for supplying a control signal to the voltage controller, and a voltage output connected to the voltage controlled oscillator for supplying an output voltage thereto. The output voltage controls the delay of the voltage controller oscillator by supplying the control signal to the voltage controller.
Abstract: A device for dissipating thermal energy generated by an electrical circuit component to an air stream having a body which defines a first opening for receiving the air stream, a channel opening which communicates with the first opening and receives the air stream, in which the channel opening is reduced in dimension at a position downstream from the first opening providing an accelerated movement of the air stream, and a second opening which communicates with and is positioned downstream from the channel opening for discharging the air stream from the body. The body is secured in a position relative to the electrical circuit component enabling the accelerated air stream to communicate with the thermal energy generated by the electrical circuit component.
Abstract: A strain relief for an insulation displacement connector contains a cap section and a base section connected to the cap section at a pivot point. The cap section has at least one wire insertion channel and a first wall. The wire insertion channel has an entrance aperture which is in fluid communication with an exit aperture for passage therethrough in an insertion of an inserted wire. The exit aperture is contained in the first wall. The cap section is pivotally moveable between an open position which facilitates insertion of the wire into the cap section through the entrance aperture and out through the exit aperture, and a closed position. The base section has a side wall and a base hole or depression formed in the base section at the foot of the side wall. The base hole includes a wire stop portion at its bottom.
Type:
Grant
Filed:
December 21, 1998
Date of Patent:
November 28, 2000
Assignee:
Lucent Technologies Inc.
Inventors:
Bassel H. Daoud, Christopher M. Helmstetter, Antonio A. Figueiredo, Jason A. Kay, Walter Pelosi
Abstract: The present invention provides a method for conveying information over a communication network such as a Digital Loop Carrier network free of in-band signaling information for at least a portion of an established communication between at least two users so as to reduce the information error rate associated with the established communication.
Type:
Grant
Filed:
February 5, 1998
Date of Patent:
November 28, 2000
Assignee:
Lucent Technologies, Inc.
Inventors:
Gerald R. Boyer, Ronald Robert Brown, Eric A. Deichstetter, Jeffrey Louis Duffany, Phillip C. Goelz, Hoo-Yin Khoe, Dennis Loge, Joseph J. Kott, David Reagan Rice
Abstract: The invention provides an improved process for fabricating devices containing metallized magnetic ceramic material, such as inductors, transformers, and magnetic substrates. In particular, the unique vias utilized in the process of the invention allow fabrication of devices from multiple unfired ferrite layers with only a single via-coating step, thereby avoiding the need numerous punching steps. Moreover, there is no need for expanding the dimensions of the vias and thus no need for internal metallization. The invention therefore provides for green tape-type fabrication of devices such as inductors, transformers, and magnetic substrates in a manner faster, less complex, and more reliable than current methods. The invention also relates to use of an improved conductive material in such a process, the conductive material containing silver/palladium particles, ferrite particles, a cellulose-based or other organic binder, and a solvent.
Type:
Grant
Filed:
August 5, 1999
Date of Patent:
November 28, 2000
Assignee:
Lucent Technologies Inc.
Inventors:
Debra Anne Fleming, Gideon S. Grader, David Wilfred Johnson, Jr., Vincent George Lambrecht, Jr., John Thomson, Jr.