Abstract: A semiconductor device package includes a plurality of input leads, a plurality of transistor amplifier dies having inputs respectively coupled to the plurality of input leads, and a combined output lead configured to combine output signals received from the plurality of transistor amplifier dies and output a combined signal.

Abstract: Aspects of the present disclosure describe a voice coil actuated leaf spring prober that advantageously may be operated to probe every individual device (device under test—DUT) comprising a contemporary wafer. The prober according to aspects of the present disclosure includes one or more probe needles attached in an electrically isolated arrangement to an end of a horizontal-U-shaped, recurved, leaf spring arrangement. The prober includes—for example—a voice coil actuator positioned within the horizontal-U-shaped portion of the leaf spring which—when operated—results in leaf spring displacement and probe needle movement such that it may mechanically/electrically contact the DUT.

Abstract: Extrinsic structures formed outside the active regions of active devices can influence aging characteristics and performance of the active devices. An example integrated device including such an intrinsic structure includes a semiconductor device having an active region in a conduction layer, an isolation region in the conduction layer, an insulating layer formed over at least a portion of the active region and over at least a portion of the isolation region, a via outside the active region, and a conductive interconnect. The isolation region extends around the semiconductor device in an area outside the active region. The via extends through the insulating layer and down to the isolation region in the conduction layer, and the conductive interconnect is formed directly on the isolation region in the conduction layer.

Abstract: A system for receiving signals transmitted via serial links includes an equalizer for accessing a digitized communications signal and producing an equalized output signal, and a fast equalization module for determining output data corresponding to the communications signal. The fast equalization module includes a filter to access an output of the equalizer, a slicer module to access an output of the filter and produce a data output corresponding to the communications signal, a lookup table to provide filtering coefficients to the filter, and a coefficient improvement module to improve the coefficients based on an error signal from the filter. The coefficient improvement module is configured to update the coefficients in the lookup table.

Abstract: The present disclosure relates to optical phase modulation devices. The optical phase modulation devices may include a heater resistance which induces a phase change and control systems and methods of controlling the induced phase change.

Abstract: Semiconductor structures and devices in III-nitride materials are described herein, including material structures comprising III-nitride material regions (e.g., gallium nitride material regions). In certain cases, the material structures comprise substrates having relatively high electrical conductivities. In other cases, the material structures comprise substrates having relatively high resistivities. Certain embodiments include one or more features that reduce the degree to which thermal runaway occurs, which can enhance device performance including at elevated flange temperatures. Some embodiments include one or more features that reduce the degree of capacitive coupling exhibited during operation. For example, in some embodiments, relatively thick III-nitride material regions and/or relatively small ohmic contacts are employed.

Abstract: A semiconductor device package includes a plurality of input leads and an output lead, a plurality of transistor amplifier dies having inputs respectively coupled to the plurality of input leads, and a combination circuit configured to combine output signals received from the plurality of transistor amplifier dies and output a combined signal to the output lead.

Abstract: Various embodiments are disclosed for improved and structurally optimized transistors, such as RF power amplifier transistors. A transistor may include a drain metal portion raised from a surface of a substrate, a drain metal having a notched region, a gate manifold body with angled gate tabs extending from the gate manifold, and/or a source-connected shielding. The transistor may include a high-electron-mobility transistor (HEMT), a gallium nitride (GaN)-on-silicon transistor, a GaN-on-silicon-carbide transistor, or other type of transistor.

Abstract: New types, structures, and arrangements of capacitor networks for harmonic control and other purposes are presented. In one example, an integrated device includes a capacitor network and one or more power devices. The capacitor network includes a bond pad and metal-insulator-metal (MIM) capacitors. The capacitors include a first metal layer, a second metal layer, an insulator layer between the first and second metal layers, and one or more through-substrate vias. The first metal layer is coupled to the bond pad, and the second metal layer is coupled to a ground plane on a bottom side of the substrate by the vias. A number of capacitors can be arranged around the bond pad in the capacitor network for a tailored capacitance. A matching network in the integrated device can incorporate the capacitor network to reduce loss, provide better harmonic termination, and achieve better phase alignment for the power devices.

Abstract: Semiconductor structures with reduced parasitic capacitance between interconnects and ground, for example, are described. In one case, a semiconductor structure includes a substrate and a low dielectric constant material region in the substrate. The low dielectric constant material region is positioned between a first device area in the semiconductor structure and a second device area in the semiconductor structure. The semiconductor structure also includes a III-nitride material layer over the substrate. The III-nitride material layer extends over the substrate in the first device area, over the low dielectric constant material region, and over the substrate in the second device area. The semiconductor structure can also include a first device formed in the III-nitride material layer in the first device area, a second device in the III-nitride material layer in the second device area, and an interconnect formed over the low dielectric constant material region.

Abstract: Various aspects of Schottky diodes are described. The diodes are capable of withstanding reverse-bias voltages of up to and in excess of 2000 V with reverse current leakage as low as 0.4 microamp/millimeter in some cases among other aspects. In one example, a Schottky diode includes a conduction layer, a first layer over the conduction layer, a second layer over the first layer, a first cathode and a second cathode spaced apart and in electrical contact with the conduction layer, and an anode over the second layer between the first cathode and the second cathode. The first cathode and the second cathode can be electrically connected to each other as a cathode of the Schottky diode.

Abstract: An arrayed waveguide grating device includes an input coupler configured to receive a light signal and split the light signal into a plurality of output light signals. The device also includes a plurality of waveguides optically connected to the input coupler, each waveguide having a plurality of waveguide portions having respective sensitivities to variance in one or more parameters associated with operating of the optical arrayed grating device. Lengths of the respective portions are determined such that each waveguide applies a respective phase shift to the output light signal that propagates through the waveguide and the plurality of waveguides have at least substantially same change in phase shift with respective changes in the one or more parameters associated with operation of the device. An output coupler is optically connected to the plurality of waveguides to map respective light signals output from the plurality of waveguides to respective focal positions.

Abstract: An enhanced current mirror can be utilized to accurately control a bias current associated with an amplifier. A current controller component (CCC) can employ the enhanced current mirror and can be associated with the amplifier. The CCC can comprise a comparator that can compare an adjusted supply voltage level to a reference voltage level, the adjusted supply voltage level relating to a supply voltage level of a supply voltage supplied to the amplifier and CCC. The CCC can control switching of an operational state of a transistor of the comparator to switch in or out a resistance of a reference resistor component associated with the supply voltage, based on a result of the comparison of the adjusted supply voltage level to the reference voltage level, to facilitate accurately controlling an amount of bias current associated with the amplifier. The CCC and amplifier can be situated on the same die.

Abstract: Example polarization splitter and rotator devices are described. In one example, an optical apparatus includes a splitter configured to split a light signal into a first signal having a first polarization and a second signal having a second polarization, a polarization rotator configured to rotate the second polarization of the second signal into a third polarization, and a polarization mode converter configured to convert the third polarization of the second signal into the first polarization. In certain aspects of the embodiments, the splitter can be a curved multi-mode inference (MMI) polarization splitter, and the polarization rotator comprises input and output ports, with the output port being wider than the input port. The polarization mode converter can be an asymmetrical waveguide taper mode converter. The devices described herein can overcome the deficiencies of conventional devices and provide low insertion loss, flat and/or wide wavelength response, high fabrication tolerance, and compact size.

Abstract: A multi-stage driver circuit has a transmission line coupled to an output of the multi-stage driver circuit. The transmission line has inductive elements and programmable capacitive elements selected to shape the transmitted data signal. The programmable capacitive elements have a first capacitor with a first terminal coupled to a first power supply conductor, and a first transistor with a first conduction terminal coupled to a second terminal of the first capacitor, and a second conduction terminal coupled to a second power supply conductor. The programmable capacitive elements have a register with a first output coupled to a control terminal of the first transistor. The programmable capacitive elements are selected to shape the transmitted data signal by observing operational dynamics of the multi-stage driver circuit.

Abstract: Low-load-modulation, broadband power amplifiers and method of use are described. The amplifiers can include multiple amplifiers connected in parallel to amplify a signal that has been divided into parallel circuit branches. One of the amplifiers can operate as a main amplifier in a first amplification class and the remaining amplifiers can operate as peaking amplifiers in a second amplification class. The main amplifier can see low modulation of its load between the fully-on and fully backed-off states of the amplifier. With lower load modulation, the power amplifiers described herein exhibit better power-handling capability and RF fractional bandwidth as compared to conventional amplifiers.

Abstract: High power transistors, such as high power gallium nitride (GaN) transistors, are described. These high power transistors have larger total gate widths than conventional high power transistors by arranging multiple linear arrays of contacts in parallel. Thereby, the total gate width and the power rating of a high power transistor may be increased without elongating the die of the high power transistor. Accordingly, the die of the high power transistor may be mounted in a smaller circuit package relative to conventional dies with the same power rating.

Abstract: A tracking detector device for use in a free-space optics (FSO) system includes a position sensor and an optical receiver coupled to the bottom surface of the position sensor. The position sensor has an optical aperture configured to allow a portion of incoming light to pass through the position sensor and a plurality of position receivers located adjacent to the optical aperture and configured to sense portions of the incoming light. The tracking detector device may also include a focusing optic disposed adjacent to the bottom surface of the position sensor and configured to focus the portion of the incoming light that passed through the position sensor onto the optical receiver. The tracking detector may advantageously be employed in FSO communications systems and provide fully automated alignment with an incoming light beam under computer control.

Abstract: A system to control convergence of a loop to a reference value. A device, under control of the control loop, generates an output signal. A comparator compares the output signal to a reference value. Responsive to the output signal being less than the reference value, outputting an up signal and, responsive to the output signal being greater than the reference value, outputting a down signal. A counter is configured to maintain a counter value which is incremented in response to an up signal and decremented in response to a down signal. The counter outputs a gain control value. An up/down signal tracker is configured to track a pattern of up signals and down signals and compare the tracked pattern to one or more predetermined patterns such that, responsive to the up signals and down signals matching one of the one or more predetermined patterns, the counter size is decreased.

Abstract: Apparatus and methods for an inverted Doherty amplifier operating at gigahertz frequencies are described. RF fractional bandwidth and signal bandwidth may be increased over a conventional Doherty amplifier configuration when impedance-matching components and an impedance inverter in an output network of the inverted Doherty amplifier are designed based on characteristics of the main and peaking amplifier and asymmetry factor of the amplifier.