Abstract: Apparatus and methods for an inverted Doherty amplifier operating at gigahertz frequencies are described. RF fractional bandwidth and signal bandwidth may be increased over a conventional Doherty amplifier configuration when impedance-matching components and an impedance inverter in an output network of the inverted Doherty amplifier are designed based on characteristics of the main and peaking amplifier and asymmetry factor of the amplifier.

Abstract: An acoustic wave resonator has a first conductive layer, piezoelectrical material formed over the first conductive layer, and second conductive layer formed over the piezoelectric material. An alignment of the first conductive layer, piezoelectric material and second conductive area defines an active region of the resonator and the active region includes a core area and a plurality of fractals extending from or recessed into the core area. The fractals maximize a perimeter-to-area ratio of the active region of the resonator. The fractals increase electromechanical coupling and a quality factor of the resonator. The fractals can have a star shape, rounded shape, asymmetric shape, or other shape that optimizes the perimeter-to-area ratio of the active region to maximize performance of the resonator. A frame can be disposed over or within the piezoelectric material. The frame is raised above the second conductive layer or recessed below the second conductive layer.

Abstract: A multi-level optical signal is sampled to generate an eye diagram. The signal can be adjusted when eyes in the eye diagram have different heights. More specifically, a first value is determined, and the height of a first eye is adjusted using the first value. The first value is multiplied by a stored factor to produce a second value, and the height of a second eye is adjusted using the second value, and so on for other eyes. As a result, eye heights are the same. Similarly, optical power levels of the signal can be adjusted when the levels are not equally spaced. As a result, the optical power levels are equally spaced.

Abstract: Optical waveguides may include a substrate and a silicon based optical waveguide supported on the substrate. The silicon based optical waveguide may include a central ridge portion and a plurality of spaced apart wing portions connected through connecting portions. The number of wing portions may be greater than two. The central ridge portion may have a central ridge lateral width extent greater than a lateral width extent of at least one of the wing portions. Optical waveguides may include a substrate, a silicon based optical waveguide supported on the substrate, and a concentrator supported on the substrate and positioned within a lateral width extent of the silicon based optical waveguide and outside of a height extent of the silicon based optical waveguide. The optical waveguides may be included as part of an optical modulator.

Abstract: An arrayed waveguide grating device includes an input coupler configured to receive a light signal and split the light signal into a plurality of output light signals. The device also includes a plurality of waveguides optically connected to the input coupler, each waveguide having a plurality of waveguide portions having respective sensitivities to variance in one or more parameters associated with operating of the optical arrayed grating device. Lengths of the respective portions are determined such that each waveguide applies a respective phase shift to the output light signal that propagates through the waveguide and the plurality of waveguides have at least substantially same change in phase shift with respective changes in the one or more parameters associated with operation of the device. An output coupler is optically connected to the plurality of waveguides to map respective light signals output from the plurality of waveguides to respective focal positions.

Abstract: Apparatus and methods relating to heterolithic microwave integrated circuits HMICs are described. An HMIC can include different semiconductor devices formed from different semiconductor systems in different regions of a same substrate. An HMIC can also include bulk regions of low-loss electrically-insulating material extending through the substrate and located between the different semiconductor regions. Passive RF circuit elements can be formed on the low-loss electrically-insulating material.

Abstract: A semiconductor device has an amplifier and common mode suppression (CMS) circuit formed on a common substrate. The CMS circuit has a first input and second input coupled for receiving an input signal and further has a first output coupled to a first input of the amplifier and a second output coupled to a second input of the amplifier to reduce common mode. The CMS circuit further has a ground plane, a first conductive trace disposed over the ground plane and coupled between the first input and first output, second conductive trace disposed over the ground plane and coupled between the second input and second output, and third conductive trace disposed over the ground plane with a first end of the third conductive trace coupled to the ground plane and a second end of the third conductive trace open circuit to form a resonator.

Abstract: Semiconductor structures and methods of forming semiconductor structures that inhibit the conductivity of parasitic channels are described. In one example, a semiconductor structure includes a semiconductor substrate and a III-nitride material region over a top surface of the semiconductor substrate. The semiconductor substrate includes a bulk region below the top surface and a parasitic channel that extends to a depth from the top surface toward the bulk region of the semiconductor substrate. The parasitic channel comprises a first region and a second region. The first region of the parasitic channel comprises an implanted species having a relative atomic mass of less than 5, and the second region of the parasitic channel is free from the implanted species or the implanted species is present in the second region at a concentration that is less than in the first region.

Abstract: Apparatus and methods for an improved-efficiency Doherty amplifier are described. The Doherty amplifier may include a two-stage peaking amplifier that transitions from an “off” state to an “on” state later and more rapidly than a single-stage peaking amplifier used in a conventional Doherty amplifier. The improved Doherty amplifier may operate at higher gain values than a conventional Doherty amplifier, with no appreciable reduction in signal bandwidth.

Abstract: A combined error checker and sequence generator which shares a LFSR is disclosed which reduces complexity, cost, and area required for implementation while also improving timing margin. A clock and data recovery system recovers a data signal received over a channel from a remote transceiver. Control logic selects different modes of operation of the system. An error detector compares the two sequence signals and records errors in response to differences between the two sequence signals. A sequence generator generates a sequence signal for use by the error detector as a reference sequence signal or for transmission to a remote transceiver. The system includes one or more switching elements configured to selectively route the generated sequence as feedback into the sequence generator or the received sequence signal into the sequence generator subject to whether the combined error checker and sequence generator is in error checker mode or sequence generator mode.

Abstract: A system for transmitting signals via serial links includes a plurality of lanes for combining data onto a transmission media, a skew detector configured to detect skew among two of the plurality of lanes, and a variable delay circuit controlled by the skew detector, configured to delay the start of a clock signal to circuitry of one of the plurality of lanes.

Abstract: An amplifier circuit is capable of switching between a unipolar output voltage domain and a bipolar output voltage domain. The amplifier circuit comprises an operational amplifier with a feedback circuit that is configurable using switches. By controlling the switches, the amplifier's feedback circuit can switched between two different arrangements having a positive and a negative signal gain, respectively. The amplifier circuit is designed such that the noise gain is the same in both operating modes, allowing a single noise compensation approach to be used for both operating modes. Since configurability of the circuit is achieved using static switches, the amplifier circuit maintains high accuracy and experiences no appreciable impact on power consumption as a result of implementing the switching.

Abstract: Optical waveguides may include a substrate and a silicon based optical waveguide supported on the substrate. The silicon based optical waveguide may include a central ridge portion and a plurality of spaced apart wing portions connected through connecting portions. The number of wing portions may be greater than two. The central ridge portion may have a central ridge lateral width extent greater than a lateral width extent of at least one of the wing portions. Optical waveguides may include a substrate, a silicon based optical waveguide supported on the substrate, and a concentrator supported on the substrate and positioned within a lateral width extent of the silicon based optical waveguide and outside of a height extent of the silicon based optical waveguide. The optical waveguides may be included as part of an optical modulator.

Abstract: Circuits for protecting devices, such as gallium nitride (GaN) devices, and operating methods thereof are described. The circuits monitor a magnitude of the current in a device and reduce the magnitude of the current and/or shut down the device responsive to the magnitude of the current exceeding a threshold. These circuits safeguard devices from damaging operating conditions to prolong the operating life of the protected devices.

Abstract: Apparatus and methods for a modified Doherty amplifier operating at gigahertz frequencies are described. The combining of signals from a main amplifier and a peaking amplifier occur prior to impedance matching of the amplifier's output to a load. An output impedance-matching element can be relied upon. In one example, the output impedance-matching element can include an output strip line, a shunt capacitor connected between the output strip line and ground, an output capacitor connected between the output strip line and an output bonding pad, and an inductive strip line connected between the output bonding pad and ground.

Abstract: Apparatus and methods for a multiclass, broadband, no-load-modulation power amplifier are described. The power amplifier (500) may include a main amplifier (532) operating in a first amplification class and a plurality of peaking amplifiers (536, 537, 538) operating in a second amplification class. The main amplifier (532) and peaking amplifiers (536, 537, 538) may operate in parallel on portions of signals derived from an input signal to be amplified. The main amplifier (532) may see no modulation of its load impedance between a fully-on state of the power amplifier (all amplifiers amplifying) and a fully backed-off state (peaking amplifiers idle). By avoiding load modulation, the power amplifier (500) can exhibit improved bandwidth and efficiency compared to conventional Doherty amplifiers.

Abstract: Apparatus and methods for a low-load-modulation power amplifier are described. Low-load-modulation power amplifiers can include multiple amplifiers connected in parallel to amplify a signal that has been divided into parallel circuit branches. One of the amplifiers can operate as a main amplifier in a first amplification class and the remaining amplifiers can operate as peaking amplifiers in a second amplification class. The main amplifier can see low modulation of its load between the power amplifier's fully-on and fully backed-off states. Improvements in bandwidth and drain efficiency over conventional Doherty amplifiers are obtained.

Abstract: A number of monolithic diode limiter semiconductor structures are described. The diode limiters can include a hybrid arrangement of diodes with different intrinsic regions, all formed over the same semiconductor substrate. In one example, a method of manufacture of a monolithic diode limiter includes providing an N-type semiconductor substrate, providing an intrinsic layer on the N-type semiconductor substrate, implanting a first P-type region to a first depth into the intrinsic layer, implanting a second P-type region to a second depth into the intrinsic layer, and forming at least one passive circuit element over the intrinsic layer. The method can also include forming an insulating layer on the intrinsic layer, forming a first opening in the insulating layer, and forming a second opening in the insulating layer. The method can also include implanting the first P-type region through the first opening and implanting the second P-type region through the second opening.

Abstract: A multicomponent network may be added to a transmission line in a high-frequency circuit to transform a first impedance of a downstream circuit element to second impedance that better matches the impedance of an upstream circuit element. The multicomponent network may be added at a distance more than one-quarter wavelength from the downstream circuit element, and can tighten a frequency response of the impedance-transforming circuit to maintain low Q values and low VSWR values over a broad range of frequencies.

Abstract: A method involving a barrier for preventing eutectic break-through in through-substrate vias is disclosed. The method generally includes steps (A) to (D). Step (A) may form one or more vias through a substrate. The substrate generally comprises a semiconductor. Step (B) may form a first metal layer. Step (C) may form a barrier layer. The barrier layer generally resides between the vias and the first metal layer. Step (D) may form a second metal layer. The second metal layer may be in electrical contact with the first metal layer through the vias and the barrier layer.