Patents Assigned to Mellanox Technologies Ltd.
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Publication number: 20250020876Abstract: Various embodiments of silicon photonic (SiP) chips are provided that are configured for backside or frontside optical fiber coupling. An SiP chip includes a photonic integrated circuit formed on a first surface of a first substrate. The photonic integrated circuit includes at least one optical component and at least one coupling element. The at least one optical component is configured to propagate an optical signal therethrough in a waveguide propagation direction that is substantially parallel to a plane defined by the first surface. The at least one coupling element is configured to couple an optical signal propagating along an optical path transverse to the waveguide propagation direction into the at least one optical component to enable the backside or frontside coupling of an optical fiber to the SiP chip.Type: ApplicationFiled: September 26, 2024Publication date: January 16, 2025Applicant: Mellanox Technologies, Ltd.Inventors: Barak FREEDMAN, Henning LYSDAL, Amir SILBER, Nizan MEITAV
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Publication number: 20250024606Abstract: Electronic devices, electronic modules, and methods for manufacturing electronic devices and/or electronic modules are described herein. In some embodiments, the present invention may be directed to an electronic module that includes a pair of printed circuit boards (PCBs) and a capacitor positioned between the PCBs. Each of the PCBs may include a pair of vias configured to provide electrical connections through the PCB, and the capacitor may include a pair of pins. Each pin of the capacitor may be aligned with a via of one of the PCBs and a corresponding via of the other PCB such that each pin is configured to provide electrical connection between the two PCBs. Additionally, the pair of pins may be configured to support the PCBs with respect to each other.Type: ApplicationFiled: October 2, 2024Publication date: January 16, 2025Applicant: MELLANOX TECHNOLOGIES, LTD.Inventors: Xiuzhuang YANG, Huiying CHEN, Weibin HE, Di WU
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Patent number: 12200095Abstract: Technologies for jitter extraction are described. A receiver device includes an analog-to-digital converter (ADC) and a signal processing circuit. The signal processing circuit includes an equalizer block to output current data based on samples from the ADC. A clock-recovery (CR) block includes a timing error detector (TED) or a phase detector to measure a sampling offset. The CR block can use the sampling offset to control sampling of subsequent data by the ADC. A jitter extraction block can use the sampling offset to re-sample the current data to obtain re-sampled data based on the sampling offset to remove jitter from the current data.Type: GrantFiled: June 23, 2022Date of Patent: January 14, 2025Assignee: Mellanox Technologies, Ltd.Inventor: Johan Jacob Mohr
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Publication number: 20250012971Abstract: An optical interconnect device and the method of fabricating it are described. The device includes an in-plane laser cavity transmitting a light beam along a first direction, a Franz Keldysh (FK) optical modulator transmitting the light beam along the first direction, a mode-transfer module including a tapered structure disposed after the FK optical modulator along the first direction to enlarge the spot size of the light beam to match an external optical fiber and a universal coupler controlling the light direction. The tapered structure can be made linear or non-linear along the first direction. The universal coupler passes the laser light to an in-plane external optical fiber if the fiber is placed along the first direction, or it is a vertical coupler in the case that the external optical fiber is placed perpendicularly to the substrate surface. The coupler is coated with highly reflective material.Type: ApplicationFiled: September 17, 2024Publication date: January 9, 2025Applicant: MELLANOX TECHNOLOGIES, LTD.Inventors: Elad MENTOVICH, Dimitrios KALAVROUZIOTIS, Jonathan LUFF, Wei QIAN, Dazeng FENG
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Patent number: 12189262Abstract: An optoelectronic device (20) includes thin film structures (56) disposed on a semiconductor substrate (54) and patterned to define components of an integrated drive circuit, which is configured to generate a drive signal. A back end of line (BEOL) stack (42) of alternating metal layers (44, 46) and dielectric layers (50) is disposed over the thin film structures. The metal layers include a modulator layer (48), which contains a plasmonic waveguide (36, 99, 105) and a plurality of electrodes (30, 32, 34, 96, 98, 106), which apply a modulation to surface plasmons polaritons (SPPs) propagating in the plasmonic waveguide in response to the drive signal. A plurality of interconnect layers are patterned to connect the thin film structures to the electrodes.Type: GrantFiled: June 10, 2019Date of Patent: January 7, 2025Assignees: MELLANOX TECHNOLOGIES, LTD., ETH ZURICH, ARISTOTLE UNIVERSITY OF THESSALONIKIInventors: Claudia Hoessbacher, Juerg Leuthold, Elad Mentovich, Paraskevas Bakopoulos, Dimitrios Kalavrouziotis, Dimitrios Tsiokos
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Patent number: 12192122Abstract: A device includes ports, a packet processor, and a memory management circuit. The ports communicate packets over a network. The packet processor processes the packets using queues. The memory management circuit maintains a shared buffer in a memory and adaptively allocates memory resources from the shared buffer to the queues, maintains in the memory, in addition to the shared buffer, a shared-reserve memory pool for use by the queues, identifies, among the queues, a queue that requires additional memory resources, the queue having an occupancy that is (i) above a current value of a dynamic threshold, rendering the queue ineligible for additional allocation from the shared buffer, and (ii) no more than a defined margin above the current value of the dynamic threshold, rendering the queue eligible for allocation from the shared-reserve memory pool, and allocates memory resources to the identified queue from the shared-reserve memory pool.Type: GrantFiled: February 20, 2024Date of Patent: January 7, 2025Assignee: MELLANOX TECHNOLOGIES, LTD.Inventors: Niv Aibester, Barak Gafni
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Patent number: 12192082Abstract: Methods, systems, and computer program products to generate a telemetry pipeline. In embodiments, the system includes a communication interface that receives one or more user-defined functions for the telemetry pipeline. The system also includes control logic that implements programmatically the one or more user-defined functions to collect telemetry data at a plurality of layers in the telemetry pipeline based on the one or more user-defined functions and calculate smart metrics at different layers of the plurality of layers in the telemetry pipeline. The smart metrics may be calculated at a layer closest to where associated telemetry data is collected.Type: GrantFiled: August 9, 2023Date of Patent: January 7, 2025Assignee: MELLANOX TECHNOLOGIES, LTD.Inventors: Ran Sandhaus, Vladimir Shalikashvili, Ortal Bashan
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Publication number: 20250004200Abstract: An optical interconnect device and the method of fabricating it are described. The device includes an in-plane laser cavity transmitting a light beam along a first direction, a Franz Keldysh (FK) optical modulator transmitting the light beam along the first direction, a mode-transfer module including a tapered structure disposed after the FK optical modulator along the first direction to enlarge the spot size of the light beam to match an external optical fiber and a universal coupler controlling the light direction. The tapered structure can be made linear or non-linear along the first direction. The universal coupler passes the laser light to an in-plane external optical fiber if the fiber is placed along the first direction, or it is a vertical coupler in the case that the external optical fiber is placed perpendicularly to the substrate surface. The coupler is coated with highly reflective material.Type: ApplicationFiled: September 12, 2024Publication date: January 2, 2025Applicant: MELLANOX TECHNOLOGIES, LTD.Inventors: Elad MENTOVICH, Dimitrios KALAVROUZIOTIS, Jonathan LUFF, Wei QIAN, Dazeng FENG
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Publication number: 20250007856Abstract: A system and method for performing routing in a computer network implementing in-network computing, including: obtaining information regarding compute resources allocated to an in-network compute operation; and allocating a path and bandwidth for ordinary network traffic based on the allocated compute resources.Type: ApplicationFiled: June 27, 2023Publication date: January 2, 2025Applicant: Mellanox Technologies, Ltd.Inventors: Yishai OLTCHIK, Michael GANDEL GANDELMAN MILGROM, Omer SHABTAI
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Patent number: 12182563Abstract: A peripheral device includes a bus interface, a first processor and a second processor. The bus interface is to communicate over a peripheral bus. The first processor is to manage communication over the peripheral bus by executing bus-maintenance software code, the bus-maintenance software code being executed from one or more first layers of a multi-layer memory. The second processor is to update the bus-maintenance software code from an existing version to an updated version, by (i) loading the updated version to one or more second layers of the multi-layer memory, higher in hierarchy than the one or more first layers, and (ii) invalidating the existing version in the one or more first layers, thereby forcing fetching of the updated version from the one or more second layers to the one or more first layers and to start executing the updated version.Type: GrantFiled: January 3, 2023Date of Patent: December 31, 2024Assignee: MELLANOX TECHNOLOGIES, LTD.Inventor: Yair Chasdai
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Patent number: 12182075Abstract: Systems, computer program products, and methods are described herein for intelligent data compression, in accordance with an embodiment of the invention. The present invention may be configured to receive a plurality of files for storage in a database and perform a series of steps iteratively, for each file of the plurality of files, and until each file of the plurality of files is represented in the database. The series of steps may include identifying one or more data points in the respective file, where each identified data point was previously unidentified in the database and adding the identified one or more data points to the database. The series of steps may also include identifying one or more features of the respective file for storage in the database and storing the identified one or more features in the database as a surrogate for the respective file.Type: GrantFiled: January 3, 2023Date of Patent: December 31, 2024Assignee: Mellanox Technologies, Ltd.Inventors: Siddha Ganju, Itamar Frenkel, Elad Mentovich, Rotem Barzilai, Yaakov Gridish
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Patent number: 12184453Abstract: A receiver device includes circuitry to measure an error vector of a pulse amplitude modulation (PAM) sequence in a signal received from a transmitter and control logic coupled to the circuitry. The control logic removes estimated linear components from the measured error vector to generate a non-linear error vector. The control logic further determines, with reference to a set of lookup table (LUT) values, one or more tuning parameters for the PAM sequence based on the non-linear error vector and modifies the set of LUT values according to the one or more tuning parameters. The control logic further provides the modified set of LUT values to the transmitter, which when used by the transmitter to add digital pre-distortion to the PAM sequence, causes the non-linear error to be at least partially removed from the signal.Type: GrantFiled: May 2, 2023Date of Patent: December 31, 2024Assignee: Mellanox Technologies, Ltd.Inventors: Bjarke Vad-Miller, Johan Jacob Mohr
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Patent number: 12182394Abstract: A method and system are provided for limiting unnecessary data traffic on the data communication connections connecting various system components, including the various levels of system memory. Some embodiments may include processing a buffer allotment request and/or a buffer release command in coordination with a system or network operation requiring temporary storage of data in a memory buffer. The buffer allotment request may be capable of indicating the amount of storage space required on the memory buffer to execute the system or network operation. The system may be capable of precluding the system or network operation from executing until there is sufficient space in the memory buffer to complete the operation without evicting operational data from the memory buffer. In some embodiments, the buffer release command may signal completion of the system or network operation and release of the utilized memory buffer space for other operations.Type: GrantFiled: April 7, 2022Date of Patent: December 31, 2024Assignee: Mellanox Technologies, Ltd.Inventors: Yamin Friedman, Idan Burstein, Gal Yefet
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Patent number: 12184689Abstract: In one embodiment, a device, includes a network interface to receive a SYN packet from a client via a packet data network to establish a connection with a server, and a processor to run an express data path (XDP) to accelerate at least a part of a SYN cookie connection process.Type: GrantFiled: June 2, 2022Date of Patent: December 31, 2024Assignee: MELLANOX TECHNOLOGIES, LTD.Inventors: Maksym Mykytianskyi, Ron Yuval Efraim, Yossi Kuperman
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Patent number: 12174765Abstract: Methods, systems, and devices for message signaled interrupt (MSI-X) tunneling on a host device exposed by a bridge connection are described. A device may receive data and a first interrupt signal from a remote destination over a network protocol. The device may receive the data and/or the first interrupt signal over the bridge connection, via a tunneled communication from the remote destination. The device may generate a second interrupt signal based on the first interrupt signal and a local interrupt configuration provided by a system bus driver of the device. The device may inject the data and the second interrupt signal over the system bus. Injecting the data and injecting the second interrupt signal may include ensuring the data is made available to the system bus driver, prior to the interrupt handler receiving the second interrupt signal.Type: GrantFiled: March 29, 2022Date of Patent: December 24, 2024Assignee: MELLANOX TECHNOLOGIES, LTD.Inventors: Daniel Marcovitch, Liran Liss, Rabia Loulou, Aviad Yehezkel
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Patent number: 12177322Abstract: A parsing apparatus includes a packet-type identification circuit and a parser. The packet-type identification circuit is to receive a packet to be parsed, and to identify a packet type of the packet by extracting a packet-type identifier from a defined field in the packet. The parser is to store one or more parsing templates that specify parsing of one or more respective packet types. When the packet type of the packet corresponds to a parsing template among the stored parsing templates, the parser is to parse the packet in accordance with the stored parsing template. When the packet type of the packet does not correspond to any of the stored parsing templates, the parser is to parse the packet using an alternative parsing scheme.Type: GrantFiled: May 10, 2023Date of Patent: December 24, 2024Assignee: MELLANOX TECHNOLOGIES, LTD.Inventors: Gil Levy, Liron Mula, Barak Gafni
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Patent number: 12177325Abstract: A communication system includes at least one send queue, containing send queue entries pointing to packets to be transmitted over a network by packet sending circuitry. A clock work queue contains clock queue entries to synchronize sending times of the packets pointed to by the send queue entries. At least one arming queue contains arming queue entries to arm the clock work queue at selected time intervals.Type: GrantFiled: November 30, 2023Date of Patent: December 24, 2024Assignee: MELLANOX TECHNOLOGIES, LTD.Inventors: Dotan David Levi, Ariel Shahar, Shahaf Shuler, Ariel Almog, Eitan Hirshberg, Natan Manevich
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Patent number: 12174238Abstract: A wafer includes a semiconductor substrate, multiple photonics devices and a test coupler. The multiple photonics devices are fabricated on the substrate and have multiple respective ports. The test coupler is disposed on the wafer and is configured to couple an optical test signal between a tester and the multiple ports of the multiple photonics devices during testing of the photonics devices.Type: GrantFiled: September 1, 2021Date of Patent: December 24, 2024Assignee: MELLANOX TECHNOLOGIES, LTD.Inventors: Amir Silber, Barak Freedman, Nizan Meitav, Santiago Echeverri, Jochem Verbist, Allan Green-Petersen
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Patent number: 12177039Abstract: A method includes providing a plurality of processes interconnected by a network, each of the plurality of processes being configured to hold a block of data destined for others of the plurality of processes. A set of data for all-to-all data exchange is received from one or more of the processes. The set of data is configured as a plurality of blocks of data in a matrix as matrix data, the matrix being distributed among the plurality of processes. The matrix data is transposed by changing the position of selected blocks of data of the plurality of blocks of data relative to the other blocks of data of the plurality of the blocks of data, without changing the structure of each of the blocks of data. The transposed matrix data is over the network and is then received, repacked, and conveyed to destination processes.Type: GrantFiled: November 19, 2023Date of Patent: December 24, 2024Assignee: MELLANOX TECHNOLOGIES, LTD.Inventors: Richard Graham, Lion Levi, Gil Bloch, Daniel Marcovitch, Noam Bloch, Yong Qin, Yaniv Blumenfeld, Eitan Zahavi
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Patent number: 12176945Abstract: A transceiver module for providing operational resilience is presented. The transceiver module is configured to receive first data via a first optical module in a first configuration of operation and detect, using an adapter that is operationally connected to the first optical module, an operational failure of the first optical module. In response to detecting the operational failure, the transceiver module is configured to switch, via the adapter, from the first configuration of operation to a second configuration of operation by: automatically engaging a second optical module; triggering the first data that was initially directed into a first input port of the first optical module to be directed into a second input port of the second optical module; and receiving the first data from a second output port of the second optical module.Type: GrantFiled: July 21, 2022Date of Patent: December 24, 2024Assignee: Mellanox Technologies, Ltd.Inventors: Paraskevas Bakopoulos, Ioannis (Giannis) Patronas, Nikolaos Argyris, Dimitrios Syrivelis, Elad Mentovich, Dimitrios Kalavrouziotis, Avraham Ganor, Nimer Hazin