Abstract: A network device (ND) includes packet processing circuitry and performance optimization circuitry. The packet processing circuitry is connected to a network and is configured to process communication packets for communicating over the network. The packet processing circuitry includes a plurality of configuration registers for setting one or more operation parameters of the ND. The performance optimization circuitry is configured to improve a performance measure of the ND by iteratively calculating the performance measure and adjusting values of one or more of the configuration registers based on the performance measure.

Abstract: A network device includes one or more communication ports, a packet processing circuit and an activity evaluation circuit. The one or more communication ports are configured to communicate packets over a network. The packet processing circuit is configured to process the packets. The activity evaluation circuit is configured to generate a sequence of multiple evaluation times independently of the packets, and, for each evaluation time among at least some of the evaluation times in the sequence, for any packet that is processed by the packet processing circuit at the evaluation time, to identify a session to which the packet belongs and issue an increment event associated with the identified session.

Abstract: In one embodiment, a network interface card device includes communication interfaces to provide data connection with respective local devices configured to run respective clock synchronization clients, at least one network interface to provide data connection between a packet data network and ones of the local devices, and a hardware clock to maintain a time value, and serve the clock synchronization clients.

Abstract: A network element includes multiple ports and a packet classifier. The packet classifier is configured to receive rules and Rule Patterns (RPs), each RP corresponding to a subset of the rules and specifies positions of unmasked packet-header bits to be matched by the rules in the subset, to store in a RAM a grouping of the RPs into Extended RPs (ERPs), each ERP defining a superset of the unmasked bits in the RPs associated therewith, to receive packets and match each packet to one or more of the rules by accessing the ERPs in the RAM, to determine counter values, each counter value corresponding to a respective RP and is indicative of a number of the received packets that match the RP, and to adaptively modify grouping of the RPs into the ERPs depending on the counter values.

Abstract: In one embodiment, a communication apparatus includes a network interface configured to receive over a network a sequence of data packets of a network flow having a defined packet order, wherein the network interface is configured to receive an out-of-order data packet, a timer, and packet processing circuitry configured to activate the timer responsively to receiving the out-of-order data packet.

Abstract: Apparatus for global policing of a bandwidth of a flow, the apparatus including a network device including a local policer configured to perform bandwidth policing on the flow within the network device, and a communications module configured to: send local policer state information from the local policer to a remote global policer, and receive policer state information from the remote global policer and update the local policer state information based on the remote global policer state information, Related apparatus and methods are also provided.

Abstract: A system, switch device, and method of operating a switch device are provided. An illustrative system is disclosed to include a first router block configured to receive a first type of Remote Direct Memory Access (RDMA) packet, a second router block configured to receive a second type of RDMA packet, and a gateway positioned between the first router block and the second router block. The gateway may be configured to translate the first type of RDMA packet received from the first router block for transmission as the second type of RDMA packet by the second router block.

Abstract: A network device includes at least one communication ingress port, ingress packet processing circuitry and a packet-action cache memory (PACM). The at least one communication ingress port is configured to receive packets including packet headers from a network. The ingress packet processing circuitry is configured to receive the packets and to process the packets in accordance with respective packet actions specified for the packets. The PACM is configured to store one or more of the packet actions in association with one or more respective fingerprints which are calculated over the packet headers of the corresponding packets, for use by the ingress packet processing circuitry. The fingerprints are smaller than the corresponding packet headers.

Abstract: A method, system and paint for suppressing emission of high frequency electromagnetic radiation from an electronic system, the electronic system including at least one power supply unit, at least one printed circuit board (PCB) and at least one integrated circuit are provided. The method includes providing an electrically conductive housing configured to accommodate and encase the electronic system, the housing having an inner conductive surface, and applying a layer of an electromagnetic absorbing paint to the inner conductive surface of the housing to substantially cover the inner surface by the layer, the electromagnetic absorbing paint comprises a liquid matrix and an electromagnetic absorbing material.

Abstract: A network element includes multiple ports configured to communicate over a network, a buffer memory, a snapshot memory, and circuitry. The circuitry is configured to forward packets between the ports, to temporarily store information associated with the packets in the buffer memory, to continuously write at least part of the information to the snapshot memory concurrently with storage of the information in the buffer memory, and, in response to at least one predefined diagnostic event, to stop writing of the information to the snapshot memory, so as to create in the snapshot memory a coherent snapshot corresponding to a time of the diagnostic event.

Abstract: In one embodiment, a packet processing apparatus includes interfaces, a memory to store a representation of a routing table as a binary search tree of address prefixes, and store a marker with an embedded prefix including k marker bits providing a marker for an address prefix of a node corresponding to a prefix length greater than k, and n additional bits, such that the k marker bits concatenated with the n additional bits provide another address prefix, packet processing circuitry configured upon receiving a data packet having a destination address, to traverse the binary search tree to find a longest prefix match, compare a key with the k marker bits, extract an additional n bits from the destination address, and compare the extracted n bits with the n additional bits, and process the data packet in accordance with a forwarding action indicated by the longest prefix match.

Abstract: A signal processing method includes receiving a digital signal including a sequence of samples. For each sample among at least some of the samples, a neighbor-based estimate is calculated over (i) one or more samples that precede the sample in the sequence and (ii) one or more samples that succeed the sample in the sequence, and an error value, indicative of a deviation of the neighbor-based estimate from an actual value of the sample, is calculating. An impairment in the digital signal is estimated based on a plurality of error values calculated for a plurality of the samples.

Abstract: A system includes a host processor, which has a host memory and is coupled to store data in a non-volatile memory in accordance with a storage protocol. A network interface controller (NIC) receives data packets conveyed over a packet communication network from peer computers containing, in payloads of the data packets, data records that encode data in accordance with the storage protocol for storage in the non-volatile memory. The NIC processes the data records in the data packets that are received in order in each flow from a peer computer and extracts and writes the data to the host memory, and when a data packet arrives out of order, writes the data packet to the host memory without extracting the data and processes the data packets in the flow so as to recover context information for use in processing the data records in subsequent data packets in the flow.

Abstract: A peripheral device includes a bus interface and circuitry. The bus interface is configured to connect to a peripheral bus for communicating with a host in accordance with a peripheral-bus specification that specifies a physical reset signal asserted by the host. The circuitry is configured to execute predefined logic that evaluates a reset condition that is indicative of imminent assertion of the physical reset signal by the host, and to perform a reset procedure in response to meeting the reset condition.

Abstract: Optical communication modules and associated methods and computer program products for performing network communication security are provided. An example optical module includes a substrate, a first optoelectronic component supported by the substrate configured for operation with optical signals having a first wavelength, and a second optoelectronic component supported by the substrate configured for operation with optical signals having a second wavelength. The module further includes an optical communication medium defining a first end in optical communication with the first optoelectronic component and the second optoelectronic component and a second end. The module also includes security circuitry operably connected with the first optoelectronic component and the second optoelectronic component. The security circuitry determines the presence of a noncompliant component coupled with the optical communication medium at the second end based upon operation of the second optoelectronic component.

Abstract: A universal replaceable fan unit and method of reversing an airflow direction of a universal replaceable fan unit is provided. The universal replaceable fan unit includes a fan assembly designed to create an airflow from an intake end to an output end. The universal replaceable fan unit also includes a fan mounting that receives and secures the fan assembly in an operable position. The fan mounting includes a frame member and a securing member. The fan mounting is designed to allow the fan assembly to be moved between a first position defining a first airflow direction and a second position defining a second airflow direction. The first airflow direction is opposite the second airflow direction. The universal replaceable fan unit further includes an electrical connector removably attached to the fan assembly. The electrical connector allows electricity to be provided to the fan assembly for operation.

Abstract: A package includes a light emitting portion configured to emit light, a lens including a first lens surface and a second lens surface, a protective layer between the light emitting portion and the first lens surface and that shields the first lens surface from a surrounding environment, and an optical component that redirects light output from the second lens surface. The first lens surface is configured to receive the emitted light from the light emitting portion, the second lens surface is configured output light that has passed through the first lens surface, and the protective layer has a refractive index greater than 1.5.

Abstract: Apparatus including a shared device in communication with a plurality of computing machines external to the shared device, the shared device including at least one PTP domain coefficient storage area, the at least one PTP domain coefficient storage area receiving a PTP coefficient from a computing machine having a PTP client, and providing the PTP coefficient to a computing machine not having a PTP client. Related apparatus and methods are also provided.

Abstract: A network element one or more network ports, network time circuitry and packet processing circuitry. The network ports are configured to communicate with a communication network. The network time circuitry is configured to track a network time defined in the communication network. In some embodiments the packet processing circuitry is configured to receive a definition of one or more timeslots that are synchronized to the network time, and to send outbound packets to the communication network depending on the timeslots. In some embodiments the packet processing circuitry is configured to process inbound packets, which are received from the communication network, depending on the timeslots.

Abstract: A digital to analog converter (DAC) includes a first amplifier configured to receive a first bit of a data block as an input and output a first signal based on a value of the first bit of the data block, a first filter circuit configured to filter the first signal, an output configured to output an analog signal based on a combination of the filtered first signal and a second signal that represents a value of a second bit of the data block.