Patents Assigned to MEMC Electronic Materials
  • Crystal puller and method for growing a monocrystalline ingot
    Patent number: 8147613
    Abstract: A crystal puller for growing monocrystalline ingots includes a side heater adjacent a crucible for heating the crucible and a melt heat exchanger sized and shaped for surrounding the ingot and disposed adjacent a surface of the melt. The heat exchanger includes a heat source having an area for radiating heat to the melt for controlling heat transfer at the upper surface of the melt. The melt heat exchanger is adapted to reduce heat loss at the exposed upper surface portion. Methods for growing single crystal silicon crystals having desired defect characteristics are disclosed.
    Type: Grant
    Filed: November 10, 2003
    Date of Patent: April 3, 2012
    Assignee: MEMC Electronic Materials, Inc.
    Inventor: Milind Kulkarni
  • Methods for monitoring the amount of contamination imparted into semiconductor wafers during wafer processing
    Patent number: 8143078
    Abstract: Methods are disclosed for monitoring the amount of metal contamination imparted during wafer processing operations such as polishing and cleaning. The methods include subjecting a silicon-on-insulator structure to the semiconductor process, precipitating metal contamination in the structure and delineating the metal contaminants.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: March 27, 2012
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Jeffrey L. Libbert, Lu Fei
  • Methods and systems for adjusting operation of a wafer grinder using feedback from warp data
    Patent number: 8145342
    Abstract: Processing a wafer using a double side grinder having a pair of grinding wheels. Warp data is obtained by a warp measurement device for measuring warp of a wafer as ground by the double side grinder. The warp data is received and a nanotopography of the wafer is predicted based on the received warp data. A grinding parameter is determined based on the predicted nanotopography of the wafer. Operation of the double side grinder is adjusted based on the determined grinding parameter.
    Type: Grant
    Filed: September 27, 2010
    Date of Patent: March 27, 2012
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Sumeet S. Bhagavat, Roland R. Vandamme, Tomomi Komura, Tomhiko Kaneko, Takuto Kazama
  • Methods for preparing a semiconductor wafer with high thermal conductivity
    Publication number: 20110318912
    Abstract: This invention generally relates to an epitaxial silicon semiconductor wafer with increased thermal conductivity to transfer heat away from a device layer, while also having resistance to common failure mechanisms, such as latch-up failures and radiation event failures. The semiconductor wafer comprises a lightly-doped device layer, a highly-doped protective layer, and a lightly-doped substrate. The invention is also directed to a process for forming such an epitaxial silicon wafer.
    Type: Application
    Filed: September 2, 2011
    Publication date: December 29, 2011
    Applicant: MEMC Electronic Materials, Inc.
    Inventor: Michael R. Seacrist
  • Methods for preparing a semiconductor structure for use in backside illumination applications
    Patent number: 8080482
    Abstract: This invention generally relates to an epitaxial silicon semiconductor wafer with increased thermal conductivity to transfer heat away from a device layer, while also having resistance to common failure mechanisms, such as latch-up failures and radiation event failures. The semiconductor wafer comprises a lightly-doped device layer, a highly-doped protective layer, and a lightly-doped substrate. The invention is also directed to a process for forming such an epitaxial silicon wafer.
    Type: Grant
    Filed: May 19, 2009
    Date of Patent: December 20, 2011
    Assignee: MEMC Electronic Materials, Inc.
    Inventor: Michael R. Seacrist
  • Methods for processing silicon on insulator wafers
    Patent number: 8080464
    Abstract: Methods are provided for etching and/or depositing an epitaxial layer on a silicon-on-insulator structure comprising a handle wafer, a silicon layer, and a dielectric layer between the handle wafer and the silicon layer. The silicon layer has a cleaved surface defining an outer surface of the structure. The cleaved surface of wafer is then etched while controlling a temperature of the reactor such that the etching reaction is kinetically limited. An epitaxial layer is then deposited on the wafer while controlling the temperature of the reactor such that a rate of deposition on the cleaved surface is kinetically limited.
    Type: Grant
    Filed: December 17, 2010
    Date of Patent: December 20, 2011
    Assignee: MEMC Electronics Materials, Inc,
    Inventors: Swapnil Y. Dhumal, Lawrence P. Flannery, Thomas A. Torack, John A. Pitney
  • Wafer clamping device for a double side grinder
    Patent number: 8066553
    Abstract: A hydrostatic pad for use in holding a semiconductor wafer during grinding of the wafer by grinding wheels. The pad includes hydrostatic pockets formed in a face of the body directly opposed to the wafer. The pockets are adapted for receiving fluid through the body and into the pockets to provide a barrier between the body face and the workpiece while still applying pressure to hold the workpiece during grinding. The hydrostatic pads allow the wafer to rotate relative to the pads about their common axis. The pockets are oriented to reduce hydrostatic bending moments that are produced in the wafer when the grinding wheels shift or tilt relative to the hydrostatic pads, helping prevent nanotopology degradation of surfaces of the wafer commonly caused by shift and tilt of the grinding wheels.
    Type: Grant
    Filed: January 20, 2005
    Date of Patent: November 29, 2011
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Milind S. Bhagavat, Puneet Gupta, Roland Vandamme, Takuto Kazama, Noriyuki Tachi
  • Methods for producing smooth wafers
    Patent number: 8058173
    Abstract: Methods for reducing the surface roughness of semiconductor wafers through a combination of rough polishing and thermally annealing the wafer.
    Type: Grant
    Filed: December 19, 2007
    Date of Patent: November 15, 2011
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Larry W. Shive, Brian L. Gilmore
  • Low thermal mass semiconductor wafer support
    Patent number: 8042697
    Abstract: A support for a semiconductor wafer includes a plate having a support surface for supporting the wafer and a recessed surface spaced from the support surface and spaced from the wafer. A plurality of holes extends from the recessed surface, and the support surface is free of holes to inhibit contamination of the wafer.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: October 25, 2011
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Brian Lawrence Gilmore, Lance G. Hellwig
  • Arsenic and phosphorus doped silicon wafer substrates having intrinsic gettering
    Patent number: 8026145
    Abstract: A process for the preparation of low resistivity arsenic or phosphorous doped (N+/N++) silicon wafers which, during the heat treatment cycles of essentially any arbitrary electronic device manufacturing process, reliably form oxygen precipitates.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: September 27, 2011
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Robert J. Falster, Vladimir Voronkov, Gabriella Borionetti
  • Processes for purification of silicon tetrafluoride
    Patent number: 7943108
    Abstract: Processes for purifying silicon tetrafluoride source gas by subjecting the source gas to one or more purification processes including: contacting the silicon tetrafluoride source gas with an ion exchange resin to remove acidic contaminants, contacting the silicon tetrafluoride source gas with a catalyst to remove carbon monoxide, by removal of carbon dioxide by use of an absorption liquid, and by removal of inert compounds by cryogenic distillation; catalysts suitable for removal of carbon monoxide from silicon tetrafluoride source gas and processes for producing such catalysts.
    Type: Grant
    Filed: September 11, 2008
    Date of Patent: May 17, 2011
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Vithal Revankar, Jameel Ibrahim
  • Silicon wafer etching compositions
    Patent number: 7938982
    Abstract: A process for etching silicon wafers using a caustic etchant in the form of an aqueous solution comprising water, a hydroxide ion source, and a chelating agent. The process produces silicon wafers substantially free from diffused metal ions.
    Type: Grant
    Filed: January 2, 2008
    Date of Patent: May 10, 2011
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Mark G. Stinson, Henry F. Erk, Guoqiang Zhang
  • Nanotopography control and optimization using feedback from warp data
    Patent number: 7930058
    Abstract: Processing a wafer using a double side grinder having a pair of grinding wheels. Warp data is obtained by a warp measurement device for measuring warp of a wafer as ground by the double side grinder. The warp data is received and a nanotopography of the wafer is predicted based on the received warp data. A grinding parameter is determined based on the predicted nanotopography of the wafer. Operation of the double side grinder is adjusted based on the determined grinding parameter.
    Type: Grant
    Filed: December 31, 2007
    Date of Patent: April 19, 2011
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Sumeet S. Bhagavat, Roland R. Vandamme, Tomomi Komura, Tomohiko Kaneko, Takuto Kazama
  • Method for assessing workpiece nanotopology using a double side wafer grinder
    Patent number: 7927185
    Abstract: A method of processing a semiconductor wafer using a double side grinder of the type that holds the wafer in a plane with a pair of grinding wheels and a pair of hydrostatic pads. The method includes measuring a distance between the wafer and at least one sensor and determining wafer nanotopology using the measured distance. The determining includes using a processor to perform a finite element structural analysis of the wafer based on the measured distance.
    Type: Grant
    Filed: December 7, 2009
    Date of Patent: April 19, 2011
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Roland R. Vandamme, Milind S. Bhagavat
  • Method and device for feeding arsenic dopant into a silicon crystal growing apparatus
    Patent number: 7922817
    Abstract: A feed assembly and method of use thereof of the present invention is used for the addition of a high pressure dopant such as arsenic into a silicon melt for CZ growth of semiconductor silicon crystals. The feed assembly includes a vessel-and-valve assembly for holding dopant, and a feed tube assembly, attached to the vessel-and-valve assembly for delivering dopant to a silicon melt. An actuator is connected to the feed tube assembly and a receiving tube for advancing and retracting the feed tube assembly to and from the surface of the silicon melt. A brake assembly is attached to the actuator and the receiving tube for restricting movement of the feed tube assembly and locking the feed tube assembly at a selected position.
    Type: Grant
    Filed: April 24, 2008
    Date of Patent: April 12, 2011
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Massoud Javidi, Steve Garner
  • High purity silicon carbide structures
    Patent number: 7888685
    Abstract: Processes for the purification of silicon carbide structures, including silicon carbide coated silicon carbide structures, are disclosed. The processes described can reduce the amount of iron contamination in a silicon carbide structure by 100 to 1000 times. After purification, the silicon carbide structures are suitable for use in high temperature silicon wafer processing.
    Type: Grant
    Filed: July 27, 2004
    Date of Patent: February 15, 2011
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Larry Wayne Shive, Brian Lawrence Gilmore
  • Semiconductor wafer carrier blade
    Patent number: 7878562
    Abstract: A carrier blade for transferring a semiconductor wafers into and out of a deposition chamber may include transition surfaces sloping downward from ledge surfaces. The transition surfaces slope from the corresponding ledges at angles that are greater than about 90 degrees so that the edges between the ledge surfaces and the transition surfaces are not sharp. The carrier blade may include bevels extending from the ledge surface(s) to upper lateral edges of the carrier blade.
    Type: Grant
    Filed: December 31, 2007
    Date of Patent: February 1, 2011
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Manabu Hamano, John A. Pitney, Lance G. Hellwig
  • Processes for the purification of trichlorosilane and silicon tetrachloride
    Patent number: 7879198
    Abstract: The present disclosure relates to processes and systems for purifying technical grade trichlorosilane and/or technical grade silicon tetrachloride into electronic grade trichlorosilane and/or electronic grade silicon tetrachloride.
    Type: Grant
    Filed: November 14, 2005
    Date of Patent: February 1, 2011
    Assignee: MEMC Electronic Materials, Inc.
    Inventor: Gianfranco Ghetti
  • Wire saw ingot slicing system and method with ingot preheating, web preheating, slurry temperature control and/or slurry flow rate control
    Patent number: 7878883
    Abstract: A system and method for slicing an ingot into wafers using the wire saw process. A slurry collection system collects and supplies slurry to a slurry handling system for controlling temperatures and/or flow rates of the slurry thereby providing slurry output at a controlled temperature and/or a controlled flow rate to slicing system for cutting the ingot, which may be preheated.
    Type: Grant
    Filed: January 10, 2007
    Date of Patent: February 1, 2011
    Assignee: MEMC Electronics Materials, Inc.
    Inventors: Puneet Gupta, Milind S. Kulkarni, Carlo Zavattari, Roland R. Vandamme
  • Pulling Assemblies For Pulling A Multicrystalline Silicon Ingot From A Silicon Melt
    Publication number: 20110002819
    Abstract: Methods for producing multicrystalline silicon ingots by use of a Czochralski-type crystal puller and pulling assemblies that include a plurality of seed crystals for pulling multicrystalline silicon ingots.
    Type: Application
    Filed: December 23, 2009
    Publication date: January 6, 2011
    Applicant: MEMC Electronic Materials, Inc.
    Inventor: Steven L. Kimbel