Abstract: A dressing apparatus for dressing a polishing pad includes a dressing member engageable with the polishing pad. The dressing apparatus is adapted to change the amount of force exerted by the dressing member on the polishing pad as the dressing member moves radially along the polishing pad. A controller for controlling the dressing apparatus has pre-programmed recipes that are selectable based on the radial profile of a measured polished wafer.
Type:
Grant
Filed:
June 29, 2007
Date of Patent:
December 7, 2010
Assignee:
MEMC Electronic Materials, Inc.
Inventors:
Mark G. Stinson, Madhavan S. Esayanur, Dennis Buese, Emanuele Corsi, Ezio Bovio, Antonio Maria Rinaldi, Larry Flannery
Abstract: A system for polishing a semiconductor wafer. The system includes a polishing apparatus having a rotatable polishing pad for polishing the wafer. A dressing apparatus is mounted adjacent the polishing pad for dressing the polishing pad. The dressing apparatus includes a dressing member engageable with the polishing pad. A cleaning apparatus is mounted adjacent the polishing pad for removing particulate and chemicals from the polishing pad. The system includes a controller for controlling the dressing apparatus and the cleaning apparatus.
Type:
Grant
Filed:
January 9, 2009
Date of Patent:
December 7, 2010
Assignee:
MEMC Electronic Materials, Inc.
Inventors:
Mark G. Stinson, Madhavan S. Esayanur, Dennis Buese, Emanuele Corsi, Ezio Bovio, Antonio Maria Rinaldi, Larry Flannery
Abstract: The present disclosure generally relates to methods for recovering silicon from saw kerf, or an exhausted abrasive slurry, resulting from the cutting of a silicon ingot, such as a single crystal or polycrystalline silicon ingot. More particularly, the present disclosure relates to methods for isolating and purifying silicon from saw kerf or the exhausted slurry, such that the resulting silicon may be used as a raw material, such as a solar grade silicon raw material.
Abstract: Processes for the purification of silicon carbide structures, including silicon carbide coated silicon carbide structures, are disclosed. The processes described can reduce the amount of iron contamination in a silicon carbide structure by 100 to 1000 times. After purification, the silicon carbide structures are suitable for use in high temperature silicon wafer processing.
Type:
Grant
Filed:
May 30, 2007
Date of Patent:
April 13, 2010
Assignee:
MEMC Electronic Materials, Inc.
Inventors:
Larry Wayne Shive, Brian Lawrence Gilmore
Abstract: The present invention is directed to a method for treatment of a gas stream comprising silicon tetrafluoride and hydrogen chloride. For example, the present invention is directed to a method for treatment of such a gas stream that involves contacting the gas stream with a metal that reacts with the hydrogen chloride to provide a treated gas stream having reduced hydrogen chloride content. The present invention is further directed to methods for subjecting silicon tetrafluoride and hydrogen chloride-containing gas streams to elevated pressure to provide gas streams suitable for transport.
Abstract: A melter assembly supplies a charge of molten source material to a crystal forming apparatus for use in forming crystalline bodies. The melter assembly comprises a housing and a crucible located in the housing. A heater is disposed relative to the crucible for melting solid source material received in the crucible. The crucible has a nozzle to control the flow of molten source material such that a directed flow of molten source material can be supplied to the crystal forming apparatus at a selected flow rate.
Abstract: A directional solidification furnace includes a crucible for holding molten silicon and a lid covering the crucible and forming an enclosure over the molten silicon. The crucible also includes an inlet in the lid for introducing inert gas above the molten silicon to inhibit contamination of the molten silicon.
Type:
Application
Filed:
September 19, 2009
Publication date:
March 25, 2010
Applicant:
MEMC Electronic Materials, Inc.
Inventors:
Steven L. Kimbel, Jihong (John) Chen, Richard G. Schrenker, Lee W. Ferry
Abstract: A double side grinder comprises a pair of grinding wheels and a pair of hydrostatic pads operable to hold a flat workpiece (e.g., semiconductor wafer) so that part of the workpiece is positioned between the grinding wheels and part of the workpiece is positioned between the hydrostatic pads. At least one sensor measures a distance between the workpiece and the respective sensor for assessing nanotopology of the workpiece. In a method of the invention, a distance to the workpiece is measured during grinding and used to assess nanotopology of the workpiece. For instance, a finite element structural analysis of the workpiece can be performed using sensor data to derive at least one boundary condition. The nanotopology assessment can begin before the workpiece is removed from the grinder, providing rapid nanotopology feedback. A spatial filter can be used to predict the likely nanotopology of the workpiece after further processing.
Abstract: Controlling crystal growth in a crystal growing system is described. The crystal growing system includes a heated crucible including a semiconductor melt from which a monocrystalline ingot is grown according to a Czochralski and the ingot is grown on a seed crystal pulled from the melt. The method includes applying a cusped magnetic field to the melt by supplying an upper coil with a first direct current (IUDC) and supplying a lower coil with a second direct current (ILDC). The method also includes supplying the upper coil with a first alternating current (IUAC) and supplying the lower coil with a second alternating current (ILAC) to generate a time-varying magnetic field, wherein the time-varying magnetic field generates a pumping force in the semiconductor melt.
Type:
Application
Filed:
August 6, 2009
Publication date:
February 11, 2010
Applicant:
MEMC Electronic Materials, Inc.
Inventors:
Hariprasad Sreedharamurthy, Milind Kulkarni, Harold W. Korb
Abstract: A system for growing silicon crystals that facilitates controlling a shape of a melt-solid interface is described. The crystal growing system includes a heated crucible including a semiconductor melt from which a monocrystalline ingot is grown according to a Czochralski process. The ingot is grown on a seed crystal pulled from the melt. The method includes applying an unbalanced cusped magnetic field to the melt, and rotating the ingot and the crucible in the same direction while the ingot is being pulled from the melt.
Type:
Application
Filed:
June 29, 2009
Publication date:
December 31, 2009
Applicant:
MEMC Electronic Materials, Inc.
Inventors:
Hariprasad Sreedharamurthy, Milind S. Kulkarni, Richard G. Schrenker, Joseph C. Holzer, Harold W. Korb
Abstract: This invention is directed to a process for heat-treating a single crystal silicon segment to influence the profile of minority carrier recombination centers in the segment. The segment is subjected to a heat-treatment to form crystal lattice vacancies, the vacancies being formed in the bulk of the silicon. The segment is then cooled at a rate which allows some, but not all, of the crystal lattice vacancies to diffuse to the front surface to produce a segment having the desired vacancy concentration profile. Platinum atoms are then in-diffused into the silicon matrix such that the resulting platinum concentration profile is substantially related to the concentration profile of the crystal lattice vacancies.
Abstract: System for controlling crystal growth in a Czochralski crystal growing apparatus. A magnetic field is applied within the crystal growing apparatus and varied to control a shape of the melt-solid interface where the ingot is being pulled from the melt. The shape of the melt-solid interface is formed to a desired shape in response to the varied magnetic field as a function of a length of the ingot.
Abstract: A double side grinder comprises a pair of grinding wheels and a pair of hydrostatic pads operable to hold a flat workpiece (e.g., semiconductor wafer) so that part of the workpiece is positioned between the grinding wheels and part of the workpiece is positioned between the hydrostatic pads. At least one sensor measures a distance between the workpiece and the respective sensor for assessing nanotopology of the workpiece. In a method of the invention, a distance to the workpiece is measured during grinding and used to assess nanotopology of the workpiece. For instance, a finite element structural analysis of the workpiece can be performed using sensor data to derive at least one boundary condition. The nanotopology assessment can begin before the workpiece is removed from the grinder, providing rapid nanotopology feedback. A spatial filter can be used to predict the likely nanotopology of the workpiece after further processing.
Type:
Grant
Filed:
December 28, 2006
Date of Patent:
October 13, 2009
Assignee:
MEMC Electronic Materials, Inc.
Inventors:
Sumeet S. Bhagavat, Milind S. Bhagavat, Roland R. Vandamme, Tomomi Komura
Abstract: This invention generally relates to an epitaxial silicon semiconductor wafer with increased thermal conductivity to transfer heat away from a device layer, while also having resistance to common failure mechanisms, such as latch-up failures and radiation event failures. The semiconductor wafer comprises a lightly-doped device layer, a highly-doped protective layer, and a lightly-doped substrate. The invention is also directed to a process for forming such an epitaxial silicon wafer.
Abstract: A method of continuously measuring an elevation and shape of an unmelted polycrystalline silicon island during a silicon meltdown process. The method comprises projecting a focused bright light on the silicon island to produce a bright dot on the silicon island. The method also includes electronically determining an elevation and a shape of the silicon island by tracking the bright dot during the meltdown process.
Type:
Grant
Filed:
August 25, 2008
Date of Patent:
August 11, 2009
Assignee:
MEMC Electronic Materials, Inc.
Inventors:
Zheng Lu, Steven L. Kimbel, Robert H. Fuerhoff, Joseph C. Holzer
Abstract: A silicon structure with improved protection against failures induced by excess radiation-induced charge carrier migration from the bulk region into the near-surface region. The structure comprises bulk and near-surface regions that are doped with a dopant, wherein the concentration in the near-surface region is at least 10 times the maximum concentration, c, of dopant in the bulk region. The structure further comprises a transition region between the bulk and near-surface regions extending less than about 1 ?m from the near-surface region toward the central plane.
Abstract: Semiconductor wafers have a front surface, a back surface, a notch, and an edge. A method of polishing a wafer includes polishing at least one of the surfaces and the notch of the wafer using a polishing pad and slurry. At least one surface of the wafer is cleaned of residual slurry. The cleaned surface is grasped by applying a vacuum to the cleaned surface of the wafer using a vacuum chuck. Edge of the wafer is polished using a pad and slurry while the wafer is grasped by the vacuum chuck.
Type:
Grant
Filed:
December 21, 2006
Date of Patent:
July 14, 2009
Assignee:
MEMC Electronic Materials, Inc.
Inventors:
Henry Frank Erk, Judith Ann Schmit, Roland Vandamme
Abstract: The present invention generally relates to a high resistivity CZ silicon wafer, or a high resistivity silicon structure derived therefrom, and a process for the preparation thereof. In particular, the high resistivity silicon structure comprises a large diameter CZ silicon wafer as the substrate thereof, wherein the resistivity of the substrate wafer is decoupled from the concentration of acceptor atoms (e.g., boron) therein, the resistivity of the substrate being substantially greater than the resistivity as calculated based on the concentration of said acceptor atoms therein.
Type:
Grant
Filed:
May 18, 2006
Date of Patent:
April 21, 2009
Assignee:
MEMC Electronic Materials, Inc.
Inventors:
Robert J. Falster, Vladimir V. Voronkov, Galina I. Voronkova, Anna V. Batunina
Abstract: Processes for purifying silicon tetrafluoride source gas by subjecting the source gas to one or more purification processes including: contacting the silicon tetrafluoride source gas with an ion exchange resin to remove acidic contaminants, contacting the silicon tetrafluoride source gas with a catalyst to remove carbon monoxide, by removal of carbon dioxide by use of an absorption liquid, and by removal of inert compounds by cryogenic distillation; catalysts suitable for removal of carbon monoxide from silicon tetrafluoride source gas and processes for producing such catalysts.
Abstract: A vitreous crucible for holding semiconductor material during a moncrystalline ingot growing process has a sidewall. Part of the sidewall is coated with a devitrification promoter and part of the sidewall is substantially free from devitrification promoter coating. When the crucible is heated as it would be during an ingot growing process, the devitrification promoter induces crystallization of portions of the sidewall, thereby forming enhanced stiffness sidewall portions. Areas that are substantially free from devitrification promoters remain vitreous and are softened by the heat. These become stress accommodating sidewall portions. Flow of the vitreous material in the stress accommodating sidewall portions relieves stresses that would otherwise build up in the sidewall.