Abstract: A multi-channel ADC system may include a plurality of input channels coupled to input signals. A multiplexer may couple one or more of the plurality of input channels to one or more multiplexer output channels. A control circuit may be coupled between the multiplexer output channels and an ADC. In operation, a configuration setting may configure the multi-channel ADC system in one of a plurality of configurations, including but not limited to single-ended, differential, pseudo-differential and hybrid configurations. The ADC may convert the plurality of input channels based on the configuration setting.

Abstract: A smart cable for backplane storage management is provided. The cable may include a microcontroller, a power conditioning circuitry to regulate an input voltage from a power supply and provide an output voltage to the microcontroller, a storage device coupled to the microcontroller, a first end to be coupled to one or more storage devices, and a second end to be coupled to a storage controller. The microcontroller may receive sideband signals from the one or more storage drives, and may transmit connection topology information to the storage controller based at least in part on the sideband signals.

Abstract: A system for network data transactions, the system including an ingress port to receive data frames and timestamp received data frames, a frame analyzer to forward the data frames to a processor, the processor to extract timing information from the data frames and update the data frames based on updated timing calculations and output updated data frames via one or more egress ports. Data frames are timestamped at ingress and egress ports, and egress timestamps are saved in a timestamp memory. The system reduces overall network delays by using dedicated hardware and stored timestamp information.

Abstract: A moisture resistant semiconductor device may include a substrate and a plurality of terminations in the substrate of the semiconductor device, wherein the plurality of terminations are laterally adjacent to an active region of the semiconductor device. A first insulating layer which overlays the plurality of terminations and the substrate. A trench into the substrate located laterally beyond an edge of the plurality of terminations. A contact layer which overlays the first insulating layer. A second insulating layer which overlays the contact layer. The second insulating layer which overlays the trench. A third insulating layer which overlays the second insulating layer.

Abstract: An apparatus including a power circuit to receive power from a power supply of a life safety device, and at least one control circuit powered by the power circuit. The control circuit to, in a calibration mode, receive a signal from an ambient light sensor and determine a baseline ambient light level based on the signal from the ambient light sensor. The control circuit to, in a proximity detection mode, receive another signal from the ambient light sensor, compare the other signal from the ambient light sensor to the baseline ambient light level, determine with an analysis that a difference in ambient light from the baseline ambient light level indicates a presence of an object in proximity to the life safety device, and issue an alert indicating the presence of the object in proximity to the life safety device based at least in part on the analysis.

Abstract: A device may have a reference divider circuit to divide a reference clock, a phase-frequency detector circuit to detect a detected phase difference and a detected frequency difference based on the reference divider output and a feedback clock, a loop filter circuit to filter the detector output, a voltage controlled oscillator (VCO) control output pin coupled to the loop filter output, a VCO clock divider control output pin to select a divisor of an external clock divider circuit, a divided VCO clock input pin for coupling to an output of the external clock divider circuit, a pulse-width modulation (PWM) circuit having a PWM clock input coupled to the divided VCO clock input pin, a period register to store a period value, a duty cycle register to store a duty cycle value and a pulse-width modulated output based on the period value and the duty cycle value.

Abstract: An apparatus that includes a beamforming antenna is provided. The apparatus may include a predictive calculator processing unit to receive position information of one or more airborne receivers, determine future position information of the one or more airborne receivers as a function of time based on the received position information, and determine beamforming antenna parameters. The apparatus may include an antenna instruction processing unit to receive the beamforming antenna parameters and generate beamforming instructions based on the beamforming antenna parameters, a beamforming antenna to receive the beamforming instructions, and to generate a beam at a specified time based on the beamforming instructions to enable communication with at least one of the one or more airborne receivers, and a receiver processing unit to receive airborne receiver data from the at least one of the one or more airborne receivers, and generate output data based on the airborne receiver data.

Abstract: A bias circuit may generate a one or more bias outputs for a crystal oscillator. The bias circuit may include a first current mirror, a second current mirror and a third current mirror. A capacitor may be coupled between the second current mirror and the third current mirror. In operation, a first bias output may be generated by the third current mirror, and a second bias output may be generated by the second current mirror. The first bias output and second bias output may be coupled to a crystal oscillator.

Abstract: An input signal may be converted into a first PWM signal and a second PWM signal at a PWM controller circuit. The first PWM signal and second signal output may drive a driver circuit. The driver circuit may receive a high-voltage supply from a boost converter or other power circuit. The driver circuit may include a high-side device and a low-side device. The output of the driver circuit may drive a filter circuit, the filter circuit comprising a filter capacitor, an inductor and a haptic actuator. The haptic actuator may produce a desired haptic response at the haptic actuator.

Abstract: An inductive sensor device includes at least one die mounted in or on a substrate, a redistribution layer (RDL) region formed over the at least one die and including multiple RDL metal layers, and at least one inductive coil formed in the RDL region and including at least one conductive coil element formed in at least one RDL metal layer of the multiple RDL metal layers, wherein the at least one die includes sensor circuitry connected to the at least one inductive coil to perform sensor measurements.

Abstract: An apparatus for dual edge memory write operation is provided. The apparatus may include a write enable circuit to receive a write enable signal for writing data to a memory cell, and a write driver circuit to receive a data signal and a complementary data signal, and output a bus signal and a complementary bus signal to the memory cell. The write driver circuit may be coupled to the write enable circuit. The write enable circuit may initiate a write operation to write data to the memory cell based on a falling edge of the write enable signal.

Abstract: A device and method for sigma-delta modulation may include an input signal and a plurality of integrators. The output of the integrators and a data input may be input to an adder, the sum output to be input to a quantizer to generate a quantized output signal. A reset input to the first integrator may be asserted during a first sample of the quantized output signal to reduce the signal discontinuity at the input of the first integrator, which improves the stability of the sigma-delta modulator.

Abstract: A device including an input to receive a clock signal, a ramp start program register, a ramp start active register, a ramp stop program register, a ramp stop active register, a ramp slope program register, a ramp slope active register, an update controller, the update controller to update, based on a programmable condition, respectively, the ramp start active register contents, the ramp stop active register contents and the ramp slope active register contents, and a ramp controller to generate a ramp signal, the ramp signal to begin at the value reflective of the ramp start active register contents, the ramp signal to change value at each cycle of the clock signal based on the value reflective of the ramp slope active register contents, and the ramp signal to stop at the value reflective of the ramp stop active register contents.

Abstract: A method for using a LIDAR-equipped projectile for three-dimensional mapping including sending a signal to a light source to cause the light source to emit a plurality of light pulses, the light source located on a spinning projectile proceeding along a predetermined path; receiving, at the spinning projectile, a plurality of reflected light pulses responsive to the plurality of light pulses reflecting off an object or a terrain portion; determining a distance of the object or the terrain portion from the light source; and generating a three-dimensional map of the object based on the determined distance of the object or the terrain portion from the light source.

Abstract: A transistor that may include a substrate, a drain layer formed within the substrate at a first side of the substrate. A first well implant having a first implant depth, a second well implant having a second implant depth and a third well implant having a third implant depth. The first well implant, the second well implant and the third well implant formed within the substrate at the second side of the substrate. The second implant depth is greater than the first implant depth and the third implant depth is greater than the second implant depth. A gate formed at the second side of the substrate. The gate overlaps the first well implant by a first distance, the gate overlaps the second well implant by a second distance and the gate overlaps the third well implant by a third distance.

Abstract: A device includes (a) an integrated inductor having an inductor wire and (b) a metal interconnect arrangement, both formed in an integrated circuit layer stack of alternating metal layers and via layers. At least a portion of the inductor wire is defined by an inductor element stack including multiple metal layer inductor elements formed in multiple respective metal layers, and multiple via layer inductor elements formed in multiple respective via layers and conductively connected to the metal layer inductor elements. Each via layer inductor element has a length of at least 1 ?m in each of two lateral directions orthogonal to each other and perpendicular to the vertical direction. The metal interconnect arrangement includes metal layer interconnect elements formed in the respective metal layers, and interconnect vias formed in the respective via layers.

Abstract: A circuit may include a vector arithmetic logic unit (ALU), the vector ALU comprising a multiplier, a first multiplexer, a second multiplexer and an accumulator. The vector ALU may compute a dot product of two or more vector inputs. A system may include two or more vector ALUs, and may partition a vector input into multiple segments. Each segment may be input to a respective vector ALU via a multiplexer, and a controller may route the partial sums of respective ALUs via one or more feedback paths and the system may compute the complete dot product of the vector inputs.

Abstract: A method includes performing a pressing operation on a volume of silicon carbide (SiC) powder to form a polycrystalline SiC (poly-SiC) ingot, and divide the poly-SiC ingot into a plurality of poly-SiC wafer bases. The method further includes, for a respective poly-SiC wafer base, bonding a silicon (Si) wafer structure to the respective poly-SiC wafer base to define a hybrid Si/poly-SiC stack structure, and performing a dividing process to remove a partial thickness of the Si wafer structure from the hybrid Si/poly-SiC stack structure to provide a hybrid Si/poly-SiC wafer comprising a remaining portion of the Si wafer structure bonded to the respective poly-SiC wafer base.

Abstract: A pre-charging circuit for charging a DC-link capacitor is provided. The pre-charging circuit may include a first semiconductor switch to be coupled to a first terminal of a high voltage source, a first inductor to be coupled to the first semiconductor switch and a first terminal of a capacitor, a second semiconductor switch to be coupled to a second terminal of the high voltage source, a second inductor to be coupled to the second semiconductor switch and a second terminal of the capacitor, and a diode coupled to the first semiconductor switch, the second semiconductor switch, the first inductor, and the second inductor, and coupled in parallel with the capacitor.

Abstract: A method for distress signal monitoring with EMS and public notification in crowded public spaces. The method includes receiving a distress signal from a first personal device in a crowded public space; locating the first personal device closest to an EMS unit indicating that a user of the first personal device is in distress; transmitting a location of the first personal device to the EMS unit; identifying a second personal device proximate to the first personal device; and transmitting a notification signal to the second personal device indicating that a person is in distress.