Abstract: A PWM lighting bridge manages hardware PWM compensation components. One or more PWM outputs are driven based upon a master PWM input signal. The master PWM input signal is processed through a mapping function to produce a desired output signal(s) on the one or more PWM outputs. The mapping function comprises a set of compensation bins having a maxim input duty cycle, a minimum input duty cycle and an output duty cycle. The mapping process selects a bin based on determining whether the input duty cycle is within the minimum and maximum duty cycle ranges of the bins and then uses the specified output duty cycle for the one or more PWM outputs. The PWM lighting bridge provides configuration and runtime management of the hardware PWM compensation components. Read/write access to the PWM compensation bins provides customizable configurations of the input and output PWM characteristics.

Abstract: A hermetically sealed semiconductor die package having a sidewall structure having a first opening and a second opening; a lid attached to the sidewall structure to hermetically seal the first opening; a substrate attached to the sidewall structure to hermetically seal the second opening, wherein the substrate comprises first, second, and third apertures; a first button attached to the substrate to hermetically seal the first aperture; a second button attached to the substrate to hermetically seal the second aperture; and a third button attached to the substrate to hermetically seal the third aperture.

Abstract: A thin film resistor (TFR) module includes a metal cup structure, a dielectric liner region, a TFR element, and a pair of TFR heads electrically connected to the TFR element. The metal cup structure includes a laterally-extending metal cup base and multiple metal cup sidewalls extending upwardly from the laterally-extending metal cup base. The dielectric liner region is formed in an opening defined by the metal cup structure. The TFR element is formed in an opening defined by the dielectric liner region, wherein the TFR element is insulated from the metal cup structure by the dielectric liner region.

Abstract: Disclosed embodiments relate to sensing states and changes of states of a signal and sensors for the same, including but not limited to, autonomous sensors. Such sensor may include an analog signal threshold detection circuit, a state detection circuit, and a measurement circuit. The analog signal threshold detection circuit may be configured to alternately assert and de-assert a threshold detected indication in response to an input signal and a state thereof. The state detection circuit may be configured to generate a signal state indication about a state of the input signal. The measurement circuit may be configured to generate a measurement in response to assertions of the threshold detected indication and the signal state indication, such as a count, a slew rate, or a frequency. In some embodiments, disclosed sensors may have programmable thresholds for sensing the signal states and changes therein.

Abstract: Systems, methods and devices relate to remote temperature sensing responsive to fractional currents used to bias a remote temperature diode. Fractional currents may be selected to simplify at least some temperature calculations performed using digital logic. Values of at least two voltage changes may be determined at least partially based on values of voltages generated across a pair of nodes at least partially responsive to excitation currents. Such pair of nodes associated with sensing paths coupled with a remote diode. A value of temperature may be determined at least partially based on the values of at least two voltage changes and a stored value of a fractional mirror ratio. The fractional mirror ratio represents a relationship between current magnitudes of excitation currents.

Abstract: A multi-phase power converter with current matching is provided. The apparatus may include a control circuit to control a first phase of a power converter having a plurality of phases, and a phase matching circuit. The phase matching circuit may remove a DC component from an output ripple voltage of the converter, detect when respective ones of the plurality of phases begins generating its respective phase current and output a phase detector signal, extract a signal proportional to the first phase current and a signal proportional to either the remaining or total phase currents, output first and second voltages respectively proportional to the average of the first phase current and the remaining or total phase current, and output a corrective signal based on the difference between the first and second voltage. The control circuit may control the first phase based on the corrective signal.

Abstract: A device with boot code, first mutable code stored in non-volatile memory, a first owner information stored in the non-volatile memory, and an SRAM with an SRAM physically unclonable function (SRAM PUF) region. Boot code may generate a first unique private key based on both the first owner information and a portion of the SRAM PUF region, wherein the first unique private key may not be directly accessible by the first mutable code; generate a first unique private keycode corresponding to the first unique private key; and provide the first mutable code with the first unique private keycode corresponding to the first unique private key. First mutable code may use the first unique private keycode to cause data to be signed with the first unique private key and generate a first unique mutable code private key based on at least a portion of the SRAM PUF region.

Abstract: An array of metal-oxide-metal (MOM) capacitors formed in an integrated circuit (IC) structure may be used for evaluating misalignments between patterned layers of the IC structure. The array of MOM capacitors may be formed in a selected set of patterned layers, e.g., a via layer formed between a pair of metal interconnect layers. The MOM capacitors may be programmed with different patterned layer alignments (e.g., built in to photomasks or reticles used to form the patterned layers) to define an array of different alignments. When the MOM capacitors are formed on the wafer, the actual patterned layer alignments capacitors may differ from the programmed layer alignments due a process-related misalignment. The MOM capacitors may be subjected to electrical testing to identify this process-related misalignment, which may be used for initiating a correcting action, e.g., adjusting a manufacturing process or discarding misaligned IC structures or devices.

Abstract: A system-on-chip may include an inductor-capacitor oscillator monolithically integrated into the system-on-chip The inductor-capacitor oscillator may be configured to improve frequency stability and reduce noise when compared to a resistor-capacitor oscillator. Methods of making integrated oscillators may involve forming an inductor at least partially while forming a BEOL structure on a substrate. A capacitor supported on and/or embedded within the semiconductor material of the substrate may be formed before or while forming the BEOL structure. The inductor may be connected to the capacitor in parallel at least partially utilizing the BEOL structure to form an integrated inductor-capacitor oscillator.

Abstract: Ferroelectric random access memory (FRAM) capacitors and methods of forming FRAM capacitors are provided. An FRAM capacitor may be formed between adjacent metal interconnect layers or between a silicided active layer (e.g., including MOSFET devices) and a first metal interconnect layer. The FRAM capacitor may be formed by a damascene process including forming a tub opening in a dielectric region, forming a cup-shaped bottom electrode, forming a cup-shaped ferroelectric element in an interior opening defined by the cup-shaped bottom electrode, and forming a top electrode in an interior opening defined by the cup-shaped ferroelectric element. The FRAM capacitor may form a component of an FRAM memory cell. For example, an FRAM memory cell may include one FRAM capacitor and one transistor (1T1C configuration) or two FRAM capacitors and two transistor (2T2C configuration).

Abstract: An article of manufacture includes a non-transitory machine-readable medium. The medium includes instructions. The instructions, when read and executed by a processor, cause the processor to identify a first input instruction in a code stream to be executed, determine that the first input instruction includes an atomic operation designation, and selectively block interrupts for a duration of execution of the first input instruction and a second input instruction. The second input instruction is to immediately follow the first input instruction in the code stream.

Abstract: Examples disclosed herein include a speaker. The speaker may include a group of microphones and a processor. The processor may determine a first speaker-channel identifier for a multi-speaker system at least partially responsive to a first tone captured at the group of microphones. The processor may also determine a position of a source of the captured first tone relative to the speaker at least partially responsive to position information derived from the captured first tone. The processor may also determine a second speaker-channel identifier at least partially responsive to the first speaker-channel identifier and the position of the source of the captured first tone. The processor may also determine speaker settings at least partially responsive to the second speaker-channel identifier. Related devices, systems and methods are also disclosed.

Abstract: Foreign object detection for wireless power transmitters and related apparatuses and methods are disclosed. An apparatus includes an analog-to-digital converter to sample at least one of a coil voltage potential and a coil current representation of a transmit coil inductively coupled to a receive coil of a wireless power receiver with a distance between the transmit coil and the receive coil. The apparatus also includes a processing core to determine an expected reference Q-factor value responsive to the at least one of the sampled coil voltage potential and the sampled coil current representation. The expected reference Q-factor value indicates a Q-factor value expected at a predetermined reference wireless power transmitter inductively coupled to the wireless power receiver with a reference distance from a reference transmit coil of the predetermined reference wireless power transmitter to the receive coil of the wireless power receiver.

Abstract: A system-level design generator tool enables users to configure system-level designs made up of electrical components that satisfy design parameters and have corresponding dependencies, e.g., power, communication, control, security, clock and memory. A block diagram representing each of the functions within the system may utilize a guided parametric search or a design tool to create the solution for each individual block. The inputs into that search and/or design tool may come from the system-level choices, constraints, and cross dependencies tracked by the system generator tool.

Abstract: An apparatus includes a test circuit to receive signals from a piezoelectric horn and a control circuit to determine whether to operate the apparatus in a silent test mode or a normal mode. The apparatus includes a control circuit to, based on a determination to operate in the normal mode, enable a driver circuit to drive the piezoelectric horn so as to output sound when activated by the driver circuit. The test circuit is to, based on a determination to operate in the silent test mode, cause the piezoelectric horn to generate a piezoelectric response, wherein the piezoelectric horn is silent while generating the piezoelectric response during the silent test mode, and cause evaluation of whether or not the piezoelectric horn is working correctly based upon the received signals from the piezoelectric horn.

Abstract: A disclosed method includes: setting a connector of an acquisition circuit and an associated capacitor to a predetermined potential; providing an energy pulse of a predetermined first time duration to the connector; at a time occurring substantially at a predetermined second time duration after an end of the predetermined first time duration of the energy pulse, coupling the associated capacitor and the connector of the acquisition circuit; and sampling a voltage being exhibited across the associated capacitor.

Abstract: Described is an architecture for a physical layer device useable with single pair Ethernet in a multidrop bus topology that may operate in a sleep mode and control other devices in network segment to operate in a sleep mode. Some embodiments of the physical layer device may support partial networking in a multidrop network, and mixed networks including the same.

Abstract: An apparatus includes an adjustment circuit configured to receive a pulsed-width modulation (PWM) input, generate an adjusted PWM signal based upon the PWM input, and determine that a first pulse of the PWM input is shorter than a runt signal limit. The adjustment circuit is further configured to, in the adjusted PWM signal, extend the first pulse of the PWM input based on the determination that the PWM input is shorter than the runt signal limit, and output the adjusted PWM signal to an electronic device.

Abstract: An apparatus includes an apparatus input to receive a voltage input, an apparatus output to drive an output metal oxide semiconductor field effect transistor (MOSFET) at least partially based upon the voltage input, a current source circuit to provide a current source to the apparatus output when the voltage input rises above a first threshold and before the voltage input rises above a second threshold, a voltage clamp circuit to provide a clamped output voltage to the apparatus output when the voltage input rises above the second threshold, and a current sink circuit to provide a current sink to the apparatus output when the voltage input falls below the second threshold and before the voltage input reaches the first threshold.

Abstract: A system having a theft event sensor; a primary alarm actuator; a display alarm actuator; and a vehicle security device to: receive a theft event signal from the theft event sensor, transmit a primary alarm signal to the primary alarm actuator, and transmit a display alarm signal to the display alarm actuator.