Abstract: This invention discloses a trench MOSFET comprising a top side drain region in a wide trench in a termination area besides a BV sustaining area, wherein said top side drain comprises a top drain metal connected to an epitaxial layer and a substrate through a plurality of trenched drain contacts, wherein the wide trench is formed simultaneously when a plurality of gate trenches are formed in an active area, and the trenched drain contacts are formed simultaneously when a trenched source-body contact is formed in the active area.
Abstract: A power semiconductor power device having composite trench bottom oxide and multiple trench floating gates is disclosed. The gate charge is reduced by forming a pad oxide surrounding a HDP oxide on trench bottom. The multiple trenched floating gates are applied in termination for saving body mask.
Abstract: A trench MOSFET structure having self-aligned features for mask saving and on-resistance reduction is disclosed, wherein the source region is formed by performing source Ion Implantation through contact opening of a contact interlayer, and further source diffusion. A dielectric sidewall spacer is formed on sidewalls of the contact interlayer in the contact open areas to define trenched source-body contacts for on-resistance reduction and avalanche capability improvement.
Abstract: The invention provides dry compositions for preparing and loading a sample on a gel for electrophoretic separation. The dry compositions preferably include a tracking dye and a sedimenting agent selected from a five-carbon polyol (e.g., ribitol, arabitol, or xylitol),iso-erythritol, maltitol, and saccharine. Methods for making and using, as well as kits comprising the disclosed compositions, are also provided.
Type:
Grant
Filed:
December 27, 2010
Date of Patent:
September 16, 2014
Assignee:
Mo Bio Laboratories, Inc.
Inventors:
Mark N. Brolaski, Vince Moroney, Suzanne Kennedy
Abstract: A fast switching super-junction trench MOSFET is disclosed having a floating region formed underneath each gate trench and surrounding at least bottom of each the gate trench, which has a parasitic body diode with superior reverse recovery characteristics.
Abstract: A method for debridement of wound on the skin by placing against the wound a glass-based borate-based composition to release dissolution products which support neutrophilic activity into the wound by dissolution.
Type:
Grant
Filed:
May 18, 2012
Date of Patent:
September 2, 2014
Assignees:
Mo/Sci Corporation, The Curators of the University of Missouri
Abstract: A trench shielded gate MOSFET device with embedded Schottky rectifier, Gate-Drain and Gate-Source clamp diodes on single chip is formed to achieve device shrinkage, lower cost and improved performance. The present semiconductor device achieve low Vf and reverse leakage current for embedded Schottky rectifier, having over-voltage protection and avalanche protection between gate and source and between gate and drain.
Abstract: A semiconductor power device with trenched floating gates having thick bottom oxide as termination is disclosed. The gate charge is reduced by forming a HDP oxide layer padded by a thermal oxide layer on trench bottom and a top surface of mesa areas between adjacent trenched gates. Therefore, only three masks are needed to achieve the device structure.
Abstract: A trench MOSFET with a short channel length is disclosed for reducing channel resistance, wherein at least one field relief region is formed underneath the body region in an epitaxial layer between every two adjacent gate trenches and self-aligned with a trenched source-body contact for prevention of drain/source punch-through issue.
Abstract: A protected memory source device including removable non-volatile memory durably stores a signature such as a serial number or identifier, which is used to mark protected multimedia content legally stored on the protected memory device. The protected multimedia content is moved from the source device to another device, such as a target device used to aggregated protected content in a library. Moving the protected multimedia content involves replacing a source-specific header, comprising digital rights management metadata and/or other security metadata allowing only a device having the source device signature access to the content, with a target-specific header comprising digital rights management metadata and/or other security metadata allowing only a device having the target device signature access to the content. The transfer is done using one of a variety of transfer methods with either a trusted or un-trusted host system connecting the source device to the target device.
Type:
Grant
Filed:
September 13, 2011
Date of Patent:
June 10, 2014
Assignee:
MO-DV, Inc.
Inventors:
Robert D. Widergren, Martin Paul Boliek
Abstract: A trench MOSFET with embedded schottky rectifier having at least one anti-punch through implant region using reduced masks process is disclosed for avalanche capability enhancement and cost reduction. The source regions have a higher doping concentration and a greater junction depth along sidewalls of the trenched source-body contacts than along adjacent channel regions near the gate trenches.
Abstract: This invention discloses a trench MOSFET comprising a top side drain region in a wide trench in a termination area besides a BV sustaining area, wherein said top side drain comprises a top drain metal connected to an epitaxial layer and a substrate through a plurality of trenched drain contacts, wherein the wide trench is formed simultaneously when a plurality of gate trenches are formed in an active area, and the trenched drain contacts are formed simultaneously when a trenched source-body contact is formed in the active area.
Abstract: A trench MOSFET with multiple trenched source-body contacts is disclosed for reducing gate charge by applying multiple trenched source-body contacts in unit cell. Furthermore, source regions are only formed along channel regions near the gate trenches, not between adjacent trenched source-body contacts for UIS (Unclamped Inductance Switching) current enhancement.
Abstract: A trench semiconductor power device with a termination area structure is disclosed. The termination area structure comprises a wide trench and a trenched field plate formed not only along trench sidewall but also on trench bottom of the wide trench by doing poly-silicon CMP so that the body ion implantation is blocked by the trenched field plate on the trench bottom to prevent the termination area underneath the wide trench from being implanted. Moreover, a contact mask is used to define both trenched contacts and source regions of the device for saving a source mask.
Abstract: A semiconductor power device integrated with ESD protection diode is disclosed by offering a dopant out-diffusion suppression layers prior to source dopant activation or diffusion to enhance ESD protection capability between gate and source.
Abstract: A power semiconductor device with improved avalanche capability is disclosed by forming at least one avalanche capability enhancement doped region underneath an ohmic contact doped region. Moreover, a source mask is saved by using three masks process and the avalanche capability is further improved.
Abstract: An integrated circuit includes a plurality of trench MOSFET and a plurality of trench Schottky rectifier. The integrated circuit further comprises: tilt-angle implanted body dopant regions surrounding a lower portion of all trenched gates sidewalls for reducing Qgd; a source dopant region disposed below trench bottoms of all trenched gates for functioning as a current path for preventing a resistance increased caused by the tilt-angle implanted body dopant regions.
Abstract: A trench MOSFET comprising a plurality of transistor cells having shielded trenched gates and multiple trenched floating gates as termination region is disclosed. The trenched floating gates have trench depth equal to or deeper than body junction depth of body regions in termination area. In some preferred embodiments, the trenched floating gates in the termination area are implemented by using shielded electrode structure.
Abstract: A improved termination structure for semiconductor power devices is disclosed, comprising a trenched field plate formed not only along trench sidewall but also on trench bottom of the wide termination trench by doing poly-silicon CMP so that body ion implantation is blocked by the trenched field plate on the trench bottom to prevent a body region formation underneath the trench bottom of the wide termination trench, degrading avalanche voltage.