Patents Assigned to MO' MOTION VENTURES
  • Fast switching hybrid IGBT device with trenched contacts
    Patent number: 8598624
    Abstract: A hybrid IGBT device having a VIGBT and LDMOS structures comprises at least a drain trenched contact filled with a conductive plug penetrating through an epitaxial layer, and extending into a substrate; a vertical drain region surrounding at least sidewalls of the drain trenched contact, extending from top surface of the epitaxial layer to the substrate, wherein the vertical drain region having a higher doping concentration than the epitaxial layer.
    Type: Grant
    Filed: August 21, 2012
    Date of Patent: December 3, 2013
    Assignee: Force Mos Technology Co., Ltd.
    Inventor: Fu-Yuan Hsieh
  • TRENCH MOSFET WITH TRENCHED FLOATING GATES HAVING THICK TRENCH BOTTOM OXIDE AS TERMINATION
    Publication number: 20130307066
    Abstract: A semiconductor power device with trenched floating gates having thick bottom oxide as termination is disclosed. The gate charge is reduced by forming a HDP oxide layer padded by a thermal oxide layer on trench bottom and a top surface of mesa areas between adjacent trenched gates. Therefore, only three masks are needed to achieve the device structure.
    Type: Application
    Filed: July 29, 2013
    Publication date: November 21, 2013
    Applicant: Force Mos Technology Co., Ltd.
    Inventor: FU-YUAN HSIEH
  • TRENCH MOSFET STRUCTURES USING THREE MASKS PROCESS
    Publication number: 20130299901
    Abstract: A trench MOSFET comprising a plurality of trenched gates surrounded by source regions encompassed in body regions in active area. A plurality of trenched source-body contact structure penetrating through the source regions and extending into the body regions, are filled with tungsten plugs padded with a Ti layer, a first and a second TiN layer, wherein the second TiN layer is deposited after Ti silicide formation to avoid W spiking occurrence.
    Type: Application
    Filed: July 24, 2013
    Publication date: November 14, 2013
    Applicant: Force Mos Technology Co., Ltd.
    Inventor: FU-YUAN HSIEH
  • Method of generating and distributing a computer application
    Patent number: 8584114
    Abstract: A processor is operative to store specifications of computer applications in a platform-independent language. A remote client device requests delivery of a specified application for execution thereon. The processor interrogates the remote client device to construct a device configuration, comprising characteristics and capabilities of the remote client device. The processor also obtains a user configuration, and establishes a compilation configuration according to the device configuration and the user configuration. A compiled application in binary format is produced using the compilation configuration and the platform-independent language of the specified application. The compiled application includes customized content and is adapted to run on the remote client device. The processor causes the compiled application to be downloaded to the remote client device.
    Type: Grant
    Filed: June 28, 2009
    Date of Patent: November 12, 2013
    Assignee: Mo'minis Ltd
    Inventors: Zvi Rabinovich, Eyal Rabinovich, Tzach Hadar, Dani Valevski
  • Super-junction trench MOSFET having deep trenches with buried voids
    Patent number: 8575690
    Abstract: A super-junction trench MOSFET is disclosed for high voltage device by applying a first doped column region of first conductivity type between a pair of second doped column regions of second conductivity type adjacent to sidewalls of a pair of deep trenches with buried voids in each unit cell for super-junction. Meanwhile, at least one trenched gate and multiple trenched source-body contacts are formed in each unit cell between the pair of deep trenches.
    Type: Grant
    Filed: January 28, 2013
    Date of Patent: November 5, 2013
    Assignee: Force Mos Technology Co., Ltd.
    Inventor: Fu-Yuan Hsieh
  • MOSFET-Schottky rectifier-diode integrated circuits with trench contact structures
    Patent number: 8569765
    Abstract: A trench MOSFET device with embedded Schottky rectifier, Gate-Drain and Gate-Source clamp diodes on single chip is formed to achieve device shrinkage and performance improvement. The present semiconductor devices achieve low Vf and reverse leakage current for embedded Schottky rectifier, have overvoltage protection for Gate-Source clamp diode and avalanche protection for Gate-Drain clamp diode.
    Type: Grant
    Filed: July 20, 2011
    Date of Patent: October 29, 2013
    Assignee: Force Mos Technology Co., Ltd.
    Inventor: Fu-Yuan Hsieh
  • Method for manufacturing a power semiconductor device
    Patent number: 8563381
    Abstract: A power semiconductor device with improved avalanche capability structures is disclosed. By forming at least an avalanche capability enhancement doped regions with opposite conductivity type to epitaxial layer underneath an ohmic contact doped region which surrounds at least bottom of trenched contact filled with metal plug between two adjacent gate trenches, avalanche current is enhanced with the disclosed structures.
    Type: Grant
    Filed: August 14, 2012
    Date of Patent: October 22, 2013
    Assignee: Force Mos Technology Co., Ltd.
    Inventor: Fu-Yuan Hsieh
  • Trench MOSFET with trenched floating gates in termination
    Patent number: 8564053
    Abstract: A trench MOSFET comprising multiple trenched floating gates in termination area is disclosed. The trenched floating gates have trench depth equal to or deeper than body junction of body regions in active area. The trench MOSFET further comprise an EPR surrounding outside the multiple trenched floating gates in the termination area.
    Type: Grant
    Filed: April 30, 2012
    Date of Patent: October 22, 2013
    Assignee: Force Mos Technology Co., Ltd.
    Inventor: Fu-Yuan Hsieh
  • Method of manufacturing trench MOSFET structures using three masks process
    Patent number: 8530313
    Abstract: In according with the present invention, a semiconductor device is formed as follows. A contact insulation layer is deposited on the top surface of said silicon layer. A contact mask is applied and following with a dry oxide etching to remove the contact insulation layer from contact open areas. The silicon layer is implanted with a source dopant through the contact open areas and the source dopant is diffused to form source regions, thereby a source mask is saved. A dry silicon etch is carried out to form trenched source-body contacts in the contact open areas, penetrating through the source regions and extending into the body regions.
    Type: Grant
    Filed: September 29, 2011
    Date of Patent: September 10, 2013
    Assignee: Force Mos Technology Co., Ltd.
    Inventor: Fu-Yuan Hsieh
  • Trench MOSFET with trenched floating gates having thick trench bottom oxide as termination
    Patent number: 8525255
    Abstract: A power semiconductor power device having composite trench bottom oxide and multiple trench floating gates is disclosed. The gate charge is reduced by forming a pad oxide surrounding a HDP oxide on trench bottom. The multiple trenched floating gates are applied in termination for saving body mask.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: September 3, 2013
    Assignee: Force Mos Technology Co., Ltd.
    Inventor: Fu-Yuan Hsieh
  • Trench MOSFET with trenched floating gates and trenched channel stop gates in termination
    Patent number: 8519477
    Abstract: A trench MOSFET comprising multiple trenched floating gates in termination area is disclosed. The multiple trenched floating gates have trench depth equal to or deeper than body junction of body regions in active area. The trench MOSFET further comprises at least one trenched channel stop gate around outside of the trenched floating gates and connected to at least one sawing trenched gate extended into scribe line for prevention of leakage path formation between drain and source regions.
    Type: Grant
    Filed: June 29, 2012
    Date of Patent: August 27, 2013
    Assignee: Force Mos Technology Co., Ltd.
    Inventor: Fu-Yuan Hsieh
  • Trench MOSFET layout with trenched floating gates and trenched channel stop gates in termination
    Patent number: 8487372
    Abstract: A trench MOSFET layout with multiple trenched floating gates and at least one trenched channel stop gate in termination area shorted with drain region is disclosed to make it feasibly achieved after die sawing. The layout consisted of dual trench MOSFETs connected together with multiple sawing trenched gates across a space between the two trench MOSFETs having a width same as scribe line.
    Type: Grant
    Filed: October 12, 2012
    Date of Patent: July 16, 2013
    Assignee: Force Mos Technology Co., Ltd.
    Inventor: Fu-Yuan Hsieh
  • Semiconductor power device integrated with improved gate source ESD clamp diodes
    Patent number: 8466514
    Abstract: A trench semiconductor power device integrated with four types of ESD clamp diodes for optimization of total perimeter of the ESD clamp diodes, wherein the ESD clamp diodes comprise multiple back to back Zener diodes with alternating doped regions of a first conductivity type next to a second conductivity type, wherein each of the doped regions has a closed ring structure.
    Type: Grant
    Filed: October 17, 2011
    Date of Patent: June 18, 2013
    Assignee: Force Mos Technology Co., Ltd.
    Inventor: Fu-Yuan Hsieh
  • Integrated trench MOSFET with trench Schottky rectifier
    Patent number: 8426913
    Abstract: An integrated circuit comprising trench MOSFET having trenched source-body contacts and trench Schottky rectifier having trenched anode contacts is disclosed. By employing the trenched contacts in trench MOSFET and trench Schottky rectifier, the integrated circuit is able to be shrunk to achieve low specific on-resistance for trench MOSFET, and low Vf and reverse leakage current for trench Schottky Rectifier.
    Type: Grant
    Filed: March 16, 2010
    Date of Patent: April 23, 2013
    Assignee: Force Mos Technology Co., Ltd.
    Inventor: Fu-Yuan Hsieh
  • Automating Inventory Management Of Consumer Items
    Publication number: 20130066742
    Abstract: A method and system for automating the management of an inventory of consumer items at a consumer location uses a programmed device that accepts input data and executes control logic for automating inventory management. At least one shopping list is received, a shopping list trend is established, and a smart list is generated with the control logic, in accordance with the shopping list trend, such that the smart list predictive of a next shopping list.
    Type: Application
    Filed: September 14, 2012
    Publication date: March 14, 2013
    Applicant: Comcast MO Group, Inc.
    Inventors: J. Clarke Stevens, Carol L. Stimmel
  • System for Reducing Radiation for Cellular Users
    Publication number: 20130065617
    Abstract: The system, which retrofits existing brand mobile telephones by adding short range audio and command application and by adding a server to distance harmful radiation, comprises a server, a client mobile telephone having a long range and a short range transceiver, the client having a SIM module. The server has a short range and a long range transceiver and a second SIM module that has priority over the client with the network. The server, when in communication range with the client, receives the incoming call from the base station, transfers audio to the client by short range communication, receives audio from the client handset and transmit a signal corresponding to the audio to the base station.
    Type: Application
    Filed: September 14, 2011
    Publication date: March 14, 2013
    Applicant: MO-B-SAFE LTD.
    Inventor: Gilad PELED
  • Trench MOSFET with body region having concave-arc shape
    Patent number: 8378392
    Abstract: A trench Metal Oxide Semiconductor Field Effect Transistor with improved body region structures is disclosed. By forming the inventive body region structures with concave-arc shape with respect to epitaxial layer, a wider interfaced area between the body region and the epitaxial layer is achieved, thus increasing capacitance between drain and source Cds. Moreover, the invention further comprises a Cds enhancement doped region interfaced with said body region having higher doping concentration than the epitaxial layer to further enhancing Cds without significantly impact breakdown voltage.
    Type: Grant
    Filed: April 7, 2010
    Date of Patent: February 19, 2013
    Assignee: Force Mos Technology Co., Ltd.
    Inventor: Fu-Yuan Hsieh
  • Power semiconductor devices integrated with clamp diodes having separated gate metal pads to avoid breakdown voltage degradation
    Patent number: 8378411
    Abstract: A structure of power semiconductor device integrated with clamp diodes having separated gate metal pads is disclosed. The separated gate metal pads are wire bonded together on the gate lead frame. This improved structure can prevent the degradation of breakdown voltage due to electric field in termination region blocked by polysilicon or gate metal.
    Type: Grant
    Filed: March 24, 2011
    Date of Patent: February 19, 2013
    Assignee: Force Mos Technology., Ltd.
    Inventor: Fu-Yuan Hsieh
  • Method for manufacturing a super-junction trench MOSFET with resurf stepped oxides and trenched contacts
    Patent number: 8372717
    Abstract: A method of manufacturing a super junction semiconductor device having resurf stepped oxide structure is disclosed by providing semiconductor silicon layer having trenches and mesas. A plurality of first doped column regions of a second conductivity type in parallel surrounded with second doped column regions of a first conductivity type adjacent to sidewalls of the trenches are formed by angle ion implantations into a plurality of mesas through opening regions in a block layer covering both the mesas and a termination area.
    Type: Grant
    Filed: November 18, 2011
    Date of Patent: February 12, 2013
    Assignee: Force Mos Technology Co., Ltd.
    Inventor: Fu-Yuan Hsieh
  • Super-junction trench MOSFET with Resurf stepped oxides and split gate electrodes
    Patent number: 8373225
    Abstract: A super-junction trench MOSFET with Resurf Stepped Oxide and split gate electrodes is disclosed. The inventive structure can apply additional freedom for better optimization of device performance and manufacturing capability by tuning thick oxide thickness to minimize influence of charge imbalance, trapped charges, etc. Furthermore, the fabrication method can be implemented more reliably with lower cost.
    Type: Grant
    Filed: November 23, 2011
    Date of Patent: February 12, 2013
    Assignee: Force Mos Technology Co., Ltd.
    Inventor: Fu-Yuan Hsieh