Abstract: A control circuit for a switching power converter is disclosed herein. The control circuit includes a power input terminal, a switching step-down regulator module, and a low dropout linear regulator module. The power input terminal is configured to receive an input signal. The switching step-down regulator module has a step-down regulating input terminal and a step-down output terminal. The step-down regulating input terminal is coupled to the power input terminal, and the switching step-down regulator module is configured to provide a step-down output voltage at the step-down output terminal. The low dropout linear regulator module is coupled to the power input terminal and the step-down output terminal, and is configured to be powered by the power input terminal in a first operation period and be powered by the step-down output voltage in a second operation period.

Abstract: A control circuit for a switching mode power supply is disclosed herein. The switching mode power supply has a primary-side circuit, the primary-side circuit has a first switch, a second switch, and a clamping capacitor. The control circuit includes a voltage detection circuit, an on-time adjustment circuit, and a driving circuit. The voltage detection circuit is coupled to the first terminal of the first switch and configured to detect a voltage signal at the first terminal of the first switch. The on-time adjustment circuit is configured to provide a first on-time signal to adjust an on-time of the first switch according to the voltage signal at the first terminal of the first switch. The driving circuit is configured to provide a driving signal to a control terminal of the first switch according to the first on-time signal.

Abstract: A semiconductor device is disclosed herein. The semiconductor device includes a routing structure. The routing structure has an intermediate conductive routing layer. The intermediate conductive routing layer includes a first mesh conductive layer formed in a predetermined second region of the semiconductor device and a second mesh conductive layer formed in a predetermined first region of the semiconductor device. The first mesh conductive layer and the second mesh conductive layer are electrically isolated from each other. The intermediate conductive routing layer further includes multiple first conductive islands formed in the predetermined first region and multiple second conductive islands formed in the predetermined second region.

Abstract: A controller for a multiphase switching converter has a feedback pin, a reference pin, and a plurality of switching control pins. When the controller is a master controller, the reference pin provides a reference output signal based on a plurality of currents flowing through a plurality of switching circuits. When the controller is a slave controller, the feedback pin receives the reference output signal from the master controller, and the slave controller provides the plurality of switching control signals based on the plurality of currents flowing through the plurality of switching circuits, the reference output signal, and a feedback signal representative of an output voltage of the multiphase switching converter.

Abstract: A sandwich structure power supply module, having: an inductor pack having a first inductor and a second inductor; a top PCB (Printed Circuit Board) on top of the inductor pack; and a first power device chip and a second power device chip on top of the top PCB, wherein the first power device chip has at least one pin electrically connected to the first inductor via the top PCB, and the second power device chip has at least one pin electrically connected to the second inductor via the top PCB; wherein each inductor comprises one winding having a first end and a second end, and wherein at least one of the first end and the second end of each winding is bent to and extended at a plane perpendicular to an axis along a length of the winding.

Abstract: A gate driver circuit includes a high side driver circuit, a low side driver circuit, and an on-time control circuit. The high side driver circuit provides a first gate driving signal to a high side power switch. The low side driver circuit provides a second gate driving signal to a low side power switch. The on-time control circuit is configured to provide the first on-time adjusting signal in response to the first on-time control signal and the second feedback signal. The on-time of the first on-time adjusting signal is greater than the on-time of the first on-time control signal. The on-time control circuit is further configured to provide the second on-time adjusting signal in response to the second on-time control signal and the second feedback signal. The on-time of the second on-time adjusting signal is greater than the on-time of the second on-time control signal.

Abstract: A semiconductor device includes a first source region, a first sidewall body region, a gate region, a second source region and a link region formed in a substrate of a first conductivity type. The first source region and the second source region may be of the first conductivity type while the first sidewall body region and the link region may be of a second conductivity type opposite to the first conductivity type. The link region and the gate region are respectively disposed at a first side and a second side of the first source region. The first sidewall body region may be disposed below or underneath the first source region.

Abstract: A semiconductor device includes a first source region, a first sidewall body region, a gate region, a second source region and a link region formed in a substrate of a first conductivity type. The first source region and the second source region may be of the first conductivity type while the first sidewall body region and the link region may be of a second conductivity type opposite to the first conductivity type. The link region and the gate region are respectively disposed at a first side and a second side of the first source region. The first sidewall body region may be disposed below or underneath the first source region.

Abstract: A method for manufacturing a semiconductor device includes preparing a substrate of a first conductivity type having a drain region, forming a first source region and a second source region of the first conductivity type in the substrate separated from each other, and forming a gate trench of a gate region disposed closely next to or in adjoining neighbor to the first source region. The method may further include forming a first sidewall body region of a second conductivity type to separate the first source region from the second source region, forming a link region of the second conductivity type such that the link region and the gate trench are disposed spatially opposite to each other, forming a gate insulation layer to coat and line sidewalls and a bottom of the gate trench, and using a gate conductive material to fill the gate trench.

Abstract: A linear regulator includes a pass element, an error amplifier, and a miller compensation circuit. The error amplifier is configured to provide an error signal to the control terminal of the pass element in response to a reference voltage and a feedback voltage. The error amplifier includes a current mirror stage and a first stage. The current mirror stage is configured to receive the input voltage. The first stage is configured to provide a first current signal to a first terminal of the current mirror stage in response to the reference voltage, and provide a second current signal to a second terminal of the current mirror stage in response to the feedback voltage. The miller compensation circuit is coupled between the second terminal of the pass element and the error amplifier. The miller compensation circuit is configured to control the first current signal.

Abstract: A method for manufacturing a semiconductor device includes preparing a substrate of a first conductivity type having a drain region, forming a first source region and a second source region of the first conductivity type in the substrate separated from each other, and forming a gate trench of a gate region disposed closely next to or in adjoining neighbor to the first source region. The method may further include forming a first sidewall body region of a second conductivity type to separate the first source region from the second source region, forming a link region of the second conductivity type such that the link region and the gate trench are disposed spatially opposite to each other, forming a gate insulation layer to coat and line sidewalls and a bottom of the gate trench, and using a gate conductive material to fill the gate trench.

Abstract: A semiconductor device includes a first source region, a first sidewall body region, a gate region, a second source region and a link region formed in a substrate of a first conductivity type. The first source region and the second source region may be of the first conductivity type while the first sidewall body region and the link region may be of a second conductivity type opposite to the first conductivity type. The link region and the gate region are respectively disposed at a first side and a second side of the first source region. The first sidewall body region may be disposed below or underneath the first source region.

Abstract: A gate driver has a turn-on circuit and a turn-off circuit. The turn-on circuit pulls up a gate terminal of a wide bandgap (WBG) semiconductor transistor and turns on the WBG semiconductor transistor in response to a first status of an on-off control signal. The turn-off circuit pulls down the gate terminal of the WBG semiconductor transistor and turns off the WBG semiconductor transistor in response to a second status of the on-off control signal. When the on-off control signal transits to the first status, the turn-on circuit drives the gate terminal of the WBG semiconductor transistor at a first constant driving current, and later switches to a second constant driving current. The second constant driving current is lower than the first constant driving current.

Abstract: A switching circuit has a first die and a second die. The first die has a first transistor, a second transistor, and a third transistor. The second die has a fourth transistor and a driving circuit. The second transistor and the third transistor are coupled to the first transistor to provide multiple pull down paths for the first transistor. The driving circuit provides a first driving signal to control the first transistor, a second driving signal to control the fourth transistor, a first pull down control signal to control the second transistor, and a second pull down control signal to control the third transistor based on the pulse width modulation signal. A pull down strength of the first transistor is modified via the second transistor and the third transistor based on an expected turn-off mode of the first transistor.

Abstract: A cascode switch device includes a normally-on switch device, a normally-off switch device, and a gate driver. The normally-on switch device has a first terminal, a second terminal and a control terminal. The normally-off switch device has a first terminal, a second terminal and a control terminal. The first terminal of the normally-off switch device is coupled to the second terminal of the normally-on switch device, and the control terminal of the normally-off switch device is coupled to the control terminal of the normally-on switch device. The gate driver is configured to provide a gate driver signal to the control terminal of the normally-on switch device to control a switching slew rate of a voltage at the first terminal of the normally-on switch device. The normally-on switch device is turned on or turned off in response to the gate driver signal.

Abstract: A portable ultrasound imaging system includes a probe and a personal computer. The personal computer is connected to the probe by way of a THUNDERBOLT I/O interface. The probe includes a transducer that alternately transmits positive and negative ultrasound pulses to a target being imaged, which is a human body. Echoes of the ultrasound pulses reflected from internal structures of the human body are sampled from the transducer, digitized into echo data, and streamed to the personal computer over the THUNDERBOLT I/O interface. In the personal computer, scanlines are generated from the echo data. Overlapping scanlines are coherently compounded and positioned together to form an ultrasound image.

Abstract: A semiconductor wafer processing method, having: ablating a back side of a semiconductor wafer with a laser ablation process; and etching the back side of the semiconductor wafer with an etching process; wherein the laser ablation process forms a pattern in the back side of the semiconductor wafer; wherein the etching process preserves the pattern in the back side of the semiconductor wafer.

Abstract: A switch circuit includes a first audio input pin configured to receive a first audio signal having a first amplitude, a second audio input pin configured to receive a second audio signal having a second amplitude, an input pin, an output pin, and at least one switch configured to convert the input voltage to the output voltage. When a maximum of the first amplitude and the second amplitude is lower than a first threshold voltage, the output voltage is a default voltage. When the maximum of the first amplitude and the second amplitude is greater than the first threshold voltage but lower a second threshold voltage that is greater than the first threshold voltage, the output voltage is a first voltage greater. When the maximum of the first amplitude and the second amplitude is larger than the second threshold voltage, the output voltage is a second voltage.

Abstract: A power circuit includes a first power switch and a control unit. The control circuit is configured to provide a first driving signal to a control terminal of the first power switch, and the first power switch is turned on and off in response to the first driving signal. The power circuit further includes an input pin configured to receive an input voltage signal, an output pin configured to provide an output voltage signal, at least one control pin configured to receive at least one control signal, and a first safety pin coupled to the control terminal of the first power switch. The first safety pin is configured to receive a first safety signal, and the first power switch is controlled in response to the first safety signal.

Abstract: A driving circuit for a power transistor. The driving circuit has a control pin to receive a control signal, a driving pin to provide a driving signal to control the power transistor, the driving signal is generated based on the control signal. The driving circuit also has a negative voltage isolation circuit connected between an isolation pin and an output pin, when the voltage at the output pin is greater than an isolation voltage, the voltage at the isolation pin is equal to the voltage at the output pin, and when the voltage at the output pin is less than the isolation voltage, the voltage at the isolation pin is clamped at a preset voltage value, the preset voltage value is in a range from ?2V to ?0.2V.