Abstract: A trans-inductor voltage regulator (TLVR) circuit has multiple phases and a regulator block for each phase. Each regulator block is connected to an output capacitor of the TLVR circuit by way of a first winding of a corresponding nonlinear transformer. A second winding of the nonlinear transformers are connected in series with a compensation inductor. The first winding of the corresponding nonlinear transformer has a first inductance when a load current is at a first level, and the first winding of the corresponding nonlinear transformer has a second inductance that is less than the first inductance when the load current is at a second level that is higher than the first level.

Abstract: An LED driving system for synchronizing two LED driving integrated circuits to drive LED strings. The LED driving system sequentially activates the LED strings driven by the first LED driving integrated circuit and then outputs a downstream enabling signal from the first LED driving integrated circuit to the second LED driving integrated circuit to activate the LED strings driven by the second LED driving integrated circuit.

Abstract: A trans-inductor voltage regulator (TLVR) circuit has multiple phases and a regulator block for each phase. Each regulator block has a winding of a transformer as an output inductor. The other windings of the transformers are connected in series with a nonlinear compensation inductor. The compensation inductor has a large inductance when the compensation inductor current is responsive to a steady state load current and has a small inductance when the compensation inductor current is responsive to a transient load current.

Abstract: A hybrid DC-DC converter includes a converter circuit, a bridge circuit with a bridge path that includes a winding of a transformer, and another bridge circuit with a bridge path that includes another winding of the transformer. Current through the bridge path of the other bridge circuit flows through the converter circuit in one direction and bypasses the converter circuit in the other direction. The converter circuit can operate in buck, boost, or buck-boost mode.

Abstract: A current sensing circuit for sensing a current flowing through a current sense resistor, wherein the current sense resistor is configured to receive a variable power input voltage. The current sensing circuit includes: a current sense amplifier having a first input terminal configured to be coupled to a first terminal of the current sense resistor to receive the power input voltage, a second input terminal configured to be coupled to a second terminal of the current sense resistor, and an output terminal for providing a current sensing signal indicative of the current flowing through the current sense resistor; and a calibration circuit configured to be coupled to the first input terminal of the current sense amplifier. The calibration circuit is configured to convert the power input voltage into a calibration current, and provide the calibration current to the current sense amplifier, so as to reduce a change in the current sensing signal caused by a change in the power input voltage.

Abstract: An inductor has one or more wires and a multipart magnetic core. The multipart magnetic core has magnetic core parts that are adjacent and magnetically coupled. The inductor provides an inductance of at least 40 nH for currents greater than 1 A and less than 60 A, and at least 20 nH for currents of at least 60 A.

Abstract: An energy recycle circuit for a flyback circuit, the flyback circuit has a primary winding of a transformer a primary switch. The energy recycle circuit has an energy recycle branch coupled in parallel with the primary winding, and an integrated circuit having a plurality of pins. The energy recycle branch has an auxiliary switch and a clamp capacitor connected in series. Among the plurality of pins, a first pin receives an external supply voltage. A second pin is used as a power ground that is different from a primary power ground. A third pin is used to sense a branch current flowing through the energy recycle branch. A fourth pin is used to control an operation of the auxiliary switch. A fifth pin that is connected to an external resistor for setting a maximum ON-time threshold of the auxiliary switch.

Abstract: A trans-inductor voltage regulator (TLVR) circuit has multiple phases and a regulator block for each phase. Each regulator block has a winding of a transformer as an output inductor. The other windings of the transformers are connected in series with a nonlinear compensation inductor. The compensation inductor has a large inductance when the compensation inductor current is responsive to a steady state load current and has a small inductance when the compensation inductor current is responsive to a transient load current.

Abstract: A power supply having at least one PMIC provides flexible control to the power manage systems. The PMIC has an enable pin configured to receive a control signal, and a clock pin configured to generate and/or receive a series of clock pulses, so as to facilitate the operation of the PMIC.

Abstract: Voltage regulators generate voltage rails that power a central processing unit (CPU). The CPU communicates power management instructions to a power supply controller that drives the voltage regulators. The power supply controller sets a voltage level of a voltage rail generated by a voltage regulator in accordance with a power management instruction received from the CPU. The power supply controller enables the voltage regulator to operate in discontinuous conduction mode (DCM) independent of power state commands from the CPU.

Abstract: A multi-input single output power system for outputting an output voltage on an output node. It includes a first integrated circuit (IC) converter device and a second IC converter device. The first IC converter device has a first pin to receive a first input voltage, a second pin to output the output voltage, and a first power unit coupled between the first pin and the second pin. The second IC converter device has a first pin to receive a second input voltage, a second pin to output the output voltage, a second power unit coupled between the first pin of the second IC converter device and the second pin of the second IC converter device, and a third pin. The third pin receives an external phase shedding control signal to determine whether to stop the second power unit from providing power to the output node.

Abstract: A feedback control circuit in an LED driving circuit for driving a plurality of LED strings. Each LED string provides a headroom detecting voltage. The feedback control circuit has a status detecting circuit, a counting circuit and a modulating circuit. The status detecting circuit compares each headroom detecting voltage with a low headroom threshold voltage and a high headroom threshold voltage and generates an up self-status signal and a down self-status signal. The counting circuit counts or keeps unchanged and then generates a counting signal based on the up self-status signal and the down self-status signal. The modulating circuit generates a modulating signal based on the counting signal. And based on the modulating signal, the feedback control circuit generates a feedback control signal to regulate a bias voltage supplying the plurality of LED strings.

Abstract: A trans-inductor voltage regulator (TLVR) circuit has multiple phases and a switching circuit for each phase. Each switching circuit has a winding of a transformer as an output inductor. The other windings of the transformers are connected in series with a nonlinear compensation inductor. An on-time period of each switching circuit is reduced when a load transient condition occurs or when a load current starts to be stable after the load transient condition.

Abstract: The present disclosure describes vertical transistor device and methods of making the same. The vertical transistor device includes substrate layer of first conductivity type, drift layer of first conductivity type formed over substrate layer, body region of second conductivity type extending vertically into drift layer from top surface of drift layer, source region of first conductivity type extending vertically from top surface of drift layer into body region, dielectric region including first and second sections formed over top surface, buried channel region of first conductivity type at least partially sandwiched between body region on first side and first and second sections of dielectric region on second side opposite to first side, gate electrode formed over dielectric region, and drain electrode formed below substrate layer. Dielectric region laterally overlaps with portion of body region. Thickness of first section is uniform and thickness of second section is greater than first section.

Abstract: A FET device has a substrate, a plurality of repetitive source stripes, a first layout of drain stripe having a first drift region and a first drain region, a second layout of drain stripe having a second drift region and a second drain region, a first drain contactor contacted with the first drain region and connected to a drain terminal, a second drain contactor contacted with the second drain region and connected to a first gate terminal, a source contactor contacted with a source region in each of the plurality of repetitive source stripes and connected to a source terminal, a first gate region positioned between the source region and the first drain region and connected to the first gate terminal, and a second gate region positioned between the source region and the second drain region and connected to a second gate terminal.

Abstract: Junction field effect transistors (JFETs) and related manufacturing methods are disclosed herein. A disclosed JFET includes a vertical channel region located in a mesa and a first channel control region located on a first side of the mesa. The first channel control region is at least one of a gate region and a first base region. The JEFT also includes a second base region located on a second side of the mesa and extending through the mesa to contact the vertical channel region. The vertical channel can be an implanted vertical channel. The vertical channel can be asymmetrically located in the mesa towards the first side of the mesa.

Abstract: A control method for regulating the switching frequency of a resonant converter having an input terminal to receive an input voltage and an output terminal to output an output voltage. The control method is sensing the input voltage and adjusting the switching frequency based on the comparison of the input voltage with a reference threshold voltage. When the input voltage is less than the reference threshold voltage, the switching frequency is adjusted to decrease, and when the input voltage is higher than the reference threshold voltage, the switching frequency is adjusted to increase.

Abstract: A voltage converter with a high side power switch, having: an off control circuit, having a first input terminal configured to receive an input voltage, a second input terminal configured to receive an output voltage, a third input terminal configured to receive a current representing signal indicative of a current flowing through the high side power switch, a fourth input terminal configured to receive an on-set signal in response to an on operation of the high side power switch, and an output terminal configured to provide an off control signal to indicate an end of an on time period of the high side power switch; wherein the on time period of the high side power switch is regulated by the input voltage, the output voltage and the current representing signal.

Abstract: Voltage regulators generate voltage rails that power a central processing unit (CPU). The CPU communicates power management instructions to a power supply controller that drives the voltage regulators. The power supply controller sets a voltage level of a voltage rail generated by a voltage regulator in accordance with a power management instruction received from the CPU. The power supply controller enables the voltage regulator to operate in discontinuous conduction mode (DCM) independent of power state commands from the CPU.

Abstract: The present disclosure describes vertical transistor device and methods of making the same. The vertical transistor device includes substrate layer of first conductivity type, drift layer of first conductivity type formed over substrate layer, body region of second conductivity type extending vertically into drift layer from top surface of drift layer, source region of first conductivity type extending vertically from top surface of drift layer into body region, dielectric region including first and second sections formed over top surface, buried channel region of first conductivity type at least partially sandwiched between body region on first side and first and second sections of dielectric region on second side opposite to first side, gate electrode formed over dielectric region, and drain electrode formed below substrate layer. Dielectric region laterally overlaps with portion of body region. Thickness of first section is uniform and thickness of second section is greater than first section.