Abstract: An isolated resonant converter has an analog comparator with hysteresis for generating a first ON/OFF signal, a digital isolator for outputting a second ON/OFF signal, an oscillator for providing a clock pulse signal with a frequency, and a primary pulse width modulator coupled to receive the clock pulse signal and the second ON/OFF signal. An output voltage of the isolated resonant converter is controlled by the analog comparator within a predefined range. The second ON/OFF signal is electrically isolated from the first ON/OFF signal. The primary pulse width modulator controls the switching of the isolated resonant converter in response to the clock pulse signal during the logic high state of the second ON/OFF signal and stops the switching of the isolated resonant converter during the logic low state of the second ON/OFF signal.

Abstract: A power supply covering both power sharing and power backup functions run in a more efficient and flexible way. The power supply adopts a power sharing converter coupled between a first bus terminal and a second bus terminal, so that if one of the bus terminals provides insufficient power, the other bus terminal kicks in by way of the power sharing converter to provide power support. In addition, a storage capacitor may also kick in to provide power support if one of the bus terminals provide insufficient power via or not via the power sharing converter.

Abstract: A power supply covering power sharing and overshoot preventing functions. In the power supply, a first eFuse is used to deliver a first input power source to a first load at a first bus terminal, and a second eFuse is used to deliver a second input power source to a second load at a second bus terminal. When the current flowing through one eFuse hits its current limit threshold, the other input power source kicks in to provide power support. The current limit threshold of each eFuse is set to be lower than its maximum rated current.

Abstract: A driver for driving a power transistor, the driver having: a first transistor, and a second transistor; wherein (1) when the first transistor is turned on, the second transistor is simultaneously turned on, and wherein after the second transistor remains on for a first time period, the second transistor is turned off for a second time period during when a switching voltage at a second terminal of the power transistor is rising, and the second transistor is turned on after the second time period is over; and (2) when the first transistor is turned off, the second transistor is simultaneously turned off.

Abstract: A power management system having: a core rail, configured to provide a core voltage to a core; a GT rail, configured to provide a GT voltage to a graphic terminal; and a VR thermal indicative pin, coupled to a core thermal indicative pin of the core; wherein the VR thermal indicative pin is pulled down for a preset time duration once the core rail is commanded to exit a PS4 state, or for a time duration beginning when the core rail is commanded to exit the PS4 state ending when the GT rail is commanded to exit the PS4 state.

Abstract: An auto-loop regulation system for a voltage regulator receives a plurality of pre-determined loop parameters through an interactive computing equipment, and the voltage regulator operates according to the plurality of pre-determined loop parameters, wherein the interactive computing equipment regulates at least one of the loop parameters automatically in real time according to an online loop value when the voltage regulator is operating online, and the interactive computing equipment keeps regulating the loop parameters until the online value of the voltage regulator matches with a target value.

Abstract: A circuit assembly for a power converter includes a substrate, power stage integrated circuit (IC) dies, and output inductors that connect switch nodes of the power stage IC dies to an output node of the power converter. The power stage IC dies are mounted on one side of the substrate and the output inductors are mounted on an opposing side of the substrate. Two output inductors go through a magnetic core. A heatsink is attached to surfaces of the power stage IC dies. A power stage IC die has a pair of switching transistors, and a switch node formed by the switching transistors is connected by an output inductor to the output node of the power converter.

Abstract: An LDMOS device with a field plate contact having a field plate contact metal layer being positioned above the field plate contact. The field plate contact metal layer has a sub-maximum size satisfied for the electrical connection between the field plate contact and an external applying voltage. This sub-maximum size is prescribed by the physical limitation of the LDMOS device. The field plate contact metal layer extends a sub-maximum length from one edge toward to the other edge of the field plate contact.

Abstract: A battery management system (BMS) used in a battery pack, the battery pack has a discharging switch coupled between a battery and a load, and the load has a capacitor charged by the battery pack. The BMS has a driver circuit having a power supply terminal to receive a drive voltage, a ground reference terminal coupled to receive the battery pack voltage and an output terminal coupled to a control terminal of the discharging switch. The BMS generates a normal drive voltage and a ramp drive voltage, and the normal drive voltage is selected as the drive voltage when the voltage difference between the battery voltage and the battery pack voltage is less than a threshold voltage, and the ramp drive voltage is selected as the drive voltage when the voltage difference between the battery voltage and the battery pack voltage is higher than the threshold voltage.

Abstract: A circuit assembly for a power converter includes a substrate, power stage integrated circuit (IC) dies, and output inductors that connect switch nodes of the power stage IC dies to an output node of the power converter. The power stage IC dies are mounted on one side of the substrate and the output inductors are mounted on an opposing side of the substrate. Two output inductors go through a magnetic core. A heatsink is attached to surfaces of the power stage IC dies. A power stage IC die has a pair of switching transistors, and a switch node formed by the switching transistors is connected by an output inductor to the output node of the power converter.

Abstract: A LED driving system for a LED matrix having a plurality of LEDs connected in parallel. The LED driving system includes a plurality of driving modules. Each one of the plurality of driving modules drives a corresponding one of the plurality of LEDs. The plurality of LEDs are divided into a plurality of groups. The plurality of driving modules drive the plurality of LEDs ON successively group by group. In each one of the plurality of groups, the LESs are driven ON successively row by row, and for each row in each one of the plurality of groups, the LEDs are driven ON successively column by column with a programmed delay time between the LEDs in every two successive columns. Each one of the plurality of driving modules can include a grayscale control module for adjusting a brightness of the corresponding one of the plurality of LEDs.

Abstract: A circuit assembly for a power converter includes power stage blocks and heat-dissipating substrate. A power stage block includes a power stage IC die, an output inductor that is connected to a switch node of the power stage IC die, and capacitors that form an output capacitor of the power stage block. The output capacitors of the power stage blocks are symmetrically arranged. The output inductors can be placed on the same side of the substrate as the power stage IC dies, or on a side of the substrate that is opposite to the side where the power stage IC dies are disposed. A power stage block may generate two output phases of the power converter.

Abstract: A control circuit and method for a voltage converter. The control circuit having a ramp circuit, a reference generating circuit, a comparison circuit and a logic circuit. The ramp circuit generates a ramp signal that decreases from the moment the power switch is turned off and increases from the moment the power switch is turned on. The reference generating circuit generates a reference voltage. The comparison circuit compares the reference voltage with the sum of the feedback voltage and the ramp signal to generate a comparison signal. The logic circuit uses the comparison signal and a clock signal to generate the control signal to control a power switch of the voltage converter.

Abstract: A power supply covering both power sharing and power backup functions run in a more efficient and flexible way. The power supply adopts a power sharing converter coupled between a first bus terminal and a second bus terminal, so that if one of the bus terminals provides insufficient power, the other bus terminal kicks in by way of the power sharing converter to provide power support. In addition, a storage capacitor may also kick in to provide power support if one of the bus terminals provide insufficient power via or not via the power sharing converter.

Abstract: A voltage regulator has a switching circuit and a control circuit. The switching circuit provides an output voltage and an output current. The control circuit provides a switching control signal to the switching circuit to adjust the output voltage, such that the output voltage decreases with a first slope as the output current increases when the output current is less than a first current level, the output voltage decreases with a second slope as the output current increases when the output current is larger than the first current level and is less than a second current level, and the output voltage decreases with a third slope as the output current increases when the output current is larger than the second current level.

Abstract: A smart communication interface for a LED driving system driving a LED matrix having a plurality of LEDs. The smart communication interface may have a data write transaction structure in write mode. The data write transaction structure includes an address code for identifying a corresponding one LED among the plurality of LEDs; an R/W indicating code for indicating whether the smart communication interface is in write mode; and a grayscale command code for indicating a programmed grayscale command value for the corresponding one LED identified by the address code. The smart communication interface may include a data read transaction structure in read mode. The data read transaction structure includes the address code, the R/W indicating code and a grayscale read-back code for indicating a grayscale command value for the corresponding one LED identified by the address code.

Abstract: An integrated circuit (IC) chip includes a copper structure with an intermetallic coating on the surface. The IC chip includes a substrate with an integrated circuit. A metal pad electrically connects to the integrated circuit. The copper structure electrically connects to the metal pad. A solder bump is disposed on the copper structure. The surface of the copper structure has a coating of intermetallic. The copper structure can be a redistribution layer and a copper pillar that is disposed on the redistribution layer.

Abstract: A current sensing system uses a Hall effect device. A conductor carrying a target current is shaped in a way such that two regions with opposite magnetic field directions crossed there through are created at a silicon die which contains the Hall effect devices placed in a mirror way. The Hall effect devices react the magnetic field to generate a Hall voltage when a bias current is applied, which is then processed by a process circuit and an operational unit, so that a differential signal indicative of the target current is generated.

Abstract: A circuit assembly for a power converter includes power stage blocks and heat-dissipating substrate. A power stage block includes a power stage IC die, an output inductor that is connected to a switch node of the power stage IC die, and capacitors that form an output capacitor of the power stage block. The output capacitors of the power stage blocks are symmetrically arranged. The output inductors can be placed on the same side of the substrate as the power stage IC dies, or on a side of the substrate that is opposite to the side where the power stage IC dies are disposed. A power stage block may generate two output phases of the power converter.

Abstract: An electrical circuit includes a monolithic integrated circuit (IC) switch device that includes a first pin, a second pin, and a power switch that connects the first pin to the second pin through the power switch when the electrical circuit is turned ON. The monolithic IC switch device includes an adaptive safe operating area (SOA) circuit that limits allowable current through the power switch based on temperature, such as the temperature of the power switch.