Abstract: A short protection circuit for protecting a power switch. The short protection circuit has a transistor and compares a differential voltage between a first end of the power switch and a second end of the power switch to a threshold voltage of the transistor only when the power switch is in an ON state; and wherein when the differential voltage is higher than the threshold voltage, the short protection circuit turns off the power switch.

Abstract: A current control circuit and associated method are disclosed hereby. The current control circuit has a fly-wheel circuit, comprising an inductor, a rectifier and a load; a current sense circuit, detecting a load current, configured to generate a first current signal; a compensating circuit, generating a compensating signal; a control circuit, generating a control signal according to the first current signal and the compensating signal; a first switch, coupled to the fly-wheel circuit, turned ON and OFF according to the control signal. By the effect of the compensating signal, the drift error of the average load current is prohibited.

Abstract: A step-down regulator comprising a pseudo constant on time control circuit is disclosed, comprising an on-time generator configured to receive a switching signal provided by the step-down regulator and a control signal provided by the pseudo constant on time control circuit, and generates an on-time signal; a feedback control circuit configured to receive a feedback signal representative of the output voltage of the step-down regulator and generate an output signal; and a logic control circuit coupled to the on-time generator and the feedback control circuit to receive the on-time signal and the output signal and generating the control signal, and a power stage configured to receive an input voltage and the control signal and generate the switching signal.

Abstract: A constant on-time switching converter includes a switching circuit, an on-time control circuit, a comparing circuit and a logic circuit. The switching circuit has a first switch and is configured to provide an output voltage to a load. The on-time control circuit generates an on-time control signal to control the on-time of the first switch. The comparing circuit compares the output voltage of the switching circuit with a reference signal and generates a comparison signal. The logic circuit generates a control signal to control the first switch based on the on-time control signal and the comparison signal. When the switching frequency of the switching circuit approaches an audible range, the switching converter enters into a sleep mode, the on-time control signal is reduced to increase the switching frequency of the switching circuit.

Abstract: The present disclosure discloses a lateral transistor and associated method for making the same. The lateral transistor comprises a gate formed over a first portion of a thin gate dielectric layer, and a field plate formed over a thick field dielectric layer and extending atop a second portion of the thin gate dielectric layer. The field plate is electrically isolated from the gate by a gap overlying a third portion of the thin gate dielectric layer and is electrically coupled to a source region. The lateral transistor according to an embodiment of the present invention may have reduced gate-to-drain capacitance, low specific on-resistance, and improved hot carrier lifetime.

Abstract: The present disclosure discloses a field effect transistor (“FET”), a termination structure and associated method for manufacturing. The termination structure for the FET includes a plurality of termination cells arranged substantially in parallel from an inner side toward an outer side of a termination area of the FET. Each of the termination cells comprises a termination trench and a guard ring region located underneath the bottom of the termination trench in the semiconductor layer. Each termination trench is lined with a termination insulation layer, and is filled with a first conductive spacer and a second conductive spacer respectively against an inner sidewall and an outer sidewall of the termination trench and spaced apart from each other with a space, and a dielectric layer filling the space between the first and the second spacers.

Abstract: A controller used in a buck-boost converter includes a clock generator, an error amplifying circuit, a comparing circuit, a proportional sampling circuit, a logic circuit, a pulse width increasing circuit, first and second driving circuits. Based on a clock signal generated by the clock generator, the proportional sampling circuit samples the difference between a current sensing signal and a compensation signal generated by the error amplifying circuit, and generates a proportional sampling signal. The pulse width increasing circuit generates a sum control signal based on the proportional sampling signal and a logic control signal generated by the logic circuit, wherein a modulation value adjusted by the proportional sampling signal is added to the pulse width of the logic control signal to generate the pulse width of the sum control signal. The first and second driving circuits generate driving signals based on the sum control signal and the logic control signal.

Abstract: Light emitting diode (LED) dimming and driver systems and associated methods of control are disclosed herein. In one embodiment, a system comprises a PFC stage and an LED driver stage. The LED driver stage comprises an isolated converter and a controller responsive to a dimming signal to dim LED strings for backlight. The controller also regulates an output current of the isolated converter.

Abstract: A method for driving an LED lighting device includes receiving an input voltage from a battery unit and converting the input voltage into a driving current to drive the LED lighting device. The method further includes detecting whether the battery unit is in a low battery state. When the low battery state of the battery unit is detected, the driving current is reduced.

Abstract: A method of fabricating an LDMOS device includes: forming a gate of the LDMOS device on a semiconductor substrate; performing tilt body implantation by implanting dopants of a first conductivity type in the semiconductor substrate using a mask, wherein the tilt body implantation is implanted at an angle from a vertical direction; performing zero tilt body implantation by implanting dopants of the first conductivity type using the same mask, wherein the zero tilt body implantation is implanted with zero tilt from the vertical direction, and wherein the tilt body implantation and the zero tilt body implantation are configured to form a body region of the LDMOS device; and forming a source region and a drain contact region of the LDMOS device, wherein the source region and the drain contact region are of a second conductivity type.

Abstract: The present disclosure discloses a light emitting element driving circuit. In one embodiment the light emitting element driving circuit may comprise a power conversion circuit and a current balancing circuit. In other embodiment the light emitting element driving circuit may further comprise other modules integrated and interacting with the power conversion circuit and the current balancing circuit, such as fault detection and protection circuits, status indication circuits and phase-shift PWM dimming circuits. In other embodiment, the present disclosure further discloses a current balancing circuit. In other embodiment, the present disclosure further discloses a fault detection and protection circuit. In still other embodiment, the present disclosure further discloses a phase-shift PWM dimming circuit.

Abstract: A switching mode power supply comprising a synchronous rectifying control circuit. The synchronous rectifying control circuit comprising an integrating circuit, a first comparison circuit and a logic circuit. The integrating circuit is configured to provide an integrating signal. The first comparison circuit comprises a first input coupled to the output of the integrating signal, a second input configured to receive a first threshold signal, and an output. The logic circuit comprises a first input coupled to the output of the first comparison circuit and an output coupled to a control terminal of the secondary switch, and the secondary switch is configured to be turned OFF when the integrating signal is less then the first threshold signal.

Abstract: A method for driving an LED lighting device includes receiving an input voltage from a battery unit and converting the input voltage into a driving current to drive the LED lighting device. The method further includes detecting whether the battery unit is in a low battery state. When the low battery state of the battery unit is detected, the driving current is reduced.

Abstract: A power converter having a bootstrap refresh control circuit and a method for controlling the power converter. The bootstrap refresh control circuit is configured to monitor a bootstrap voltage across a bootstrap capacitor and to provide an enhanced high side driving signal to a high side switch of the power converter. The bootstrap refresh control circuit is further configured to controlling the charging of the bootstrap capacitor through regulating the on and off switching of the high side switch and a low side switch based on the bootstrap voltage. The bootstrap refresh control circuit can refresh the bootstrap voltage in time to support driving the high side switch normally, without causing large spikes in an output voltage of the power converter and without influencing the power conversion efficiency of the power converter.

Abstract: A switch mode power supply system has a constant on-time signal generator, a logic circuit, a feedback circuit, a first ramp signal generator, a second ramp signal generator, a switch circuit having a power switch, and a comparator. A feedback signal from the feedback circuit is compensated by the first ramp signal generator, and a reference signal is compensated by the second ramp signal generator. The comparator compares the compensated feedback signal with the compensated reference signal to indicate an off time of the power switch while the constant on-time signal generator decides the on-time of the power switch.

Abstract: An ESD protection structure and a semiconductor device having an ESD protection structure with the ESD protection structure including a patterned conductive ESD protection layer. The ESD protection layer is patterned to have a first portion of a substantially closed ring shape having an outer contour line and an inner contour line parallel with each other. The outer and the inner contour lines are waved lines. The first portion further has a midline between and parallel with the outer and the inner contour lines. The midline is a waved line having a substantially constant curvature at each point of the midline. Therefore the ESD protection layer has a substantially uniform curvature and an increased perimeter which advantageously improve the breakdown voltage and the current handling capacity of the ESD protection structure.

Abstract: The present invention provides an off time control method and switching regulator using it. The current flowing through a switch is compared with a current threshold, and the switch is turned off if the current flowing through the switch is larger than the current threshold. The off time of the switch is determined by the load. The current threshold is variable at light load to prevent generating the audible noise and improve the whole efficiency.

Abstract: A LED driver comprising: a power switch; a transformer comprising a primary winding coupled to the power switch, a secondary winding and a third winding; a current sense circuit configured to sense a current flowing through the power switch and generates a current sense signal; a zero cross detecting circuit configured to detect a current flowing through the secondary winding, and generates a zero cross detecting signal; a compensation circuit configured to compensate the current sense signal based on the current flowing through the third winding; a control circuit configured to receive the compensated current sense signal and the zero cross detecting signal, and wherein the control circuit generates a control signal to control the power switch.

Abstract: A switching regulator configured to provide an output voltage comprises a power stage, an error correction circuit, a comparator, an ON-time generator and a logic circuit. The error correction circuit generates an error correction voltage based on a reference voltage and a feedback voltage representative of the output voltage. The comparator compares the feedback voltage with the difference between the reference voltage and the error correction voltage, and generates a comparison signal. The ON-time generator is configured to provide an ON-time signal. The logic circuit generates a logic control signal to control the power stage based on the comparison signal and the ON-time signal.

Abstract: A switching mode power supply, having: a power switch; an energy storage component coupled to the power switch; a current sense resistor configured to generate a current sense signal; a mode select resistor configured to generate a mode select resistor; a ZCD (Zero Cross Detecting) circuit configured to generate a ZCD signal; and a control circuit configured to provide a switch control signal to control the on and off of the power switch, the control circuit having a multi-function pin configured to receive the mode select signal, the current sense signal and the ZCD signal.