Abstract: LED driver systems and associated methods of control are disclosed herein. In one embodiment, the LED driver system comprises a converter and a controller. The controller is responsive to the LED current feedback signal and a dimming signal, and operable to generate a continuous gate drive signal to control the primary side switch of the converter. Thus, the controller regulates the output current of the converter.

Abstract: A switching regulator including: a power stage having a first power switch and a second power switch coupled in series; a filter circuit having an inductor and an output capacitor; a feedback circuit configured to provide a feedback signal indicating an output voltage of the regulator; and a control circuit configured to provide a switching signal to control the ON and OFF of the first power switch so as to regulate the energy supplied to a load; wherein the control circuit has a peak current generator configured to generate a peak current signal, wherein the gain of a variation of the peak current signal between the contiguous switching cycles is less than one.

Abstract: A high voltage FET device provides drain voltage information with less overall silicon area consumption by forming a spiral resistance poly structure over a drift region of the high voltage FET device. The spiral resistance poly structure has an inner most end coupled to a drain region, and an outer most end coupled to a reference ground.

Abstract: A switching regulator circuit and a reference compensation module employed for compensating a reference signal in the switching regulator circuit. The switching regulator circuit with a reference ground having an average offset voltage referenced to a package ground pin, wherein the average offset voltage is proportional to an output current of the switching regulator circuit with a first factor. The reference compensation module may be configured to receive a second reference signal having a bandgap reference voltage with respect to the reference ground and a reference compensation signal proportional to the output current with a second factor, and configured to provide the first reference signal based on compensating the second reference signal with the reference compensation signal to substantially cancel out the average offset voltage from the first reference signal with respect to the ground pin.

Abstract: The present application discloses a control circuit of a switching power converter, wherein the switching power converter comprises a power switch, and is configured to convert an input voltage into an output voltage, the control circuit comprises: a first time generating circuit configured to generate a first time signal; a phase lock circuit configured to generate a second time signal; and a switching signal generating circuit configured to generate a switching signal to control the ON and OFF switching of the power switch. The phase lock circuit generates the second time signal in accordance with the frequency difference between the switching signal and a reference clock signal, so as to get the frequency of the switching signal to be substantially equal to the frequency of the reference clock signal.

Abstract: An ESD protection circuit has a clamp control circuit and a clamp switch. The clamp switch has a first terminal, a second terminal and a control terminal, wherein the first terminal is coupled to a first node, and the second terminal is coupled to a second node. The clamp control circuit is coupled between the first node and the second node, wherein the clamp control circuit is configured to detect the rising time of the voltage between the first node and the second node, and to provide a clamp control signal to the control terminal of the clamp switch based on the rising time, if the rising time is shorter than a first time threshold, the clamp switch is turned ON for a second time threshold, and wherein the first time threshold is shorter than the second time threshold.

Abstract: A multiphase converter has a plurality of phase circuits and a plurality of phase control circuits. Each phase circuit has a switch having a control terminal, and the control terminal of the switch may be configured to receive a drive signal. Each phase control circuit may be corresponding to one of the phase circuits, and each phase control circuit may be configured to provide a phase control signal to adjust an ON-time period or a reference signal for the corresponding phase circuit. The phase control signal may be responsive to the drive signal of the corresponding phase circuit.

Abstract: An off-line regulator has a rectification circuit configured to rectify an AC line voltage into a rectified line voltage, a pass device coupled between the rectified line voltage and a first capacitor, and a converter. The pass device is configured to be turned ON or OFF according to a comparison signal indicating whether the rectified line voltage is over a threshold voltage. The first capacitor delivers an interim voltage into the converter which supplies power to a load. Wherein a second capacitor coupled across a driver which driving the pass device is charged by the first capacitor when the comparison signal is at a first state, and the driver is boosted when the comparison signal is at a second state.

Abstract: A SMPS having a switch; an output port coupled to a load, configured to provide a voltage feedback signal and a current feedback signal; an on-time generator, having an input end coupled to the current feedback signal, and having an output end providing a time signal indicating a time period; and a PWM generator, having a first input end coupled to the voltage feedback signal, a second input end coupled to the time signal, and an output end providing a PWM signal that is coupled to the control end of the switch, and wherein the PWM signal is configured to turn ON the switch when the voltage feedback signal is lower than a threshold voltage, and the PWM signal is configured to turn OFF the switch after the time period.

Abstract: The present disclosure discloses a high voltage semiconductor device and the associated methods of manufacturing. In one embodiment, the high voltage semiconductor device comprises: an epitaxial layer, a first low voltage well formed in the epitaxial layer; a second low voltage well formed in the epitaxial layer; a high voltage well formed in the epitaxial layer, wherein the second low voltage well is surrounded by the high voltage well; a first highly doping region formed in the first low voltage well; a second highly doping region and a third highly doping region formed in the second low voltage well, wherein the third highly doping region is adjacent to the second highly doping region; a field oxide formed in the epitaxial layer as a shallow-trench isolation structure; and a gate region formed on the epitaxial layer.

Abstract: Method of forming dual gate insulation layers and semiconductor device having dual gate insulation layers is disclosed. The method of forming dual gate insulation layers comprises forming a first thin layer of a thick gate insulation layer on a semiconductor substrate by oxidizing the semiconductor substrate, depositing a second thicker layer of the thick gate insulation layer on the first thin layer, removing a portion of the thick gate insulation layer to expose a surface area of the semiconductor substrate and forming a thin gate insulation layer on the exposed surface area of the semiconductor substrate. The method of forming dual gate insulation layers, when applied in fabricating semiconductor devices having dual gate insulation layers and trench isolation structures, may help to reduce a silicon stress near edges of the trench isolation structures and reduce/alleviate/prevent the formation of a leaky junction around the edges of the trench isolation structures.

Abstract: A control circuit of a DC/DC converter, wherein the DC/DC converter further comprises a high-side switch and a low-side switch, and wherein the DC/DC converter provides an output signal to a load. The control circuit comprises: an amplifier configured to receive a feedback signal and a reference signal to provide an error signal; a ramp generator configured to provide a ramp signal; a comparator configured to receive the ramp signal and the error signal to provide a comparison signal; and a COT generator configured to receive the comparison signal, to provide a COT signal to control the high-side switch and the low-side switch.

Abstract: Processes of assembling microelectronic packages with lead frames and/or other suitable substrates are described herein. In one embodiment, a method for fabricating a semiconductor assembly includes forming an attachment area and a non-attachment area on a lead finger of a lead frame. The attachment area is more wettable to the solder ball than the non-attachment area during reflow. The method also includes contacting a solder ball carried by a semiconductor die with the attachment area of the lead finger, reflowing the solder ball while the solder ball is in contact with the attachment area of the lead finger, and controllably collapsing the solder ball to establish an electrical connection between the semiconductor die and the lead finger of the lead frame.

Abstract: A controller used in a buck-boost converter includes a clock generator, an error amplifying circuit, a comparing circuit, a proportional sampling circuit, a logic circuit, a pulse width increasing circuit, first and second driving circuits. Based on a clock signal generated by the clock generator, the proportional sampling circuit samples the difference between a current sensing signal and a compensation signal generated by the error amplifying circuit, and generates a proportional sampling signal. The pulse width increasing circuit generates a sum control signal based on the proportional sampling signal and a logic control signal generated by the logic circuit, wherein a modulation value adjusted by the proportional sampling signal is added to the pulse width of the logic control signal to generate the pulse width of the sum control signal. The first and second driving circuits generate driving signals based on the sum control signal and the logic control signal.

Abstract: A field effect transistor (“FET”), a termination structure and associated method for manufacturing. The FET has a plurality of active transistor cells and a termination structure. The termination structure for the FET includes a plurality of termination cells arranged substantially in parallel from an inner side toward an outer side of a termination area of the FET. Each of the termination cells comprises a termination trench lined with a termination insulation layer and filled with a termination conduction layer. The innermost termination cell is electrically coupled to gate regions of the active transistor cells while the rest of the termination cells are electrically floating.

Abstract: A LED driver system includes a LED converter converting an input voltage to an output voltage to drive a LED load via a main switch; a sensing circuit generating a feedback signal on the output terminal according to a load current through the LED load; an over-shoot detecting circuit generating an over-shoot signal according to the load current and a second reference signal; a logic circuit generating a switching signal according to a control signal and the over-shoot signal to control the main switch. The control signal is generated according to the feedback signal and a first reference signal, and the second reference signal is larger than the first reference signal.

Abstract: A method having a negative output voltage at a negative output terminal of a charge pump tracking a positive output voltage at a positive output terminal of the charge pump. The charge pump comprises a plurality of switches and each of the plurality of switches has a serially coupled resistance. The method comprises selecting the serially coupled resistance for at least one of the plurality of switches to be different to each of the other respective serially coupled resistances associated to the other switches.

Abstract: A switch-mode power supply includes a converter, a controller and a charging current. The charging current includes a logic circuit, a first current source and a second current source, to generate a charging current proportional to an input voltage of the switch-mode power supply, and also to generate a logic control signal indicative of either of two operation modes.

Abstract: The present invention provides a controller used in a TRIAC dimmer compatible LED driver and method thereof. The controller comprises a dimming signal generator, a dimming signal processor and a switch control circuit. The dimming signal generator receives an AC chopped voltage from a TRIAC dimmer and generates a dimming signal with regulated duty cycle in accordance with the AC chopped voltage. The dimming signal processor is coupled to the dimming signal generator and generates a processed dimming signal in accordance with the dimming signal. The duty cycle of the processed dimming signal is a sum of a predetermined duty cycle and the duty cycle of the dimming signal. Based on the processed dimming signal and a feedback signal indicative of the current flowing through LED, the switch control circuit generates a control signal to control at least one switch in a switching converter.

Abstract: A LED driving system comprising: an input port to receive an input signal; a switch node to provide a switching signal; an energy storage component coupled between the input port and the switch node; a main switch coupled between the switch node and ground; n output lines coupled in parallel, and each output line having a first and second terminals, and wherein the first terminal is coupled to the switch node, and the second terminal is coupled the reference ground, and wherein each output line having an output switch, a diode and a LED string coupled in series between the first and second terminals, and wherein each output line having a capacitor coupled in parallel with the LED string; and a controller providing a control signal to the main switch and providing corresponding n control signals to the corresponding n output switches in the corresponding n output lines.