Abstract: A Schottky diode and a method of manufacturing the Schottky diode are disclosed. The Schottky diode has an N-well or N-epitaxial layer with a first region, a second region substantially adjacent to an electron doped buried layer that has a donor electron concentration greater than that of the first region, and a third region substantially adjacent to the anode that has a donor electron concentration that is less than that of the first region. The second region may be doped with implanted phosphorus and the third region may be doped with implanted boron.
Abstract: A sample and hold circuit and the method thereof are disclosed. The sample and hold circuit may be applied in voltage regulators or other circuits. The sample and hold circuit comprises: an input terminal configured to receive an input signal; an output terminal configured to provide an output signal; a control circuit configured to receive the input signal and the output signal, and wherein based on the input signal and the output signal, the control circuit generates a digital signal, and wherein the digital signal increases when the output signal is lower than the input signal, and maintains when the output signal is larger than or equal to the input signal; a digital-to-analog converter (DAC) configured to convert the digital signal to the output signal.
Type:
Grant
Filed:
June 29, 2012
Date of Patent:
August 12, 2014
Assignee:
Chengdu Monolithic Power Systems Co., Ltd.
Inventors:
Yike Li, Xiaoyu Xi, Fei Wang, Zhengxing Li
Abstract: The present invention discloses a method of manufacturing an N-type LDMOS device. The method comprises forming a gate above the semiconductor substrate; forming a body, comprising forming a Pwell apart from the gate and forming a Pbase partly in the Pwell, wherein the Pbase is wider and shallower than the Pwell; and forming an N-type source and a drain contact region. Wherein the body curvature of the LDMOS device is controlled by adjusting the layout width of the Pwell.
Abstract: The embodiments of the present circuit and method disclose a bridge rectifier and a driving circuit. The bridge rectifier having a first input, a second input, a first output, and a second output may comprise two high side diodes and two low side switches. The driving circuit may be coupled to the first input of the bridge rectifier and the second input of the bridge rectifier, and the driving circuit may be configured to provide a first driving signal and a second driving signal. The first driving signal may be coupled to a first low side switch and the second driving signal may be coupled to a second low side switch. The first driving signal may be limited to less than a first predetermined driving voltage and the second driving signal may be limited to less than a second predetermined driving voltage.
Type:
Grant
Filed:
February 21, 2012
Date of Patent:
August 5, 2014
Assignee:
Chengdu Monolithic Power Systems Co., Ltd.
Abstract: A light emitting diode (LED) driver circuit controls switching of an output transistor. The LED driver circuit monitors inductor current flowing through an output inductor that is coupled to one or more LEDs. In response to detecting that the inductor current has reached a peak value, the LED driver circuit switches OFF the output transistor. The LED driver circuit switches ON the output transistor in response to detecting zero crossing of the inductor current. The LED driver circuit may detect zero crossing of the inductor current from a gate voltage of the output transistor by detecting for a negative spike.
Abstract: The present invention provides a power supply for processor and control method thereof. The power supply comprises a reference adjusting circuit and a voltage regulator. The reference adjusting circuit is configured to receive a VID code from a processor, and adjust a reference voltage based on the VID code. The voltage regulator is coupled to the reference adjusting circuit and converts an input voltage into an output voltage in accordance to the reference voltage. The reference adjusting circuit adjusts the reference voltage in a plurality of steps until the reference voltage reaches a target value corresponding to the VID code. The reference adjusting circuit adjusts the reference voltage by a preset value during each step, and proceeds to adjust the reference voltage by a next step only after the output voltage reaches a predetermined scope of the reference voltage.
Abstract: A high voltage circuit layout structure has a P-type substrate; a first N-type tub, a second N-type tub, a third N-type tub, a first P-type tub with a first width and a second P-type tub with a second width formed on the P-type substrate; wherein the first P-type tub is formed between the first N-type tub and the second N-type tub; and the second P-type tub is formed between the second N-type tub and the third N-type tub.
Abstract: A voltage regulator with adaptive hysteretic control. The voltage regulator may include a top switch (e.g., MOSFET) configured to couple a power supply supplying an input voltage to a load. An adaptive hysteretic control circuit of the voltage regulator may turn on the top switch when the feedback voltage reaches the low threshold and turn off the top switch when the feedback voltage reaches the high threshold. The adaptive hysteretic control circuit may adjust the upper and lower threshold to make the voltage regulator working like a constant on time control circuit in steady state. When a step down transient happens, the top switch could be turned off when the output voltage reaches the upper threshold, and when a step up transient happens, the top switch could be turned on when the output voltage reaches the lower threshold, it makes the voltage regulator working like a hysteretic control circuit.
Abstract: An ESD protection structure and a semiconductor device having an ESD protection structure with the ESD protection structure including a patterned conductive ESD protection layer. The ESD protection layer is patterned to have a first portion of a substantially closed ring shape having an outer contour line and an inner contour line parallel with each other. The outer and the inner contour lines are waved lines. The first portion further has a midline between and parallel with the outer and the inner contour lines. The midline is a waved line having a substantially constant curvature at each point of the midline. Therefore the ESD protection layer has a substantially uniform curvature and an increased perimeter which advantageously improve the breakdown voltage and the current handling capacity of the ESD protection structure.
Type:
Application
Filed:
December 26, 2013
Publication date:
July 3, 2014
Applicant:
Chengdu Monolithic Power Systems, Co., Ltd.
Abstract: A semiconductor device having an ESD protection structure and a method for forming the semiconductor device. The ESD protection structure is formed atop a termination area of the substrate and is electrically coupled between a source metal and a gate metal of the semiconductor device. The ESD protection structure has a first portion adjacent to the source metal, a second portion adjacent to the gate metal and a middle portion between and connecting the first portion and the second portion, wherein the middle portion has a first thickness greater than a second thickness of the first portion and the second portion. Such an ESD protection structure is beneficial to the formation of interlayer vias which are formed to couple the ESD protection structure to the source metal and the gate metal.
Type:
Application
Filed:
December 19, 2013
Publication date:
July 3, 2014
Applicant:
Chengdu Monolithic Power Systems Co., Ltd.
Abstract: A bridgeless PFC (power factor correction) converter with improved efficiency is disclosed. The bridgeless PFC converter comprises: a first input terminal and a second input terminal configured to receive an input AC signal; an output terminal; an inductor set comprising N inductors, wherein a first terminal of each inductor is coupled to the first input terminal; and an output stage comprising (N+1) switching circuits coupled between the output terminal and a ground node.
Type:
Grant
Filed:
December 2, 2011
Date of Patent:
July 1, 2014
Assignee:
Chengdu Monolithic Power Systems Co., Ltd.
Inventors:
Yuancheng Ren, Bo Zhang, Miao Lei, Junming Zhang, James C Moyer, Eric Yang
Abstract: A switch mode power supply having an output terminal configured to provide an output voltage, the switch mode power supply has a first switch and a control circuit. The control circuit is configured to provide a switching control signal to control the first switch. The control circuit is configured to provide the switching control signal based on a first pulse signal having a first frequency and a second frequency for a light load condition, and the control circuit is configured to provide the switching control signal based on a second pulse signal for a non-light load condition.
Type:
Application
Filed:
December 23, 2013
Publication date:
June 26, 2014
Applicant:
Chengdu Monolithic Power Systems Co., Ltd.
Abstract: A power supply system having a voltage source; a load; a filter circuit to filter the voltage provided by the voltage source and to output a filtered voltage; and a follower circuit configured to generate an output signal at an output of the follower circuit based on the filtered voltage, and further wherein the output of the follower circuit is coupled to the load.
Type:
Application
Filed:
December 24, 2013
Publication date:
June 26, 2014
Applicant:
Chengdu Monolithic Power Systems Co. Ltd.
Abstract: A high-voltage transistor device comprises a spiral resistive field plate over a first well region between a drain region and a source region of the high-voltage transistor device, wherein the spiral resistive field plate is separated from the first well region by a first isolation layer, and is coupled between the drain region and the source region. The high-voltage transistor device further comprises a plurality of first field plates over the spiral resistive field plate with each first field plate covering one or more segments of the spiral resistive field plate, wherein the plurality of first field plates are isolated from the spiral resistive field plate by a first dielectric layer, and wherein the plurality of first field plates are isolated from each other, and a starting first field plate is connected to the source region.
Abstract: A method for controlling a multi-phase switching converter with a plurality of switching circuits, including: sensing the output current of the switching circuit and generating a current sensing signal; generating a digital phase current signal based on the current sensing signal; subtracting the digital phase current signal from a current reference signal and generating a current error signal; proportionally integrating the current error signal and generating a first bias signal; conducting a sigma-delta modulation of the first bias signal and generating a second bias signal, wherein the first bias signal is a P-bit digital signal, the second bias signal is a Q-bit digital signal, and P is larger than Q; and adjusting a control signal controlling the switching circuit based on the second bias signal.
Type:
Application
Filed:
December 13, 2013
Publication date:
June 19, 2014
Applicant:
Chengdu Monolithic Power Systems Co., Ltd.
Abstract: A switch mode power supply having an output terminal configured to provide an output voltage, the switch mode power supply has a first switch, a second switch and a control circuit. The control circuit is configured to provide a first switching control signal to turn ON and turn OFF the first switch, and when the switch mode power supply works in a power saving mode, the first switch is turned ON if a voltage feedback signal is less than a reference voltage and a current flowing through the second switch is less than a bias current.
Type:
Application
Filed:
December 10, 2013
Publication date:
June 12, 2014
Applicant:
CHENGDU MONOLITHIC POWER SYSTEMS CO., LTD.
Abstract: A step-down switching mode power supply having: a Buck converter configured to provide power to a load, wherein the Buck converter has a power switch and an energy storage component; a current sense circuit coupled to the power switch to generate a current sense signal; a square circuit configured to generate a first multiply signal indicating the squared value of the input voltage; a multiply circuit configured to generate a product signal based on the first multiply signal and a second multiply signal; a current comparison circuit configured to generate a current comparison signal based on the current sense signal and the product signal; and a logic circuit configured to control the power switch.
Type:
Application
Filed:
December 10, 2013
Publication date:
June 12, 2014
Applicant:
CHENGDU MONOLITHIC POWER SYSTEMS CO., LTD.
Inventors:
Naixing Kuang, Bo Yu, Jiaqi Yu, Qiaoan Zuo
Abstract: A semiconductor device with a substrate, an epitaxy layer formed on the substrate, a plurality of deep wells formed in the epitaxy layer, a plurality of trench gate MOSFET units each of which is formed in top of the epitaxy layer between two adjacent deep well, wherein a trench gate of the trench gate MOSFET unit is shallower than half of the distance between two adjacent deep wells, which may reduce the product of on-state resistance and the gate charge of the semiconductor device.
Type:
Application
Filed:
March 1, 2013
Publication date:
June 12, 2014
Applicant:
CHENGDU MONOLITHIC POWER SYSTEMS CO., LTD.
Inventors:
Rongyao Ma, Tiesheng Li, Donald Disney, Lei Zhang
Abstract: The present invention discloses a Schottky diode. The Schottky diode comprises a cathode region, an anode region and a guard ring region. The anode region may comprise a metal Schottky contact. The guard ring region may comprise an outer guard ring and a plurality of inner guard stripes inside the outer guard ring. And wherein the inner guard stripe has a shallower junction depth than the outer guard ring.
Abstract: A constant on-time converter has an input terminal, an output terminal, a feedback circuit, an operating circuit, a comparison circuit, a timer, a driving circuit and a switching circuit. The operating circuit is coupled to a compensation signal adjusted by a digital controller, and the compensation signal rises up to a predetermined amplitude when a feedback signal is less than a reference signal.
Type:
Grant
Filed:
December 13, 2011
Date of Patent:
June 10, 2014
Assignee:
Chengdu Monolithic Power Systems Co., Ltd.