Abstract: The present invention provides a controller used in a switching power supply. The controller comprises an oscillator, a first comparison circuit and a logic circuit. The oscillator generates a slope compensation signal and a clock signal. The first comparison circuit generates a first comparison signal in accordance with a current sensing signal, a feedback signal and the slope compensation signal. The logic circuit generates a control signal to control the main switch based on the clock signal and the first compensation signal. If the on time of the main switch is longer than the predetermined time period, the slope compensation signal will have a first slew rate during the predetermined time period and a second slew rate out of the predetermined time period, wherein the second slew rate is smaller than the first slew rate.

Abstract: A frequency limitation method used in a quasi-resonant controlled switching regulator is disclosed. The switching frequency is limited by setting a minimum time period, such as a minimum switching period or a minimum OFF time period. The minimum time period is varying according to the difference between the minimum time period of the previous cycle and an offset value, so as to eliminate the audible noise caused by the frequency hopping when the minimum OFF time period is close to the valley of a quasi-resonant signal.

Abstract: The present disclosure discloses a lateral high-voltage transistor and associated method for making the same.

Abstract: A power supply system has a current source configured to provide an output current, a load supplied by the current source, and a current ripple suppression circuit. The current ripple suppression circuit has a first end and a second end, wherein the first end of the current ripple suppression circuit is coupled to the load, and the second end of the current ripple suppression circuit is coupled to a reference ground; wherein the current ripple suppression circuit is configured to suppress the current ripple in the output current and adaptively adjust the output current of the current source at a predetermined current level.

Abstract: A switch mode power supply having an output terminal configured to provide an output voltage, the switch mode power supply has a first switch and a control circuit. The control circuit is configured to provide a switching control signal to turn ON and turn OFF the first switch, an on-time period of the first switch is proportional to a first value when the switch mode power supply works in a power saving mode, and the on-time period of the first switch is proportional to a second value when the switch mode power supply works in a normal mode, wherein the first value is larger than the second value.

Abstract: A split trench-gate MOSFET device and method for forming this device is disclosed. The device has a trench gate structure, comprising a shield electrode and two gate electrodes, wherein a substantial portion of shield electrode region is lower than the gate electrode region, and wherein a portion of the shield electrode region extends to the top surface between the two gate electrodes. The device further comprises a source metal layer, contacting to an initial layer, a well region, the shield electrode and a source region at the top surface, wherein the contact between the source metal layer and the initial layer forms a Schottky diode.

Abstract: A voltage converter includes: an input terminal receiving an input voltage; an output terminal providing an output voltage; a switching circuit having a main switch configured to regulate the output voltage, wherein a control end of the main switch is configured to receive a Pulse Width Modulation (PWM) signal, and the output voltage is controlled according to the duty cycle of the PWM signal; and a protection switch coupled between the input terminal and the switching circuit, and wherein when the output voltage is higher than a reference voltage, the protection switch is turned OFF.

Abstract: A switch mode power supply having an output terminal configured to provide an output voltage, the switch mode power supply has a first switch and a control circuit, wherein the control circuit is configured to receive a current sense signal via a reuse input pin when the first switch is turned ON, and the control circuit is configured to receive a voltage sense signal via a reuse input pin when the first switch is turned OFF.

Abstract: The present technology discloses a high-voltage device comprising a high-voltage transistor and an integrated over-voltage protection circuit. The over-voltage protection circuit monitors a voltage across the high-voltage transistor to detect an over-voltage condition of the high-voltage transistor, and turns the high-voltage transistor ON when the over-voltage condition is detected. Thus, once the high-voltage transistor is in over-voltage condition, the high-voltage transistor is turned ON and can dissipate the power from the over-voltage event through its channel.

Abstract: A switch mode power supply having an output terminal configured to provide an output voltage which is regulated to an output target, the switch mode power supply has a first switch and a control circuit. When the output voltage increases to a first threshold voltage, the control circuit is configured to turn OFF the first switch until a time period expires.

Abstract: An MOS transistor includes a doping profile that selectively increases the dopant concentration of the body region. The doping profile has a shallow portion that increases the dopant concentration of the body region just under the surface of the transistor under the gate, and a deep portion that increases the dopant concentration of the body region under the source and drain regions. The doping profile may be formed by implanting dopants through the gate, source region, and drain region. The dopants may be implanted in a high energy ion implant step through openings of a mask that is also used to perform another implant step. The dopants may also be implanted through openings of a dedicated mask.

Abstract: A switching regulator including: a power stage having a first power switch and a second power switch coupled in series; a filter circuit having an inductor and an output capacitor; a feedback circuit configured to provide a feedback signal indicating an output voltage of the regulator; and a control circuit configured to provide a switching signal to control the ON and OFF of the first power switch so as to regulate the energy supplied to a load; wherein the control circuit has a peak current generator configured to generate a peak current signal, wherein the gain of a variation of the peak current signal between the contiguous switching cycles is less than one.

Abstract: The present invention discloses an off-line regulator. The off-line regulator comprises a rectification circuit configured to rectify an AC line voltage into a rectified line voltage; a pass device coupled between the rectified line voltage and a first capacitor, the pass device is configured to be turned ON or OFF according to a comparison signal indicating whether the rectified line voltage is over a threshold voltage. The first capacitor delivers an interim voltage into a converter which supplies power to a load. Wherein a second capacitor coupled across a driver which driving the pass device is charged by the first capacitor when the comparison signal is at a first state, and the driver is boosted when the comparison signal is at a second state.

Abstract: A constant on-time switching converter includes a switching circuit, an on-time control circuit, a comparing circuit and a logic circuit. The switching circuit has a first switch and is configured to provide an output voltage to a load. The on-time control circuit generates an on-time control signal to control the on-time of the first switch. The comparing circuit compares the output voltage of the switching circuit with a reference signal and generates a comparison signal. The logic circuit generates a control signal to control the first switch based on the on-time control signal and the comparison signal. When the switching frequency of the switching circuit approaches an audible range, the switching converter enters into a sleep mode, the on-time control signal is reduced to increase the switching frequency of the switching circuit.

Abstract: The present disclosure discloses a switching mode power supply with bi-direction buck and boost control. The switching mode power supply enters boost mode when an input signal is higher than a preset threshold to pump the input signal to a higher level; and the switching mode power supply enters buck mode when the input signal breaks down to release the stored energy.

Abstract: The present disclosure discloses a power system with hot-swap with a buck converter. The power system comprises a front stage, a hot-swap stage and a load stage; wherein the hot-swap stage comprises: a buck converter having a switch operate at ON/OFF state to provide a desired output voltage to the load stage with low power loss and optimized thermal design.

Abstract: Method of forming dual gate insulation layers and semiconductor device having dual gate insulation layers is disclosed. The method of forming dual gate insulation layers comprises forming a first thin layer of a thick gate insulation layer on a semiconductor substrate by oxidizing the semiconductor substrate, depositing a second thicker layer of the thick gate insulation layer on the first thin layer, removing a portion of the thick gate insulation layer to expose a surface area of the semiconductor substrate and forming a thin gate insulation layer on the exposed surface area of the semiconductor substrate. The method of forming dual gate insulation layers, when applied in fabricating semiconductor devices having dual gate insulation layers and trench isolation structures, may help to reduce a silicon stress near edges of the trench isolation structures and reduce/alleviate/prevent the formation of a leaky junction around the edges of the trench isolation structures.

Abstract: The present disclosure discloses a high voltage semiconductor device and the associated methods of manufacturing. In one embodiment, the high voltage semiconductor device comprises: an epitaxial layer, a first low voltage well formed in the epitaxial layer; a second low voltage well formed in the epitaxial layer; a high voltage well formed in the epitaxial layer, wherein the second low voltage well is surrounded by the high voltage well; a first highly doping region formed in the first low voltage well; a second highly doping region and a third highly doping region formed in the second low voltage well, wherein the third highly doping region is adjacent to the second highly doping region; a field oxide formed in the epitaxial layer as a shallow-trench isolation structure; and a gate region formed on the epitaxial layer.

Abstract: The present disclosure discloses an EMI capacitor discharger with an active capacitor bleeder which monitors a utility AC source and detects the zero crossing of the utility AC source. When a prolonged period of no zero crossing occurred, the EMI capacitor discharger activates a discharging circuit.

Abstract: Processes of assembling microelectronic packages with lead frames and/or other suitable substrates are described herein. In one embodiment, a method for fabricating a semiconductor assembly includes forming an attachment area and a non-attachment area on a lead finger of a lead frame. The attachment area is more wettable to the solder ball than the non-attachment area during reflow. The method also includes contacting a solder ball carried by a semiconductor die with the attachment area of the lead finger, reflowing the solder ball while the solder ball is in contact with the attachment area of the lead finger, and controllably collapsing the solder ball to establish an electrical connection between the semiconductor die and the lead finger of the lead frame.