Patents Assigned to National Applied Research Laboratories
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Publication number: 20130045374Abstract: The present invention discloses a nano-laminated film with transparent conductive property and water-vapor resistance function and method thereof. The nano-laminated film comprises a plurality of first metal oxide layers and a plurality of second metal oxide layers. Wherein, the first metal layers and the second metal layers are made of different materials, and there is a spinel phase formed between the first metal layers and the second metal layers.Type: ApplicationFiled: April 27, 2012Publication date: February 21, 2013Applicant: NATIONAL APPLIED RESEARCH LABORATORIESInventors: CHIH-CHIEH YU, MENG-YEN TSAI, CHI-CHUNG KEI, BO-HENG LIU, CHIEN-NAN HSIAO
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Publication number: 20130029858Abstract: A method for drug screening is provided. An atomic force microscopy (AFM) is used to obtain quantitative difference. At least one receptor is immobilized on a probe of the AFM and at least one ligand is immobilized on chips. By flowing a candidate drug on the chips or even applying different candidate drugs to different areas of each chip, drug screening is processed through measuring the binding force between the receptor and the ligand. Multiple drugs can be screened without weakening activity of the proteins during repeated drug screening processes. The drug screening process is cost saved and has high quality. Highly effective protein chips can be developed based on the present disclosure.Type: ApplicationFiled: July 27, 2011Publication date: January 31, 2013Applicant: NATIONAL APPLIED RESEARCH LABORATORIESInventors: Hueih-Min Chen, Feng-Sheng Kao
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Publication number: 20130028557Abstract: This patent disclosure is based on silicon instead of LiNbO3, waveguide chip. The disclosed silicon-based multi-function integrated-optic chip comprises of unique design and fabrication features onto it. First, a unique polarization-diversity coupler is designed and fabricated to couple the external light into the silicon waveguide structure. Then TE mode is guided into a silicon slab waveguide, but TM mode is confined and diverted 90 degree in a silicon carbide structure till the chip edges for TM-mode suppression. Second, a unique two-step (vertical and lateral) taper waveguide region is designed and fabricated to bridge the polarization-diversity coupler output with the input of a multi-mode interferometer (MMI) splitter for power loss reduction. In this configuration, MMI may be a 1×2 or 2×2 structure to divide the input TE mode into a 50/50 splitting ratio output to form a Y-junction.Type: ApplicationFiled: July 27, 2011Publication date: January 31, 2013Applicants: NATIONAL TSING HUA UNIVERSITY, NATIONAL APPLIED RESEARCH LABORATORIESInventors: Ming-Chang Lee, Ren-Young Liu
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Patent number: 8352213Abstract: A probe monitoring system for riverbed elevation monitoring at bridge piers is revealed. The system includes a housing, a measuring rod, a moving member, a control module, a photographic unit and a sensing unit. The housing is fixed on the pier. Both the moving member for driving the measuring rod and the control module for control of the moving member are mounted in the housing. When the control module drives the measuring rod to move downward and the sensing unit on the bottom of the measuring rod approaches the riverbed, a sensing signal is sent to the control module. Thus the moving member stops moving the measuring rod and the photographic unit takes pictures of the measuring rod to generate an image. Then the riverbed elevation is obtained according to the image or the movement of the moving member and is sent to a remote monitor unit for real-time monitoring.Type: GrantFiled: July 9, 2010Date of Patent: January 8, 2013Assignee: National Applied Research LaboratoriesInventors: Wen-Yi Chang, Teng-Yi Yu, Jihn-Sung Lai, Whey-Fone Tsai, Franco Lin, Lung-Cheng Lee, Yu-Hui Liao, Ho-Cheng Lien, Chin-Hsiung Loh
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Patent number: 8339452Abstract: A monitor system for monitoring riverbed elevation changes at bridge piers is revealed. The monitor system includes a container, a rail, a holder, a photographic unit, a processor and a transmission unit. The container is disposed at a pier under the water and the rail is mounted in the container. The holder is arranged at the rail and is moved on the rail. The photographic unit is disposed on the holder to capture a monitor image of a riverbed under the water. As to the processor, it processes the monitor image so as to learn elevation change of the riverbed under the water. By the transmission unit, the riverbed elevation change is sent to a remote monitor unit so as to get the riverbed elevation according to the riverbed elevation change. Thus the riverbed elevation change at the bridge pier is monitored in real time.Type: GrantFiled: November 17, 2009Date of Patent: December 25, 2012Assignee: National Applied Research LaboratoriesInventors: Wen-Yi Chang, Whey-Fone Tsai, Jihn-Sung Lai, Yu-Hui Liao, Ho-Cheng Lien, Lung-Cheng Lee, Franco Lin, Te-lin Chung, Jyh-Horng Wu, Yi-Haur Shiau
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Patent number: 8333018Abstract: The present invention discloses a composition for enhancing evaporation of a solution and a method thereof. A far-infrared ray is released by a far-infrared releasing substance in the composition so as to induce evaporation of the solution. The far-infrared releasing substance may be ceramic minerals and mainly comprises 80˜99.9 wt % of oxide minerals including 60˜95 wt % of the aluminum oxide. The present invention can enhance evaporation of the solution by a simple physical method. Hence, the present invention not only promotes the application of the products but also reduces the pollutants generated by a chemical reaction, thereby achieving the object of protecting the environment from the pollution.Type: GrantFiled: February 23, 2010Date of Patent: December 18, 2012Assignee: National Applied Research LaboratoriesInventors: Yung-Sheng Lin, Ting-Kai Leung, Chien-Chung Chen, Jiann-Shiun Kao
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Patent number: 8316589Abstract: A dual-core self-centering brace apparatus is mounted to a building, and includes a first core member, at least one second core member, an outer sleeve disposed around the first and second core members, two inner abutment plates abutting respectively against two ends of the first core member, two outer abutment plates abutting respectively against two ends of the second core member, a plurality of tensioning members, and an energy-dissipating unit for retarding relative movement of the first core member and the outer sleeve. When subjected to an external force, the length of each of the tensioning elements is increased by an elongation amount, and the total length of the first core member and the outer sleeve is increased by an amount that is two times the elongation amount.Type: GrantFiled: April 8, 2011Date of Patent: November 27, 2012Assignee: National Applied Research LaboratoriesInventors: Chung-Che Chou, Ying-Chuan Chen, Ping-Ting Chung
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Patent number: 8310727Abstract: A method to generate random and density controllable dot patterns on an optical device includes steps of dividing a 2D domain into multiple cell units; determining dot density in each cell; creating at random initial location of dots in each cell; solving the force operation cut radius of the dot; setting up a residual force; solving the force control parameter in the cell; performing the force operation for the cell; making the dots in the cell to achieve balanced positions after repeated operation; completing the generation of a dot pattern within a 2D domain; and transferring the dot pattern to the optical device by a transfer printing equipment.Type: GrantFiled: July 23, 2010Date of Patent: November 13, 2012Assignee: National Applied Research LaboratoriesInventors: Cheng-Tai Lee, Jee-Gong Chang, Chi-Chuan Hwang
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Publication number: 20120279838Abstract: A CMOS-MEMS switch structure is disclosed. The CMOS-MEMS switch structure includes a first substrate, a second substrate, a first cantilever beam, and a second cantilever beam. The first and second substrates are positioned opposite each other. The first cantilever beam is provided on the first substrate, extends from the first substrate toward the second substrate, and bends downward. Likewise, the second cantilever beam is provided on the second substrate, extends from the second substrate toward the first substrate, and bends downward. The first and second substrates are movable toward each other to connect a first top surface of the first cantilever beam and a second top surface of the second cantilever beam, and away from each other so that the first top surface of the first cantilever beam and the second top surface of the second cantilever beam are disconnected, thereby closing or opening the CMOS-MEMS switch structure.Type: ApplicationFiled: June 15, 2011Publication date: November 8, 2012Applicant: National Chip Implementation Center National Applied Research Laboratories.Inventors: You-Liang LAI, Ying-Zong JUANG, Hann-Huei TSAI, Sheng-Hsiang TSENG, Chin-Fong CHIU
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Patent number: 8306276Abstract: The present invention discloses a bridge structural safety monitoring system and a bridge structural safety monitoring method. The method includes the steps of capturing an image of a monitoring area of a bridge to create a standard image of the bridge operated at normal conditions, capturing images of the monitoring area of the bridge continuously to obtain monitoring images, comparing the standard image with the monitoring image to obtain a displacement correlation coefficient of the monitoring area of the bridge, and transmitting the displacement correlation coefficient to a central console, such that the central console can determine the using condition of the bridge according to the displacement correlation coefficient.Type: GrantFiled: October 2, 2009Date of Patent: November 6, 2012Assignee: National Applied Research LaboratoriesInventors: Chi-Hung Huang, Wei-Chieh Chiang, Tai-Shan Liao, Chia-Wei Hsu, Jen-Yu Wen, Tzu-Hsuan Wei, Yung-Hsiang Chen
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Publication number: 20120275668Abstract: A handheld facial analyzing device based on estimating the characteristics of human facial skin includes an image capturing unit, a memory unit, a display unit, a processing unit, and a user interface. The processing unit receives an instruction from the user interface corresponding to a position on the image data displayed by the display unit and generates a facial analysis result having information on skin roughness and wrinkles from the gray-scale image data corresponding to the image data in accordance to the position in the instruction.Type: ApplicationFiled: January 21, 2012Publication date: November 1, 2012Applicant: National Applied Research LaboratoriesInventors: SHIH-JIE CHOU, CHIH-CHIEH WU, TAl-SHAN LIAO, CHI-HUNG HUANG, DIN PING TSAI
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Publication number: 20120273688Abstract: A non-visible particle detection device includes an optical module capable of converting an ionizing radiation into visible light. The optical module includes has an attachment unit that is configured to removably attach the optical module to the image capturing module of a mobile device. The image capturing module generates a photon digital image based on the photons converted from the ionizing radiation. The mobile device can be implemented with a radiation dose determining module to execute a radiation dose equivalent calculation method. Based on the pixel brightness analysis of the photon digital image, the radiation equivalent dose can be determined. This method sums up the total brightness of all pixels in the images, determines whether the total brightness is smaller than the minimum effective brightness, and determines the radiation equivalent dose when the total brightness is equal to or larger than the minimum effective brightness.Type: ApplicationFiled: January 21, 2012Publication date: November 1, 2012Applicant: National Applied Research LaboratoriesInventors: DIN PING TSAI, CHIH-CHIEH WU, TAI-SHAN LIAO, CHI-HUNG HUANG
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Patent number: 8274794Abstract: A three-dimensional SoC structure formed by stacking multiple chip modules is provided. The three-dimensional SoC structure includes at least two vertical SoC modules and at least one connector module, wherein each connector module electrically connects two vertical SoC modules. Each vertical SoC module is constructed by stacking at least two chip modules vertically. Each chip module includes a module circuit board and at least one preset element. A recess is formed in each module circuit board and provided with a first connecting interface for electrically connecting with the corresponding at least one preset element. The at least two vertical SoC modules are connected by the connector module to form a three-dimensional SoC structure with multiple functions. Besides, the recesses formed in the module circuit boards provide effective heat dissipation paths for the preset elements.Type: GrantFiled: April 1, 2010Date of Patent: September 25, 2012Assignee: National Chip Implementation Center National Applied Research LaboratoriesInventors: Chun-Ming Huang, Chin-Long Wey, Chien-Ming Wu, Chih-Chyau Yang, Shih-Lun Chen, Chi-Shi Chen, Chi-Sheng Lin
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Publication number: 20120233955Abstract: A buckling restrained brace includes an axial member, a plurality of restraining members, and a plurality of securing units. The axial member includes a middle section extending in an axial direction, and a pair of coupling sections extending respectively from opposite ends of the middle section and that are adapted to be coupled fixedly to two connecting plates of a framework of a building, respectively. The restraining members extend in the axial direction, and are disposed around and contact the axial member. Each securing unit secures an adjacent pair of the restraining members together. Each restraining member cooperates with an adjacent one of the restraining members to define an opening therebetween through which a portion of the axial member is exposed for viewing.Type: ApplicationFiled: May 12, 2011Publication date: September 20, 2012Applicant: NATIONAL APPLIED RESEARCH LABORATORIESInventors: Keh-Chyuan TSAI, An-Chien WU, Chih-Yu WEI, Pao-Chun LIN
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Patent number: 8236433Abstract: An antireflection structure is provided. The antireflection structure includes a substrate layer having a substrate refractive index; a first inorganic layer disposed on the substrate layer and having a first refractive index different from the substrate refractive index, where a thickness of the first inorganic layer is in a range of 1 to 40 nm; and a second inorganic layer disposed on the first inorganic layer and having a second refractive index different from the first refractive index.Type: GrantFiled: September 26, 2008Date of Patent: August 7, 2012Assignee: National Applied Research LaboratoriesInventors: Po-Kai Chiu, Wen-Hao Cho, Hung-Ping Chen, Han-Chang Pan, Chien-Nan Hsiao
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Patent number: 8238506Abstract: A high-accuracy and computational efficient phase-discriminating device is provided and includes a phase-discriminating unit. The phase-discriminating unit converts an input and a reference signals into an input and a reference sequences respectively by a one-bit A/D conversion operation, determines a first value, an in-phase component and a quadrature component of the input signal in response to the input and the reference sequences, and produces an estimated phase of the input signal according to a relation among the first value, the in-phase component and a polarity of the quadrature component, wherein the first value is a certain integer being one of a first integer and a second integer, the first integer is a sampling count of the one-bit A/D conversion operation for producing the input sequence, and the second integer is a summation of an absolute value of the in-phase component and that of the quadrature component.Type: GrantFiled: January 6, 2009Date of Patent: August 7, 2012Assignee: National Applied Research LaboratoriesInventors: Chieh-Fu Chang, Ru-Muh Yang, Ming-Seng Kao
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Publication number: 20120190163Abstract: A method for making a dual silicide or germanide semiconductor comprises steps of providing a semiconductor substrate, forming a gate, forming source/drain regions, forming a first silicide, reducing spacers thickness and forming a second silicide. Forming a gate comprises forming an insulating layer over the semiconductor substrate, and forming the gate over the insulating layer. Forming source/drain regions comprises forming lightly doped source/drain regions in the semiconductor substrate adjacent to the insulating layer, forming spacers adjacent to the gate and over part of the lightly doped source/drain regions, and forming heavily doped source/drain regions in the semiconductor substrate. The first silicide is formed on an exposed surface of lightly and heavily doped source/drain regions. The second silicide is formed on an exposed surface of lightly doped source/drain regions. A first germanide and second germanide may replace the first silicide and the second silicide.Type: ApplicationFiled: May 13, 2011Publication date: July 26, 2012Applicant: National Applied Research LaboratoriesInventors: Szu-Hung Chen, Hung-Min Chen, Yu-Sheng Lai, Wen-Fa Wu, Fu-Liang Yang
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Publication number: 20120182551Abstract: This invention revealed and demonstrated a method of measuring and deriving a Jones Matrix of a fiber or fiber component, and to compensate the fiber or fiber component such that the fiber or fiber component plus the compensated optical circuit act as if an Unitary Matrix free space condition. In this way, all compensated fibers or fiber components act the same no matter what their original conditions are. It greatly enhances the fiber or fiber component repeatability and stability throughout the fiber or fiber component production line. The compensated circuit for Unitary Matrix can be applied externally or internally. For the external approach, for example, compensators such as variable retarder and half-wave plate may be added, or equivalently polarization controllers may be employed. For the internal approach, no component is added, and the compensation is realized through fiber bending, twisting or other means at either or both ends of a fiber or fiber component.Type: ApplicationFiled: May 31, 2011Publication date: July 19, 2012Applicants: NATIONAL CHENG KUNG UNIVERSITY, NATIONAL APPLIED RESEARCH LABORATORIESInventors: Yu-Lung Lo, Ren-Young Liu, Chih-Chung Yen, Yi-Fan Chung
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Patent number: 8216872Abstract: A light-trapping layer is integrated into a thin-film solar cell. It is integrated as a light-inlet layer, an intermediate layer or a shaded layer with nano-particles embedded in a transparent or non-transparent conductive film. Thus, light stays longer in an absorption layer with photocurrent increased; defects of interface between the absorption layer and the nano-material are decreased; anti-reflective effect to inlet light is enhanced; and a good integrity and a good reliability for long-time light-shining are obtained.Type: GrantFiled: February 21, 2011Date of Patent: July 10, 2012Assignee: National Applied Research LaboratoriesInventors: Jia-Min Shieh, Chang-Hong Shen, Wen-Hsien Huang, Shih-Chuan Wu, Bau-Tong Dai, Jung Y. Huang, Hao-Chung Kuo
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Patent number: 8219879Abstract: A method for arranging memories of a low-complexity low-density parity-check (LDPC) decoder and a low-complexity LDPC decoder using the same method are provided. The main idea of the method for arranging memories of a low-complexity LDPC decoder is to merge at least one or two small-capacity memory blocks into one memory group, so that the memory area can be reduced and the power consumption in reading or writing data is lowered. Besides, as the merged memory group shares the same address line in reading or writing data, at least one delay unit is used to adjust the reading or writing order and thereby ensure data validity. A low-complexity LDPC decoder using the disclosed method can meet the demands of high processing rate and low power consumption.Type: GrantFiled: February 18, 2010Date of Patent: July 10, 2012Assignee: National Chip Implementation Center National Applied Research LaboratoriesInventors: Chien-Ming Wu, Ming-Der Shieh, Chun-Ming Huang, Chi-Sheng Lin, Shih-Hao Fang, Shing-Chung Tang